espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-30 10:47:19 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fixed CI esp32s3.default_2_s3.Test failed

Browse Source
This commit is contained in:
zhiweijian
2022-10-28 17:20:03 +08:00
parent 9cfffd2915
commit add561aed8
1 changed files with 4 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
components/esp_phy/test/test_phy_rtc.c
View File

@ -81,12 +81,15 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)
#if SOC_BT_SUPPORTED #if SOC_BT_SUPPORTED
#if CONFIG_IDF_TARGET_ESP32
/* Only esp32 will call bt_track_pll_cap() in the interrupt
handler, other chips will call this function in the task
*/
ESP_LOGI(TAG, "Test bt_track_pll_cap()..."); ESP_LOGI(TAG, "Test bt_track_pll_cap()...");
spi_flash_disable_interrupts_caches_and_other_cpu(); spi_flash_disable_interrupts_caches_and_other_cpu();
bt_track_pll_cap(); bt_track_pll_cap();
spi_flash_enable_interrupts_caches_and_other_cpu(); spi_flash_enable_interrupts_caches_and_other_cpu();
#if CONFIG_IDF_TARGET_ESP32
extern void bt_bb_init_cmplx_reg(void); extern void bt_bb_init_cmplx_reg(void);
ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()..."); ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
spi_flash_disable_interrupts_caches_and_other_cpu(); spi_flash_disable_interrupts_caches_and_other_cpu();