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feat(soc): update esp32h21 lowpower related caps

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This commit is contained in:
wuzhenghui
2025-06-24 19:08:53 +08:00
committed by BOT
parent 9fe51958ae
commit ae34067f11
13 changed files with 50 additions and 23 deletions
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4
components/esp_hw_support/test_apps/sleep_retention/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 |
| ----------------- | -------- | -------- | --------- | -------- | -------- | -------- | | ----------------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- |

4
components/esp_hw_support/test_apps/wakeup_tests/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |

4
components/esp_rom/esp32h21/Kconfig.soc_caps.in
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@@ -91,6 +91,10 @@ config ESP_ROM_HAS_VERSION
bool bool
default y default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y
config ESP_ROM_HAS_OUTPUT_PUTC_FUNC config ESP_ROM_HAS_OUTPUT_PUTC_FUNC
bool bool
default y default y

2
components/esp_rom/esp32h21/esp_rom_caps.h
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@@ -28,7 +28,7 @@
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions #define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage. #define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information #define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
// #define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep. //TODO: [ESP32H21] IDF-11515 #define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.
#define ESP_ROM_HAS_OUTPUT_PUTC_FUNC (1) // ROM has esp_rom_output_putc (or ets_write_char_uart) #define ESP_ROM_HAS_OUTPUT_PUTC_FUNC (1) // ROM has esp_rom_output_putc (or ets_write_char_uart)
#define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY (1) // ROM mem/str functions are not optimized well for misaligned memory access. #define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY (1) // ROM mem/str functions are not optimized well for misaligned memory access.
#define ESP_ROM_NO_USB_SERIAL_OUTPUT_API (1) // ROM does not export the usb-serial-jtag write char function #define ESP_ROM_NO_USB_SERIAL_OUTPUT_API (1) // ROM does not export the usb-serial-jtag write char function

20
components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
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@@ -99,6 +99,14 @@ config SOC_PMU_SUPPORTED
bool bool
default y default y
config SOC_LP_TIMER_SUPPORTED
bool
default y
config SOC_LP_AON_SUPPORTED
bool
default y
config SOC_CLK_TREE_SUPPORTED config SOC_CLK_TREE_SUPPORTED
bool bool
default y default y
@@ -139,6 +147,18 @@ config SOC_PAU_SUPPORTED
bool bool
default y default y
config SOC_LIGHT_SLEEP_SUPPORTED
bool
default y
config SOC_DEEP_SLEEP_SUPPORTED
bool
default y
config SOC_PM_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_32M config SOC_XTAL_SUPPORT_32M
bool bool
default y default y

11
components/soc/esp32h21/include/soc/soc_caps.h
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@@ -61,8 +61,8 @@
// #define SOC_BOD_SUPPORTED 1 //TODO: [ESP32H21] IDF-11530 // #define SOC_BOD_SUPPORTED 1 //TODO: [ESP32H21] IDF-11530
// #define SOC_APM_SUPPORTED 1 //TODO: [ESP32H21] IDF-11494 // #define SOC_APM_SUPPORTED 1 //TODO: [ESP32H21] IDF-11494
#define SOC_PMU_SUPPORTED 1 #define SOC_PMU_SUPPORTED 1
// #define SOC_LP_TIMER_SUPPORTED 1 #define SOC_LP_TIMER_SUPPORTED 1
// #define SOC_LP_AON_SUPPORTED 1 #define SOC_LP_AON_SUPPORTED 1
// #define SOC_LP_PERIPHERALS_SUPPORTED 1 // #define SOC_LP_PERIPHERALS_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1 #define SOC_CLK_TREE_SUPPORTED 1
// #define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32H21] IDF-11544 // #define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32H21] IDF-11544
@@ -81,10 +81,9 @@
#define SOC_AES_SUPPORTED 1 #define SOC_AES_SUPPORTED 1
// #define SOC_SDIO_SLAVE_SUPPORTED 1 // #define SOC_SDIO_SLAVE_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1 #define SOC_PAU_SUPPORTED 1
// #define SOC_LIGHT_SLEEP_SUPPORTED 1 //TODO: [ESP32H21] IDF-11517, IDF-11520 #define SOC_LIGHT_SLEEP_SUPPORTED 1
// #define SOC_DEEP_SLEEP_SUPPORTED 1 //TODO: [ESP32H21] IDF-11515 #define SOC_DEEP_SLEEP_SUPPORTED 1
// #define SOC_MODEM_CLOCK_SUPPORTED 1 #define SOC_PM_SUPPORTED 1
// #define SOC_PM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/ /*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1 #define SOC_XTAL_SUPPORT_32M 1

10
components/soc/esp32h21/register/soc/tee_reg.h
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@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -446,10 +446,10 @@ extern "C" {
/** TEE_DATE_REG : R/W; bitpos: [27:0]; default: 35672706; /** TEE_DATE_REG : R/W; bitpos: [27:0]; default: 35672706;
* reg_tee_date * reg_tee_date
*/ */
#define TEE_DATE_REG 0x0FFFFFFFU #define TEE_DATE 0x0FFFFFFFU
#define TEE_DATE_REG_M (TEE_DATE_REG_V << TEE_DATE_REG_S) #define TEE_DATE_M (TEE_DATE_V << TEE_DATE_S)
#define TEE_DATE_REG_V 0x0FFFFFFFU #define TEE_DATE_V 0x0FFFFFFFU
#define TEE_DATE_REG_S 0 #define TEE_DATE_S 0
#ifdef __cplusplus #ifdef __cplusplus
} }

2
components/soc/esp32h21/uart_periph.c
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@@ -106,6 +106,7 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
}, },
}; };
#if SOC_PAU_SUPPORTED && SOC_UART_SUPPORT_SLEEP_RETENTION
/** /**
* UART registers to be saved during sleep retention * UART registers to be saved during sleep retention
* *
@@ -156,3 +157,4 @@ const uart_reg_retention_info_t uart_reg_retention_info[SOC_UART_HP_NUM] = {
.array_size = ARRAY_SIZE(uart1_regdma_entries), .array_size = ARRAY_SIZE(uart1_regdma_entries),
}, },
}; };
#endif

2
components/soc/esp32h21/wdt_periph.c
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@@ -6,6 +6,7 @@
#include "soc/wdt_periph.h" #include "soc/wdt_periph.h"
#if SOC_PAU_SUPPORTED && SOC_MWDT_SUPPORT_SLEEP_RETENTION
#define N_REGS_TGWDT 6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG #define N_REGS_TGWDT 6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
static const regdma_entries_config_t tg0_wdt_regs_retention[] = { static const regdma_entries_config_t tg0_wdt_regs_retention[] = {
@@ -30,3 +31,4 @@ const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = {
[0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)},
[1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)},
}; };
#endif

2
components/soc/include/soc/wdt_periph.h
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@@ -20,7 +20,7 @@ extern "C" {
/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */ /* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
#define TIMG_WDT_WKEY_VALUE 0x50D83AA1 #define TIMG_WDT_WKEY_VALUE 0x50D83AA1
#if SOC_MWDT_SUPPORT_SLEEP_RETENTION #if SOC_MWDT_SUPPORT_SLEEP_RETENTION && SOC_PAU_SUPPORTED
typedef struct { typedef struct {
const regdma_entries_config_t *link_list; const regdma_entries_config_t *link_list;
uint32_t link_num; uint32_t link_num;

4
examples/system/deep_sleep/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
# Deep Sleep Example # Deep Sleep Example

4
examples/system/deep_sleep_wake_stub/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-H21 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- |
# Deep Sleep Wake Stub Example # Deep Sleep Wake Stub Example

4
examples/system/light_sleep/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
# Light Sleep Example # Light Sleep Example