diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
index da0b959e96..2e36ae1222 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
@@ -139,12 +139,8 @@ static const char *TAG = "bootloader_flash";
    63th block for bootloader_flash_read
 */
 #define MMU_BLOCK0_VADDR  SOC_DROM_LOW
-#ifdef SOC_MMU_PAGE_SIZE_CONFIGURABLE
-#define MMAP_MMU_SIZE     (DRAM0_CACHE_ADDRESS_HIGH(SPI_FLASH_MMU_PAGE_SIZE) - DRAM0_CACHE_ADDRESS_LOW - SPI_FLASH_MMU_PAGE_SIZE) // This mmu size means that the mmu size to be mapped
-#else
-#define MMAP_MMU_SIZE     (DRAM0_CACHE_ADDRESS_HIGH - DRAM0_CACHE_ADDRESS_LOW - SPI_FLASH_MMU_PAGE_SIZE) // This mmu size means that the mmu size to be mapped
-#endif
-#define MMU_BLOCK63_VADDR (MMU_BLOCK0_VADDR + MMAP_MMU_SIZE)
+#define MMU_SIZE          (DRAM0_CACHE_ADDRESS_HIGH - DRAM0_CACHE_ADDRESS_LOW - SPI_FLASH_MMU_PAGE_SIZE) // This mmu size means that the mmu size to be mapped
+#define MMU_BLOCK63_VADDR (MMU_BLOCK0_VADDR + MMU_SIZE)
 #define FLASH_READ_VADDR MMU_BLOCK63_VADDR
 #endif
 
diff --git a/components/hal/esp32c2/include/hal/cache_ll.h b/components/hal/esp32c2/include/hal/cache_ll.h
index c39aa532c8..b9568c7101 100644
--- a/components/hal/esp32c2/include/hal/cache_ll.h
+++ b/components/hal/esp32c2/include/hal/cache_ll.h
@@ -12,7 +12,6 @@
 #include "soc/ext_mem_defs.h"
 #include "hal/cache_types.h"
 #include "hal/assert.h"
-#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -54,9 +53,9 @@ static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t v
     cache_bus_mask_t mask = 0;
 
     uint32_t vaddr_end = vaddr_start + len - 1;
-    if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH(CONFIG_MMU_PAGE_SIZE)) {
+    if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) {
         mask |= CACHE_BUS_IBUS0;
-    } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH(CONFIG_MMU_PAGE_SIZE)) {
+    } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) {
         mask |= CACHE_BUS_DBUS0;
     } else {
         HAL_ASSERT(0);      //Out of region
diff --git a/components/hal/esp32c2/include/hal/mmu_ll.h b/components/hal/esp32c2/include/hal/mmu_ll.h
index 305f1fe445..3b48a43914 100644
--- a/components/hal/esp32c2/include/hal/mmu_ll.h
+++ b/components/hal/esp32c2/include/hal/mmu_ll.h
@@ -13,7 +13,6 @@
 #include "soc/ext_mem_defs.h"
 #include "hal/assert.h"
 #include "hal/mmu_types.h"
-#include "sdkconfig.h"
 
 
 #ifdef __cplusplus
@@ -69,7 +68,7 @@ static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t
 {
     (void)mmu_id;
     uint32_t vaddr_end = vaddr_start + len - 1;
-    return (ADDRESS_IN_IRAM0_CACHE(vaddr_start, MMU_LL_PAGE_SIZE) && ADDRESS_IN_IRAM0_CACHE(vaddr_end, MMU_LL_PAGE_SIZE)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start, MMU_LL_PAGE_SIZE) && ADDRESS_IN_DRAM0_CACHE(vaddr_end, MMU_LL_PAGE_SIZE));
+    return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end));
 }
 
 /**
@@ -102,7 +101,7 @@ static inline uint32_t mmu_ll_get_entry_id(uint32_t mmu_id, uint32_t vaddr)
             HAL_ASSERT(shift_code);
     }
 
-    return ((vaddr & MMU_VADDR_MASK(page_size)) >> shift_code);
+    return ((vaddr & MMU_VADDR_MASK) >> shift_code);
 }
 
 /**
diff --git a/components/soc/esp32c2/include/soc/ext_mem_defs.h b/components/soc/esp32c2/include/soc/ext_mem_defs.h
index b5b65443d2..f73bf37f61 100644
--- a/components/soc/esp32c2/include/soc/ext_mem_defs.h
+++ b/components/soc/esp32c2/include/soc/ext_mem_defs.h
@@ -3,40 +3,40 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef _CACHE_MEMORY_H_
-#define _CACHE_MEMORY_H_
+#pragma once
 
+#include <stdint.h>
+#include "sdkconfig.h"
 #include "esp_bit_defs.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
 
 /*IRAM0 is connected with Cache IBUS0*/
 #define IRAM0_ADDRESS_LOW                      0x4037C000
 #define IRAM0_ADDRESS_HIGH                     0x403C0000
 #define IRAM0_CACHE_ADDRESS_LOW                0x42000000
-#define IRAM0_CACHE_ADDRESS_HIGH(page_size)    (IRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) // MMU has 64 pages
+#define IRAM0_CACHE_ADDRESS_HIGH               (IRAM0_CACHE_ADDRESS_LOW + ((CONFIG_MMU_PAGE_SIZE) * 64)) // MMU has 64 pages
 
 /*DRAM0 is connected with Cache DBUS0*/
 #define DRAM0_ADDRESS_LOW                      0x3FCA0000
 #define DRAM0_ADDRESS_HIGH                     0x3FCE0000
 #define DRAM0_CACHE_ADDRESS_LOW                0x3C000000
-#define DRAM0_CACHE_ADDRESS_HIGH(page_size)    (DRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) // MMU has 64 pages
-#define DRAM0_CACHE_OPERATION_HIGH(page_size)  DRAM0_CACHE_ADDRESS_HIGH(page_size)
+#define DRAM0_CACHE_ADDRESS_HIGH               (DRAM0_CACHE_ADDRESS_LOW + ((CONFIG_MMU_PAGE_SIZE) * 64)) // MMU has 64 pages
+#define DRAM0_CACHE_OPERATION_HIGH             DRAM0_CACHE_ADDRESS_HIGH
 
-#define BUS_SIZE(bus_name, page_size)                 (bus_name##_ADDRESS_HIGH(page_size) - bus_name##_ADDRESS_LOW)
-#define ADDRESS_IN_BUS(bus_name, vaddr, page_size)    ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH(page_size))
+#define BUS_SIZE(bus_name)                 (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
+#define ADDRESS_IN_BUS(bus_name, vaddr)    ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)
 
-#define ADDRESS_IN_IRAM0(vaddr, page_size)            ADDRESS_IN_BUS(IRAM0, vaddr, page_size)
-#define ADDRESS_IN_IRAM0_CACHE(vaddr, page_size)      ADDRESS_IN_BUS(IRAM0_CACHE, vaddr, page_size)
-#define ADDRESS_IN_DRAM0(vaddr, page_size)            ADDRESS_IN_BUS(DRAM0, vaddr, page_size)
-#define ADDRESS_IN_DRAM0_CACHE(vaddr, page_size)      ADDRESS_IN_BUS(DRAM0_CACHE, vaddr, page_size)
+#define ADDRESS_IN_IRAM0(vaddr)            ADDRESS_IN_BUS(IRAM0, vaddr)
+#define ADDRESS_IN_IRAM0_CACHE(vaddr)      ADDRESS_IN_BUS(IRAM0_CACHE, vaddr)
+#define ADDRESS_IN_DRAM0(vaddr)            ADDRESS_IN_BUS(DRAM0, vaddr)
+#define ADDRESS_IN_DRAM0_CACHE(vaddr)      ADDRESS_IN_BUS(DRAM0_CACHE, vaddr)
 
-#define BUS_IRAM0_CACHE_SIZE(page_size)              BUS_SIZE(IRAM0_CACHE, page_size)
-#define BUS_DRAM0_CACHE_SIZE(page_size)              BUS_SIZE(DRAM0_CACHE, page_size)
+#define BUS_IRAM0_CACHE_SIZE              BUS_SIZE(IRAM0_CACHE)
+#define BUS_DRAM0_CACHE_SIZE              BUS_SIZE(DRAM0_CACHE)
 
 #define CACHE_IBUS                      0
 #define CACHE_IBUS_MMU_START            0
@@ -91,7 +91,7 @@ extern "C" {
  * This is the mask used for mapping. e.g.:
  * 0x4200_0000 & MMU_VADDR_MASK
  */
-#define MMU_VADDR_MASK(page_size)                 ((page_size) * 64 - 1)
+#define MMU_VADDR_MASK                 ((CONFIG_MMU_PAGE_SIZE) * 64 - 1)
 //MMU entry num
 #define MMU_ENTRY_NUM  64
 
@@ -108,5 +108,3 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
-
-#endif /*_CACHE_MEMORY_H_ */
diff --git a/tools/test_apps/system/g0_components/CMakeLists.txt b/tools/test_apps/system/g0_components/CMakeLists.txt
index 45ba143eaf..5b71435e8d 100644
--- a/tools/test_apps/system/g0_components/CMakeLists.txt
+++ b/tools/test_apps/system/g0_components/CMakeLists.txt
@@ -26,10 +26,11 @@ idf_build_set_property(__BUILD_COMPONENT_DEPGRAPH_ENABLED 1)
 
 project(g0_components)
 
-# As a workaround for ESP32-C2, we need to define the MMU page size here, until MMU hal-driver
-# is refactored
-if(CONFIG_IDF_TARGET_ESP32C2 OR CONFIG_IDF_TARGET_ESP32C6 OR CONFIG_IDF_TARGET_ESP32H2)
-    idf_build_set_property(C_COMPILE_OPTIONS "-DCONFIG_MMU_PAGE_SIZE=64" APPEND)
+# As a workaround, we need to define the MMU page size here, until MMU hal-driver
+# is refactored.
+# IDF-5219
+if(CONFIG_SOC_MMU_PAGE_SIZE_CONFIGURABLE)
+    idf_build_set_property(C_COMPILE_OPTIONS "-DCONFIG_MMU_PAGE_SIZE=0x10000" APPEND)
 endif()
 
 if(CONFIG_IDF_TARGET_ESP32C2)