Merge branch 'feature/flash_support_h2' into 'master'

spi_flash: Allow clock frequency up to 64M on ESP32H2

See merge request espressif/esp-idf!22476

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -819,7 +819,19 @@ config SOC_SPI_MEM_SUPPORT_WRAP
     bool
     default y
 
-config SOC_MEMSPI_SRC_FREQ_48M_SUPPORTED
+config SOC_MEMSPI_SRC_FREQ_64M_SUPPORTED
+    bool
+    default y
+
+config SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED
+    bool
+    default y
+
+config SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED
+    bool
+    default y
+
+config SOC_MEMSPI_CLOCK_IS_INDEPENDENT
     bool
     default y
 

components/soc/esp32h2/include/soc/clk_tree_defs.h

@@ -431,6 +431,23 @@ typedef enum {
     PARLIO_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F96M,   /*!< Select PLL_F96M as the default clock choice */
 } soc_periph_parlio_clk_src_t;
 
+//////////////////////////////////////////////////MSPI///////////////////////////////////////////////////////////////////
+/**
+ * @brief Array initializer for all supported clock sources of MSPI digital controller
+ */
+#define SOC_MSPI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_PLL_F64M, SOC_MOD_CLK_PLL_F48M}
+/**
+ * @brief MSPI digital controller clock source
+ */
+typedef enum {
+    MSPI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
+    MSPI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RC_FAST as the source clock */
+    MSPI_CLK_SRC_PLL_F64M = SOC_MOD_CLK_PLL_F64M,   /*!< Select PLL_F64M as the source clock */
+    MSPI_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M,   /*!< Select PLL_F48M as the source clock */
+    MSPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F64M,    /*!< Select PLL_F64M as the default clock choice */
+    MSPI_CLK_SRC_ROM_DEFAULT = SOC_MOD_CLK_XTAL,    /*!< Select XTAL as ROM default clock source */
+} soc_periph_mspi_clk_src_t;
+
 #ifdef __cplusplus
 }
 #endif

components/soc/esp32h2/include/soc/soc_caps.h

@@ -361,7 +361,10 @@
 #define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
 #define SOC_SPI_MEM_SUPPORT_WRAP                          (1)
 
-#define SOC_MEMSPI_SRC_FREQ_48M_SUPPORTED         1
+#define SOC_MEMSPI_SRC_FREQ_64M_SUPPORTED         1
+#define SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED         1
+#define SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED         1
+#define SOC_MEMSPI_CLOCK_IS_INDEPENDENT           1
 
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units