espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-02 12:14:32 +02:00
Code Issues Packages Projects Releases Wiki Activity

make psram workaround depend on chip revison

Browse Source 
Since ESP32 revision 3, the PSRAM workaround is not needed.
This commit is contained in:
suda-morris
2019-10-10 11:38:14 +08:00
parent 8147d48ec8
commit b3720f80c7
1 changed files with 3 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
components/esp32/Kconfig
View File

@@ -155,7 +155,7 @@ menu "ESP32-specific"
config SPIRAM_CACHE_WORKAROUND config SPIRAM_CACHE_WORKAROUND
bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s" bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC depends on (SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC) && (ESP32_REV_MIN < 3)
default "y" default "y"
help help
Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
@@ -166,6 +166,8 @@ menu "ESP32-specific"
This will also not use any bits of newlib that are located in ROM, opting for a version that is This will also not use any bits of newlib that are located in ROM, opting for a version that is
compiled with the workaround and located in flash instead. compiled with the workaround and located in flash instead.
The workaround is not required for ESP32 revision 3 and above.
config SPIRAM_BANKSWITCH_ENABLE config SPIRAM_BANKSWITCH_ENABLE
bool "Enable bank switching for >4MiB external RAM" bool "Enable bank switching for >4MiB external RAM"
default y default y