diff --git a/components/esp32/dport_access.c b/components/esp32/dport_access.c index c2c1294a16..ce2e99ccb1 100644 --- a/components/esp32/dport_access.c +++ b/components/esp32/dport_access.c @@ -22,7 +22,6 @@ #include #include -#include #include "esp_attr.h" #include "esp_err.h" #include "esp_intr_alloc.h" @@ -38,6 +37,8 @@ #include "xtensa/core-macros.h" +#include "sdkconfig.h" + #ifndef CONFIG_FREERTOS_UNICORE static portMUX_TYPE g_dport_mux = portMUX_INITIALIZER_UNLOCKED; diff --git a/components/esp32/hw_random.c b/components/esp32/hw_random.c index faf297503a..d4883982b7 100644 --- a/components/esp32/hw_random.c +++ b/components/esp32/hw_random.c @@ -20,7 +20,6 @@ #include "esp_attr.h" #include "esp32/clk.h" #include "soc/wdev_reg.h" -#include "freertos/FreeRTOSConfig.h" #include "xtensa/core-macros.h" uint32_t IRAM_ATTR esp_random(void) diff --git a/components/esp32/system_api_esp32.c b/components/esp32/system_api_esp32.c index 34dedf074c..781e2a8714 100644 --- a/components/esp32/system_api_esp32.c +++ b/components/esp32/system_api_esp32.c @@ -17,7 +17,6 @@ #include "esp_private/system_internal.h" #include "esp_attr.h" #include "esp_efuse.h" -#include "esp_wifi.h" #include "esp_log.h" #include "sdkconfig.h" #include "esp32/rom/cache.h" @@ -30,7 +29,9 @@ #include "soc/cpu.h" #include "soc/rtc.h" #include "hal/wdt_hal.h" +#include "hal/cpu_hal.h" #include "freertos/xtensa_api.h" +#include "soc/soc_memory_layout.h" #include "esp32/cache_err_int.h" @@ -57,7 +58,7 @@ void IRAM_ATTR esp_restart_noos(void) // CPU must be reset before stalling, in case it was running a s32c1i // instruction. This would cause memory pool to be locked by arbiter // to the stalled CPU, preventing current CPU from accessing this pool. - const uint32_t core_id = xPortGetCoreID(); + const uint32_t core_id = cpu_hal_get_core_id(); const uint32_t other_core_id = (core_id == 0) ? 1 : 0; esp_cpu_reset(other_core_id); esp_cpu_stall(other_core_id); diff --git a/components/esp32s2/hw_random.c b/components/esp32s2/hw_random.c index 3342950925..c8709e28f2 100644 --- a/components/esp32s2/hw_random.c +++ b/components/esp32s2/hw_random.c @@ -20,7 +20,6 @@ #include "esp_attr.h" #include "esp32s2/clk.h" #include "soc/wdev_reg.h" -#include "freertos/FreeRTOSConfig.h" #include "xtensa/core-macros.h" uint32_t IRAM_ATTR esp_random(void) diff --git a/components/esp32s2/system_api_esp32s2.c b/components/esp32s2/system_api_esp32s2.c index bad5c7bb61..e8a6c4794c 100644 --- a/components/esp32s2/system_api_esp32s2.c +++ b/components/esp32s2/system_api_esp32s2.c @@ -17,7 +17,6 @@ #include "esp_system.h" #include "esp_private/system_internal.h" #include "esp_attr.h" -#include "esp_wifi.h" #include "esp_log.h" #include "esp32s2/rom/cache.h" #include "esp_rom_uart.h" @@ -30,6 +29,7 @@ #include "soc/syscon_reg.h" #include "hal/wdt_hal.h" #include "freertos/xtensa_api.h" +#include "hal/cpu_hal.h" /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, @@ -55,7 +55,7 @@ void IRAM_ATTR esp_restart_noos(void) // CPU must be reset before stalling, in case it was running a s32c1i // instruction. This would cause memory pool to be locked by arbiter // to the stalled CPU, preventing current CPU from accessing this pool. - const uint32_t core_id = xPortGetCoreID(); + const uint32_t core_id = cpu_hal_get_core_id(); //Todo: Refactor to use Interrupt or Task Watchdog API, and a system level WDT context // Disable TG0/TG1 watchdogs diff --git a/components/esp32s3/hw_random.c b/components/esp32s3/hw_random.c index 251538b878..711dd0574f 100644 --- a/components/esp32s3/hw_random.c +++ b/components/esp32s3/hw_random.c @@ -20,7 +20,6 @@ #include "esp_attr.h" #include "esp32s3/clk.h" #include "soc/wdev_reg.h" -#include "freertos/FreeRTOSConfig.h" #include "xtensa/core-macros.h" uint32_t IRAM_ATTR esp_random(void) diff --git a/components/esp32s3/system_api_esp32s3.c b/components/esp32s3/system_api_esp32s3.c index 252a171bcf..5e787fdd90 100644 --- a/components/esp32s3/system_api_esp32s3.c +++ b/components/esp32s3/system_api_esp32s3.c @@ -17,7 +17,6 @@ #include "esp_system.h" #include "esp_private/system_internal.h" #include "esp_attr.h" -#include "esp_wifi.h" #include "esp_log.h" #include "esp32s3/rom/cache.h" #include "esp_rom_uart.h" @@ -55,7 +54,7 @@ void IRAM_ATTR esp_restart_noos(void) // CPU must be reset before stalling, in case it was running a s32c1i // instruction. This would cause memory pool to be locked by arbiter // to the stalled CPU, preventing current CPU from accessing this pool. - const uint32_t core_id = xPortGetCoreID(); + const uint32_t core_id = cpu_hal_get_core_id(); #if !CONFIG_FREERTOS_UNICORE const uint32_t other_core_id = (core_id == 0) ? 1 : 0; esp_cpu_reset(other_core_id); diff --git a/components/esp_common/src/brownout.c b/components/esp_common/src/brownout.c index cd83c35796..990f3938d0 100644 --- a/components/esp_common/src/brownout.c +++ b/components/esp_common/src/brownout.c @@ -16,16 +16,20 @@ #include #include #include -#include "sdkconfig.h" -#include "esp_log.h" + +#include "esp_private/system_internal.h" +#include "driver/rtc_cntl.h" + +#include "esp_rom_sys.h" + #include "soc/soc.h" #include "soc/cpu.h" #include "soc/rtc_periph.h" +#include "hal/cpu_hal.h" + #include "hal/brownout_hal.h" -#include "esp_private/system_internal.h" -#include "driver/rtc_cntl.h" -#include "freertos/FreeRTOS.h" -#include "esp_rom_sys.h" + +#include "sdkconfig.h" #if defined(CONFIG_ESP32_BROWNOUT_DET_LVL) #define BROWNOUT_DET_LVL CONFIG_ESP32_BROWNOUT_DET_LVL @@ -52,7 +56,7 @@ static void rtc_brownout_isr_handler(void *arg) /* Stall the other CPU to make sure the code running there doesn't use UART * at the same time as the following esp_rom_printf. */ - esp_cpu_stall(!xPortGetCoreID()); + esp_cpu_stall(!cpu_hal_get_core_id()); esp_reset_reason_set_hint(ESP_RST_BROWNOUT); esp_rom_printf("\r\nBrownout detector was triggered\r\n\r\n"); esp_restart_noos(); diff --git a/components/esp_system/panic.c b/components/esp_system/panic.c index 73dee777a1..2c3781d66f 100644 --- a/components/esp_system/panic.c +++ b/components/esp_system/panic.c @@ -16,7 +16,6 @@ #include "esp_err.h" #include "esp_attr.h" -#include "esp_spi_flash.h" #include "esp_private/system_internal.h" #include "esp_private/gdbstub.h" #include "esp_private/usb_console.h" diff --git a/components/esp_system/sleep_modes.c b/components/esp_system/sleep_modes.c index 4a22c2486f..e6fd9136c5 100644 --- a/components/esp_system/sleep_modes.c +++ b/components/esp_system/sleep_modes.c @@ -19,6 +19,7 @@ #include "esp_attr.h" #include "esp_sleep.h" #include "esp_private/esp_timer_private.h" +#include "esp_private/system_internal.h" #include "esp_log.h" #include "esp_newlib.h" #include "esp_timer.h" @@ -429,7 +430,7 @@ esp_err_t esp_light_sleep_start(void) */ esp_timer_private_lock(); s_config.rtc_ticks_at_sleep_start = rtc_time_get(); - uint64_t frc_time_at_start = esp_timer_get_time(); + uint64_t frc_time_at_start = esp_system_get_time(); DPORT_STALL_OTHER_CPU_START(); // Decide which power domains can be powered down @@ -475,7 +476,7 @@ esp_err_t esp_light_sleep_start(void) // FRC1 has been clock gated for the duration of the sleep, correct for that. uint64_t rtc_ticks_at_end = rtc_time_get(); - uint64_t frc_time_at_end = esp_timer_get_time(); + uint64_t frc_time_at_end = esp_system_get_time(); uint64_t rtc_time_diff = rtc_time_slowclk_to_us(rtc_ticks_at_end - s_config.rtc_ticks_at_sleep_start, esp_clk_slowclk_cal_get()); diff --git a/components/esp_wifi/CMakeLists.txt b/components/esp_wifi/CMakeLists.txt index cb3bfc75e4..ff2ea100d1 100644 --- a/components/esp_wifi/CMakeLists.txt +++ b/components/esp_wifi/CMakeLists.txt @@ -35,7 +35,7 @@ idf_component_register(SRCS "src/coexist.c" "${idf_target}/esp_adapter.c" INCLUDE_DIRS "include" "${idf_target}/include" REQUIRES esp_event - PRIV_REQUIRES esp_pm wpa_supplicant nvs_flash esp_netif ${extra_priv_requires} + PRIV_REQUIRES esp_timer esp_pm wpa_supplicant nvs_flash esp_netif ${extra_priv_requires} LDFRAGMENTS "${ldfragments}") idf_build_get_property(build_dir BUILD_DIR) diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c index d6e17d013e..8505b5d792 100644 --- a/components/esp_wifi/esp32/esp_adapter.c +++ b/components/esp_wifi/esp32/esp_adapter.c @@ -48,6 +48,7 @@ #include "esp_coexist_internal.h" #include "esp_coexist_adapter.h" #include "esp32/dport_access.h" +#include "esp_timer.h" #define TAG "esp_adapter" diff --git a/components/newlib/syscall_table.c b/components/newlib/syscall_table.c index 5f8fea2d0a..16d2d6f5fa 100644 --- a/components/newlib/syscall_table.c +++ b/components/newlib/syscall_table.c @@ -22,7 +22,6 @@ #include #include #include -#include "esp_vfs.h" #include "esp_newlib.h" #include "sdkconfig.h" #include "soc/soc_caps.h" diff --git a/components/spi_flash/esp_flash_api.c b/components/spi_flash/esp_flash_api.c index b05b530c2c..79e242e160 100644 --- a/components/spi_flash/esp_flash_api.c +++ b/components/spi_flash/esp_flash_api.c @@ -21,10 +21,9 @@ #include "memspi_host_driver.h" #include "esp_log.h" #include "sdkconfig.h" -#include "esp_heap_caps.h" #include "esp_flash_internal.h" -#include -#include "esp_timer.h" +#include "esp_private/system_internal.h" + static const char TAG[] = "spi_flash"; @@ -378,7 +377,7 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui #endif while (err == ESP_OK && len >= sector_size) { #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE - int64_t start_time_us = esp_timer_get_time(); + int64_t start_time_us = esp_system_get_time(); #endif err = rom_spiflash_api_funcs->start(chip); if (err != ESP_OK) { @@ -403,7 +402,7 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui err = rom_spiflash_api_funcs->end(chip, err); #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE - no_yield_time_us += (esp_timer_get_time() - start_time_us); + no_yield_time_us += (esp_system_get_time() - start_time_us); if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) { no_yield_time_us = 0; if (chip->os_func->yield) { diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index 0068f4cd69..d7f72de7b0 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -28,6 +28,7 @@ #include "esp_attr.h" #include "esp_spi_flash.h" #include "esp_log.h" +#include "esp_private/system_internal.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" #include "esp32/rom/cache.h" @@ -45,7 +46,6 @@ #include "cache_utils.h" #include "esp_flash.h" #include "esp_attr.h" -#include "esp_timer.h" esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_addr, const void *src, size_t size); @@ -260,7 +260,7 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(size_t start_addr, size_t size) #endif for (size_t sector = start; sector != end && rc == ESP_ROM_SPIFLASH_RESULT_OK; ) { #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE - int64_t start_time_us = esp_timer_get_time(); + int64_t start_time_us = esp_system_get_time(); #endif spi_flash_guard_start(); #ifndef CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE @@ -277,7 +277,7 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(size_t start_addr, size_t size) } spi_flash_guard_end(); #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE - no_yield_time_us += (esp_timer_get_time() - start_time_us); + no_yield_time_us += (esp_system_get_time() - start_time_us); if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) { no_yield_time_us = 0; if (s_flash_guard_ops && s_flash_guard_ops->yield) {