diff --git a/.gitmodules b/.gitmodules index a385cdcced..f9335108dc 100644 --- a/.gitmodules +++ b/.gitmodules @@ -90,3 +90,7 @@ [submodule "components/bt/controller/lib_esp32h2/esp32h2-bt-lib"] path = components/bt/controller/lib_esp32h2/esp32h2-bt-lib url = ../../espressif/esp32h2-bt-lib.git + +[submodule "components/bt/controller/lib_esp32c2/esp32c2-bt-lib"] + path = components/bt/controller/lib_esp32c2/esp32c2-bt-lib + url = ../../espressif/esp32c2-bt-lib.git diff --git a/components/bt/CMakeLists.txt b/components/bt/CMakeLists.txt index 6b1391be50..b6f73e0ced 100644 --- a/components/bt/CMakeLists.txt +++ b/components/bt/CMakeLists.txt @@ -1,45 +1,34 @@ if(CONFIG_BT_ENABLED) - if(CONFIG_IDF_TARGET_ESP32) - set(srcs "controller/esp32/bt.c" - "controller/esp32/hli_api.c" - "controller/esp32/hli_vectors.S") - elseif(CONFIG_IDF_TARGET_ESP32C3) - set(srcs "controller/esp32c3/bt.c") - elseif(CONFIG_IDF_TARGET_ESP32S3) - set(srcs "controller/esp32s3/bt.c") - elseif(CONFIG_IDF_TARGET_ESP32H2) - set(srcs "controller/esp32h2/bt.c") - endif() - if(CONFIG_NIMBLE_USE_UART_HCI) - set(srcs - "porting/nimble/src/hal_uart.c" - ) - else() - endif() - - set(include_dirs common/osi/include) + set(srcs "") + set(include_dirs "") if(CONFIG_IDF_TARGET_ESP32) - list(APPEND include_dirs include/esp32/include) + list(APPEND srcs "controller/esp32/bt.c" + "controller/esp32/hli_api.c" + "controller/esp32/hli_vectors.S") + list(APPEND include_dirs include/esp32/include) + elseif(CONFIG_IDF_TARGET_ESP32C3) - list(APPEND include_dirs include/esp32c3/include) + list(APPEND srcs "controller/esp32c3/bt.c") + list(APPEND include_dirs include/esp32c3/include) + elseif(CONFIG_IDF_TARGET_ESP32S3) - list(APPEND include_dirs include/esp32s3/include) + list(APPEND srcs "controller/esp32s3/bt.c") + list(APPEND include_dirs include/esp32s3/include) + elseif(CONFIG_IDF_TARGET_ESP32H2) - if(CONFIG_BT_BLUEDROID_ENABLED) - list(APPEND include_dirs - host/nimble/nimble/porting/nimble/include - host/nimble/nimble/nimble/include - host/nimble/nimble/porting/npl/freertos/include - host/nimble/nimble/nimble/transport/ram/include - host/nimble/port/include - include/esp32h2/include) - else() - list(APPEND include_dirs include/esp32h2/include) - endif() + list(APPEND srcs "controller/esp32h2/bt.c") + list(APPEND include_dirs include/esp32h2/include) + + elseif(CONFIG_IDF_TARGET_ESP32C2) + list(APPEND srcs "controller/esp32c2/bt.c") + list(APPEND include_dirs include/esp32c2/include) endif() + # Common + list(APPEND include_dirs common/osi/include) + list(APPEND priv_include_dirs common/btc/include common/include) @@ -48,6 +37,7 @@ if(CONFIG_BT_ENABLED) common/btc/profile/esp/blufi/include common/btc/profile/esp/include) + list(APPEND srcs "common/btc/core/btc_alarm.c" "common/api/esp_blufi_api.c" "common/btc/core/btc_manage.c" @@ -68,6 +58,7 @@ if(CONFIG_BT_ENABLED) "common/osi/osi.c" "common/osi/semaphore.c") + # Host Bluedroid if(CONFIG_BT_BLUEDROID_ENABLED) list(APPEND priv_include_dirs @@ -361,16 +352,15 @@ if(CONFIG_BT_ENABLED) "host/bluedroid/stack/smp/smp_l2c.c" "host/bluedroid/stack/smp/smp_main.c" "host/bluedroid/stack/smp/smp_utils.c") -if(CONFIG_IDF_TARGET_ESP32H2) - if(CONFIG_BT_BLUEDROID_ENABLED) + if(CONFIG_IDF_TARGET_ESP32H2 OR CONFIG_IDF_TARGET_ESP32C2) list(APPEND srcs "host/nimble/nimble/porting/npl/freertos/src/npl_os_freertos.c" "host/nimble/nimble/porting/nimble/src/os_msys_init.c" "host/nimble/port/src/esp_nimble_mem.c") - endif() -endif() + endif() + + list(APPEND srcs "common/btc/profile/esp/blufi/bluedroid_host/esp_blufi.c") - list(APPEND srcs "common/btc/profile/esp/blufi/bluedroid_host/esp_blufi.c") if(CONFIG_BLE_MESH) list(APPEND srcs "esp_ble_mesh/mesh_core/bluedroid_host/mesh_bearer_adapt.c") endif() @@ -475,12 +465,73 @@ endif() "esp_ble_mesh/mesh_models/server/time_scene_server.c") endif() + + # Nimble + # Nimble common + if(CONFIG_BT_NIMBLE_ENABLED OR + (CONFIG_BT_CONTROLLER_ENABLED AND (CONFIG_IDF_TARGET_ESP32C2 OR CONFIG_IDF_TARGET_ESP32H2))) + list(APPEND srcs + "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c" + "host/nimble/nimble/porting/npl/freertos/src/npl_os_freertos.c" + "host/nimble/nimble/porting/nimble/src/os_cputime_pwr2.c" + "host/nimble/nimble/porting/nimble/src/hal_timer.c" + "host/nimble/nimble/porting/nimble/src/os_msys_init.c" + "host/nimble/nimble/porting/nimble/src/nimble_port.c" + "host/nimble/port/src/esp_nimble_mem.c" + "host/nimble/esp-hci/src/esp_nimble_hci.c" + "host/nimble/nimble/porting/nimble/src/os_cputime.c" + ) + + list(APPEND include_dirs + host/nimble/nimble/porting/nimble/include + host/nimble/port/include + host/nimble/nimble/nimble/include + host/nimble/nimble/porting/npl/freertos/include + host/nimble/esp-hci/include + ) + + if(NOT CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS) + + list(APPEND include_dirs + host/nimble/nimble/ext/tinycrypt/include) + + list(APPEND srcs "host/nimble/nimble/ext/tinycrypt/src/utils.c" + "host/nimble/nimble/ext/tinycrypt/src/sha256.c" + "host/nimble/nimble/ext/tinycrypt/src/ecc.c" + "host/nimble/nimble/ext/tinycrypt/src/ctr_prng.c" + "host/nimble/nimble/ext/tinycrypt/src/ctr_mode.c" + "host/nimble/nimble/ext/tinycrypt/src/aes_decrypt.c" + "host/nimble/nimble/ext/tinycrypt/src/aes_encrypt.c" + "host/nimble/nimble/ext/tinycrypt/src/ccm_mode.c" + "host/nimble/nimble/ext/tinycrypt/src/ecc_dsa.c" + "host/nimble/nimble/ext/tinycrypt/src/cmac_mode.c" + "host/nimble/nimble/ext/tinycrypt/src/ecc_dh.c" + "host/nimble/nimble/ext/tinycrypt/src/hmac_prng.c" + "host/nimble/nimble/ext/tinycrypt/src/ecc_platform_specific.c" + "host/nimble/nimble/ext/tinycrypt/src/hmac.c" + "host/nimble/nimble/ext/tinycrypt/src/cbc_mode.c") + endif() + + if(CONFIG_BT_LE_HCI_INTERFACE_USE_UART) + list(APPEND srcs + "host/nimble/nimble/porting/nimble/src/hal_uart.c" + ) + list(APPEND include_dirs + host/nimble/nimble/nimble/transport/uart/include + ) + else() + list(APPEND include_dirs + host/nimble/nimble/nimble/transport/ram/include + ) + endif() + endif() + + + if(CONFIG_BT_NIMBLE_ENABLED) list(APPEND include_dirs - host/nimble/nimble/porting/nimble/include - host/nimble/port/include - host/nimble/nimble/nimble/include + host/nimble/nimble/nimble/host/include host/nimble/nimble/nimble/host/services/ans/include host/nimble/nimble/nimble/host/services/bas/include @@ -494,31 +545,7 @@ endif() host/nimble/nimble/nimble/host/util/include host/nimble/nimble/nimble/host/store/ram/include host/nimble/nimble/nimble/host/store/config/include - host/nimble/nimble/porting/npl/freertos/include - host/nimble/nimble/nimble/transport/ram/include - host/nimble/esp-hci/include) - - if(NOT CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS) - - list(APPEND include_dirs - host/nimble/nimble/ext/tinycrypt/include) - - list(APPEND srcs "host/nimble/nimble/ext/tinycrypt/src/utils.c" - "host/nimble/nimble/ext/tinycrypt/src/sha256.c" - "host/nimble/nimble/ext/tinycrypt/src/ecc.c" - "host/nimble/nimble/ext/tinycrypt/src/ctr_prng.c" - "host/nimble/nimble/ext/tinycrypt/src/ctr_mode.c" - "host/nimble/nimble/ext/tinycrypt/src/aes_decrypt.c" - "host/nimble/nimble/ext/tinycrypt/src/aes_encrypt.c" - "host/nimble/nimble/ext/tinycrypt/src/ccm_mode.c" - "host/nimble/nimble/ext/tinycrypt/src/ecc_dsa.c" - "host/nimble/nimble/ext/tinycrypt/src/cmac_mode.c" - "host/nimble/nimble/ext/tinycrypt/src/ecc_dh.c" - "host/nimble/nimble/ext/tinycrypt/src/hmac_prng.c" - "host/nimble/nimble/ext/tinycrypt/src/ecc_platform_specific.c" - "host/nimble/nimble/ext/tinycrypt/src/hmac.c" - "host/nimble/nimble/ext/tinycrypt/src/cbc_mode.c") - endif() + ) list(APPEND srcs "host/nimble/nimble/nimble/host/util/src/addr.c" "host/nimble/nimble/nimble/host/services/gatt/src/ble_svc_gatt.c" @@ -577,15 +604,7 @@ endif() "host/nimble/nimble/nimble/host/store/ram/src/ble_store_ram.c" "host/nimble/nimble/nimble/host/store/config/src/ble_store_config.c" "host/nimble/nimble/nimble/host/store/config/src/ble_store_nvs.c" - "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c" - "host/nimble/nimble/porting/npl/freertos/src/npl_os_freertos.c" - "host/nimble/nimble/porting/nimble/src/os_cputime_pwr2.c" - "host/nimble/nimble/porting/nimble/src/hal_timer.c" - "host/nimble/nimble/porting/nimble/src/os_msys_init.c" - "host/nimble/nimble/porting/nimble/src/nimble_port.c" - "host/nimble/port/src/esp_nimble_mem.c" - "host/nimble/esp-hci/src/esp_nimble_hci.c" - "host/nimble/nimble/porting/nimble/src/os_cputime.c") + ) if(CONFIG_IDF_TARGET_ESP32) list(APPEND srcs @@ -608,8 +627,9 @@ endif() endif() - list(APPEND srcs + list(APPEND srcs "common/btc/profile/esp/blufi/nimble_host/esp_blufi.c") + if(CONFIG_BLE_MESH) list(APPEND srcs "esp_ble_mesh/mesh_core/nimble_host/mesh_bearer_adapt.c") endif() @@ -681,7 +701,10 @@ if(CONFIG_BT_ENABLED) "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3") target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app) elseif(CONFIG_IDF_TARGET_ESP32H2) - add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/libcontroller_5p0_seq.a") + add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/libble_app.a") + target_link_libraries(${COMPONENT_LIB} PRIVATE nimblelib) + elseif(CONFIG_IDF_TARGET_ESP32C2) + add_prebuilt_library(nimblelib "controller/lib_esp32c2/esp32c2-bt-lib/libble_app.a") target_link_libraries(${COMPONENT_LIB} PRIVATE nimblelib) endif() diff --git a/components/bt/Kconfig b/components/bt/Kconfig index 5b98a8ff6b..390a6f80f5 100644 --- a/components/bt/Kconfig +++ b/components/bt/Kconfig @@ -7,20 +7,8 @@ menu "Bluetooth" help Select this option to enable Bluetooth and show the submenu with Bluetooth configuration choices. - config BT_SOC_SUPPORT_5_0 - bool - depends on BT_ENABLED && (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3) - default y if BT_ENABLED && (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3) - default n - - menu "Bluetooth controller" - depends on BT_ENABLED - - source "$IDF_PATH/components/bt/controller/$IDF_TARGET/Kconfig.in" - endmenu - choice BT_HOST - prompt "Bluetooth Host" + prompt "Host" depends on BT_ENABLED default BT_BLUEDROID_ENABLED help @@ -38,7 +26,7 @@ menu "Bluetooth" This option is recommended for BLE only usecases to save on memory config BT_CONTROLLER_ONLY - bool "Controller Only" + bool "Disabled" help This option is recommended when you want to communicate directly with the controller (without any host) or when you are using any other host stack @@ -46,17 +34,41 @@ menu "Bluetooth" endchoice - menu "Bluedroid Options" - depends on BT_BLUEDROID_ENABLED && SOC_BLUEDROID_SUPPORTED + choice BT_CONTROLLER + prompt "Controller" + depends on BT_ENABLED + default BT_CONTROLLER_ENABLED + help + This helps to choose Bluetooth controller stack + config BT_CONTROLLER_ENABLED + bool "Enabled" + help + This option is recommended for Bluetooth controller usecases + This option is recommended for Bluetooth controller usecases + + config BT_CONTROLLER_DISABLED + bool "Disabled" + help + This option is recommended for Bluetooth Host only usecases + + endchoice + + menu "Bluedroid Options" + depends on BT_BLUEDROID_ENABLED source "$IDF_PATH/components/bt/host/bluedroid/Kconfig.in" endmenu + menu "NimBLE Options" depends on BT_NIMBLE_ENABLED - source "$IDF_PATH/components/bt/host/nimble/Kconfig.in" endmenu + menu "Controller Options" + depends on BT_CONTROLLER_ENABLED + source "$IDF_PATH/components/bt/controller/$IDF_TARGET/Kconfig.in" + endmenu + endmenu menuconfig BLE_MESH diff --git a/components/bt/controller/esp32c2/Kconfig.in b/components/bt/controller/esp32c2/Kconfig.in index e69de29bb2..e8021a8501 100644 --- a/components/bt/controller/esp32c2/Kconfig.in +++ b/components/bt/controller/esp32c2/Kconfig.in @@ -0,0 +1,332 @@ + +menu "HCI Config" + + choice BT_LE_HCI_INTERFACE + prompt "Select HCI interface" + default BT_LE_HCI_INTERFACE_USE_RAM + + config BT_LE_HCI_INTERFACE_USE_RAM + bool "ram" + help + Use RAM as HCI interface + config BT_LE_HCI_INTERFACE_USE_UART + bool "uart" + help + Use UART as HCI interface + endchoice + + config BT_LE_HCI_UART_PORT + int "HCI UART port" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 1 + help + Set the port number of HCI UART + + config BT_LE_HCI_UART_TX_PIN + int "HCI uart Tx gpio" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 19 + + config BT_LE_HCI_UART_RX_PIN + int "HCI uart Rx gpio" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 10 + + config BT_LE_HCI_UART_TASK_STACK_SIZE + int "HCI uart task stack size" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 1000 + help + Set the size of uart task stack + + config BT_LE_HCI_UART_BAUD + int "HCI uart baudrate" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 921600 + help + HCI uart baud rate 115200 ~ 1000000 + +endmenu + +config BT_LE_CONTROLLER_TASK_STACK_SIZE + int "Controller task stack size" + default 5120 if BLE_MESH + default 4096 + help + This configures stack size of NimBLE controller task + +config BT_LE_LL_RESOLV_LIST_SIZE + int "BLE LL Resolving list size" + range 1 5 if IDF_TARGET_ESP32C2 + default 4 + help + Configure the size of resolving list used in link layer. + +menuconfig BT_LE_SECURITY_ENABLE + bool "Enable BLE SM feature" + depends on !BT_NIMBLE_ENABLED + default y + help + Enable BLE sm feature + +config BT_LE_SM_LEGACY + bool "Security manager legacy pairing" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable security manager legacy pairing + +config BT_LE_SM_SC + bool "Security manager secure connections (4.2)" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable security manager secure connections + +config BT_LE_SM_SC_DEBUG_KEYS + bool "Use predefined public-private key pair" + default n + depends on BT_LE_SECURITY_ENABLE && BT_LE_SM_SC + help + If this option is enabled, SM uses predefined DH key pair as described + in Core Specification, Vol. 3, Part H, 2.3.5.6.1. This allows to + decrypt air traffic easily and thus should only be used for debugging. + +config BT_LE_LL_CFG_FEAT_LE_ENCRYPTION + bool "Enable LE encryption" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable encryption connection + +menu "Memory Settings" + depends on !BT_NIMBLE_ENABLED + + config BT_LE_MSYS_1_BLOCK_COUNT + int "MSYS_1 Block Count" + default 12 + help + MSYS is a system level mbuf registry. For prepare write & prepare + responses MBUFs are allocated out of msys_1 pool. For NIMBLE_MESH + enabled cases, this block count is increased by 8 than user defined + count. + + config BT_LE_MSYS_1_BLOCK_SIZE + int "MSYS_1 Block Size" + default 256 + help + Dynamic memory size of block 1 + + config BT_LE_MSYS_2_BLOCK_COUNT + int "MSYS_2 Block Count" + default 24 + help + Dynamic memory count + + config BT_LE_MSYS_2_BLOCK_SIZE + int "MSYS_2 Block Size" + default 320 + help + Dynamic memory size of block 2 + + config BT_LE_ACL_BUF_COUNT + int "ACL Buffer count" + default 24 + help + The number of ACL data buffers. + + config BT_LE_ACL_BUF_SIZE + int "ACL Buffer size" + default 255 + help + This is the maximum size of the data portion of HCI ACL data packets. + It does not include the HCI data header (of 4 bytes) + + config BT_LE_HCI_EVT_BUF_SIZE + int "HCI Event Buffer size" + default 257 if BT_LE_EXT_ADV + default 70 + help + This is the size of each HCI event buffer in bytes. In case of + extended advertising, packets can be fragmented. 257 bytes is the + maximum size of a packet. + + config BT_LE_HCI_EVT_HI_BUF_COUNT + int "High Priority HCI Event Buffer count" + default 30 + help + This is the high priority HCI events' buffer size. High-priority + event buffers are for everything except advertising reports. If there + are no free high-priority event buffers then host will try to allocate a + low-priority buffer instead + + config BT_LE_HCI_EVT_LO_BUF_COUNT + int "Low Priority HCI Event Buffer count" + default 8 + help + This is the low priority HCI events' buffer size. Low-priority event + buffers are only used for advertising reports. If there are no free + low-priority event buffers, then an incoming advertising report will + get dropped +endmenu + +config BT_LE_CRYPTO_STACK_MBEDTLS + bool "Override TinyCrypt with mbedTLS for crypto computations" + default y + depends on !BT_NIMBLE_ENABLED + select MBEDTLS_ECP_RESTARTABLE + select MBEDTLS_CMAC_C + help + Enable this option to choose mbedTLS instead of TinyCrypt for crypto + computations. + +menuconfig BT_LE_50_FEATURE_SUPPORT + bool "Enable BLE 5 feature" + depends on !BT_NIMBLE_ENABLED + default y + help + Enable BLE 5 feature + +config BT_LE_LL_CFG_FEAT_LE_2M_PHY + bool "Enable 2M Phy" + depends on BT_LE_50_FEATURE_SUPPORT + default y + help + Enable 2M-PHY + +config BT_LE_LL_CFG_FEAT_LE_CODED_PHY + bool "Enable coded Phy" + depends on BT_LE_50_FEATURE_SUPPORT + default y + help + Enable coded-PHY + +config BT_LE_EXT_ADV + bool "Enable extended advertising" + depends on BT_LE_50_FEATURE_SUPPORT + default n + help + Enable this option to do extended advertising. Extended advertising + will be supported from BLE 5.0 onwards. + +if BT_LE_EXT_ADV + config BT_LE_MAX_EXT_ADV_INSTANCES + int "Maximum number of extended advertising instances." + range 0 4 + default 1 if BT_LE_EXT_ADV + default 0 + depends on BT_LE_EXT_ADV + help + Change this option to set maximum number of extended advertising + instances. Minimum there is always one instance of + advertising. Enter how many more advertising instances you + want. + + config BT_LE_EXT_ADV_MAX_SIZE + int "Maximum length of the advertising data." + range 0 1650 + default 1650 if BT_LE_EXT_ADV + default 0 + depends on BT_LE_EXT_ADV + help + Defines the length of the extended adv data. The value should not + exceed 1650. + + config BT_LE_ENABLE_PERIODIC_ADV + bool "Enable periodic advertisement." + default y + depends on BT_LE_EXT_ADV + help + Enable this option to start periodic advertisement. + + config BT_LE_PERIODIC_ADV_SYNC_TRANSFER + bool "Enable Transer Sync Events" + depends on BT_LE_ENABLE_PERIODIC_ADV + default y + help + This enables controller transfer periodic sync events to host + +endif + +config BT_LE_MAX_PERIODIC_SYNCS + int "Maximum number of periodic advertising syncs" + depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED + + range 0 8 if !IDF_TARGET_ESP32C2 + range 0 3 if IDF_TARGET_ESP32C2 + default 1 if BT_LE_ENABLE_PERIODIC_ADV + default 0 + help + Set this option to set the upper limit for number of periodic sync + connections. This should be less than maximum connections allowed by + controller. + +config BT_LE_MAX_PERIODIC_ADVERTISER_LIST + int "Maximum number of periodic advertiser list" + depends on BT_LE_50_FEATURE_SUPPORT && IDF_TARGET_ESP32C2 && !BT_NIMBLE_ENABLED + range 1 5 + default 5 if BT_LE_50_FEATURE_SUPPORT + help + Set this option to set the upper limit for number of periodic advertiser list. + +config BT_LE_WHITELIST_SIZE + int "BLE white list size" + range 1 5 if IDF_TARGET_ESP32C2 + default 5 if IDF_TARGET_ESP32C2 + depends on !BT_NIMBLE_ENABLED + + help + BLE list size + +config BT_LE_LL_DUP_SCAN_LIST_COUNT + int "BLE duplicate scan list count" + range 1 100 + default 20 + help + config the max count of duplicate scan list + +config BT_LE_LL_SCA + int "BLE Sleep clock accuracy" + range 0 500 + default 60 + help + Sleep clock accuracy of our device (in ppm) + +config BT_LE_MAX_CONNECTIONS + int "Maximum number of concurrent connections" + depends on !BT_NIMBLE_ENABLED + range 1 8 if IDF_TARGET_ESP32H2 + default 3 if IDF_TARGET_ESP32H2 + range 1 2 if IDF_TARGET_ESP32C2 + default 2 if IDF_TARGET_ESP32C2 + help + Defines maximum number of concurrent BLE connections. For ESP32, user + is expected to configure BTDM_CTRL_BLE_MAX_CONN from controller menu + along with this option. Similarly for ESP32-C3 or ESP32-S3, user is expected to + configure BT_CTRL_BLE_MAX_ACT from controller menu. + + +choice BT_LE_COEX_PHY_CODED_TX_RX_TLIM + prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection" + default BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS + depends on !BT_NIMBLE_ENABLED + help + When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to + better avoid dramatic performance deterioration of Wi-Fi. + + config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN + bool "Force Enable" + help + Always enable the limitation on max tx/rx time for Coded-PHY connection + + config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS + bool "Force Disable" + help + Disable the limitation on max tx/rx time for Coded-PHY connection +endchoice + +config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF + int + default 0 if !BT_NIMBLE_ENABLED + default 1 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN + default 0 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS diff --git a/components/bt/controller/esp32c2/bt.c b/components/bt/controller/esp32c2/bt.c new file mode 100644 index 0000000000..83243595cc --- /dev/null +++ b/components/bt/controller/esp32c2/bt.c @@ -0,0 +1,1001 @@ +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +#include "esp_random.h" +#include + +#include "sdkconfig.h" + +#include "os/os.h" +#include "sysinit/sysinit.h" +#include "nimble/nimble_port.h" +#include "nimble/nimble_port_freertos.h" + +#ifdef ESP_PLATFORM +#include "esp_log.h" +#endif + +#if CONFIG_SW_COEXIST_ENABLE +#include "esp_coexist_internal.h" +#endif + +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART +#include "transport/uart/ble_hci_uart.h" +#else +#include "transport/ram/ble_hci_ram.h" +#endif +#include "nimble/ble_hci_trans.h" + +#include "nimble/nimble_npl_os.h" +#include "esp_bt.h" +#include "esp_intr_alloc.h" +#include "nimble/nimble_npl_os.h" +#include "esp_sleep.h" +#include "esp_pm.h" +#include "esp_phy_init.h" +#include "soc/syscon_reg.h" +#include "soc/modem_clkrst_reg.h" +#include "esp_private/periph_ctrl.h" +#include "hal/hal_uart.h" +#ifdef CONFIG_BT_BLUEDROID_ENABLED +#include "hci/hci_hal.h" +#endif + +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" + +#include "esp_private/periph_ctrl.h" + +/* Macro definition + ************************************************************************ + */ + +#define NIMBLE_PORT_LOG_TAG "BLE_INIT" +#define OSI_COEX_VERSION 0x00010006 +#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD + +#define EXT_FUNC_VERSION 0x20220125 +#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 + +/* Types definition + ************************************************************************ + */ + +struct osi_coex_funcs_t { + uint32_t _magic; + uint32_t _version; + void (* _coex_wifi_sleep_set)(bool sleep); + int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high); + void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status); + void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status); +}; + +struct ext_funcs_t { + uint32_t ext_version; + int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle); + int (*_esp_intr_free)(void **ret_handle); + void *(* _malloc)(size_t size); + void (*_free)(void *p); + void (*_hal_uart_start_tx)(int); + int (*_hal_uart_init_cbs)(int, hal_uart_tx_char, hal_uart_tx_done, hal_uart_rx_char, void *); + int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, enum hal_uart_parity, enum hal_uart_flow_ctl); + int (*_hal_uart_close)(int); + void (*_hal_uart_blocking_tx)(int, uint8_t); + int (*_hal_uart_init)(int, void *); + int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); + void (* _task_delete)(void *task_handle); + void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2); + uint32_t (* _os_random)(void); + int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv); + int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey); + void (* _esp_reset_rpa_moudle)(void); + uint32_t magic; +}; + + +/* External functions or variables + ************************************************************************ + */ + +extern int ble_plf_set_log_level(int level); +extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs); +extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high); +extern int ble_controller_init(struct esp_bt_controller_config_t *cfg); +extern int ble_controller_deinit(void); +extern int ble_controller_enable(uint8_t mode); +extern int ble_controller_disable(void); +extern int esp_register_ext_funcs (struct ext_funcs_t *); +extern void esp_unregister_ext_funcs (void); +extern int esp_ble_ll_set_public_addr(const uint8_t *addr); +extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func); +extern void esp_unregister_npl_funcs (void); +extern void npl_freertos_mempool_deinit(void); +extern void bt_bb_v2_init_cmplx(uint8_t i); +extern int os_msys_buf_alloc(void); +extern uint32_t r_os_cputime_get32(void); +extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks); +extern void r_ble_ll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled); +extern int os_msys_init(void); +extern void os_msys_buf_free(void); + +/* Local Function Declaration + ********************************************************************* + */ +static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status); +static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); +static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); +static void task_delete_wrapper(void *task_handle); +static void hal_uart_start_tx_wrapper(int uart_no); +static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func, + hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg); +static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, + enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl); +static int hal_uart_close_wrapper(int uart_no); +static void hal_uart_blocking_tx_wrapper(int port, uint8_t data); +static int hal_uart_init_wrapper(int uart_no, void *cfg); +static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in); +static int esp_intr_free_wrapper(void **ret_handle); +static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2); +static uint32_t osi_random_wrapper(void); +static void esp_reset_rpa_moudle(void); + +extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, + const uint8_t *peer_pub_key_y, + const uint8_t *our_priv_key, uint8_t *out_dhkey); +extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv); +/* Local variable definition + *************************************************************************** + */ + +/* Static variable declare */ +static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; +static bool s_is_sleep_state = false; + +#ifdef CONFIG_PM_ENABLE +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER +uint32_t s_sleep_tick; +#endif +#endif + +#ifdef CONFIG_PM_ENABLE +static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr = NULL; +static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL; +static bool s_pm_lock_acquired = true; +static DRAM_ATTR bool s_btdm_allow_light_sleep; +// pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock +static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock; +static void btdm_slp_tmr_callback(void *arg); +#define BTDM_MIN_TIMER_UNCERTAINTY_US (200) +#endif /* #ifdef CONFIG_PM_ENABLE */ + +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER +#define BLE_RTC_DELAY_US (1100) +#else +#define BLE_RTC_DELAY_US (0) +#endif + +static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = { + ._magic = OSI_COEX_MAGIC_VALUE, + ._version = OSI_COEX_VERSION, + ._coex_wifi_sleep_set = NULL, + ._coex_core_ble_conn_dyn_prio_get = NULL, + ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper, + ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper, +}; + +struct ext_funcs_t ext_funcs_ro = { + .ext_version = EXT_FUNC_VERSION, + ._esp_intr_alloc = esp_intr_alloc_wrapper, + ._esp_intr_free = esp_intr_free_wrapper, + ._malloc = malloc, + ._free = free, + ._hal_uart_start_tx = hal_uart_start_tx_wrapper, + ._hal_uart_init_cbs = hal_uart_init_cbs_wrapper, + ._hal_uart_config = hal_uart_config_wrapper, + ._hal_uart_close = hal_uart_close_wrapper, + ._hal_uart_blocking_tx = hal_uart_blocking_tx_wrapper, + ._hal_uart_init = hal_uart_init_wrapper, + ._task_create = task_create_wrapper, + ._task_delete = task_delete_wrapper, + ._osi_assert = osi_assert_wrapper, + ._os_random = osi_random_wrapper, + ._ecc_gen_key_pair = ble_sm_alg_gen_key_pair, + ._ecc_gen_dh_key = ble_sm_alg_gen_dhkey, + ._esp_reset_rpa_moudle = esp_reset_rpa_moudle, + .magic = EXT_FUNC_MAGIC_VALUE, +}; + +static void IRAM_ATTR esp_reset_rpa_moudle(void) +{ + periph_module_reset(PERIPH_MODEM_RPA_MODULE); +} + +static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2) +{ + ESP_LOGE(NIMBLE_PORT_LOG_TAG, "BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2); + assert(0); +} + +static uint32_t IRAM_ATTR osi_random_wrapper(void) +{ + return esp_random(); +} + +static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status) +{ +#if CONFIG_SW_COEXIST_ENABLE + coex_schm_status_bit_set(type, status); +#endif +} + +static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status) +{ +#if CONFIG_SW_COEXIST_ENABLE + coex_schm_status_bit_clear(type, status); +#endif +} +#ifdef CONFIG_BT_BLUEDROID_ENABLED +bool esp_vhci_host_check_send_available(void) +{ + if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return false; + } + return true; +} + +/** + * Allocates an mbuf for use by the nimble host. + */ +static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space) +{ + struct os_mbuf *om; + int rc; + + om = os_msys_get_pkthdr(0, 0); + if (om == NULL) { + return NULL; + } + + if (om->om_omp->omp_databuf_len < leading_space) { + rc = os_mbuf_free_chain(om); + assert(rc == 0); + return NULL; + } + + om->om_data += leading_space; + + return om; +} + +/** + * Allocates an mbuf suitable for an HCI ACL data packet. + * + * @return An empty mbuf on success; null on memory + * exhaustion. + */ +struct os_mbuf *ble_hs_mbuf_acl_pkt(void) +{ + return ble_hs_mbuf_gen_pkt(4 + 1); +} + +void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) +{ + if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return; + } + + if (*(data) == DATA_TYPE_COMMAND) { + struct ble_hci_cmd *cmd = NULL; + cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); + memcpy((uint8_t *)cmd, data + 1, len - 1); + ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); + } + + if (*(data) == DATA_TYPE_ACL) { + struct os_mbuf *om = os_msys_get_pkthdr(0, 0); + assert(om); + memcpy(om->om_data, &data[1], len - 1); + om->om_len = len - 1; + OS_MBUF_PKTHDR(om)->omp_len = len - 1; + ble_hci_trans_hs_acl_tx(om); + } + +} + +esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) +{ + if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return ESP_FAIL; + } + + ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); + + return ESP_OK; +} + +#endif +static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) +{ + return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY)); +} + +static void task_delete_wrapper(void *task_handle) +{ + vTaskDelete(task_handle); +} + +static void hal_uart_start_tx_wrapper(int uart_no) +{ +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hal_uart_start_tx(uart_no); +#endif +} + +static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func, + hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg) +{ + int rc = -1; +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + rc = hal_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); +#endif + return rc; +} + +static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, + enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl) +{ + int rc = -1; +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + rc = hal_uart_config(uart_no, speed, databits, stopbits, parity, flow_ctl); +#endif + return rc; +} + +static int hal_uart_close_wrapper(int uart_no) +{ + int rc = -1; +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + rc = hal_uart_close(uart_no); +#endif + return rc; +} + +static void hal_uart_blocking_tx_wrapper(int port, uint8_t data) +{ +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hal_uart_blocking_tx(port, data); +#endif +} + +static int hal_uart_init_wrapper(int uart_no, void *cfg) +{ + int rc = -1; +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART + rc = hal_uart_init(uart_no, cfg); +#endif + return rc; +} + +static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in) +{ + int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in); + return rc; +} + +static int esp_intr_free_wrapper(void **ret_handle) +{ + int rc = 0; + rc = esp_intr_free((intr_handle_t) * ret_handle); + *ret_handle = NULL; + return rc; +} + +IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg) +{ + if (s_is_sleep_state) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "sleep state error"); + assert(0); + } + s_is_sleep_state = true; +#ifdef CONFIG_PM_ENABLE +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + uint32_t tick_invalid = *(uint32_t *)(arg); + if (!tick_invalid) { + s_sleep_tick = r_os_cputime_get32(); + assert(enable_tick >= s_sleep_tick); + // start a timer to wake up and acquire the pm_lock before modem_sleep awakes + uint32_t us_to_sleep = os_cputime_ticks_to_usecs(enable_tick - s_sleep_tick); + assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US); + if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US) != ESP_OK) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "timer start failed"); + } + } +#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + if (s_pm_lock_acquired) { + esp_pm_lock_release(s_pm_lock); + s_pm_lock_acquired = false; + } + +#endif // CONFIG_PM_ENABLE +} + +IRAM_ATTR void controller_wakeup_cb(void *arg) +{ + if (!s_is_sleep_state) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up state error"); + assert(0); + } + s_is_sleep_state = false; + +// need to check if need to call pm lock here +#ifdef CONFIG_PM_ENABLE + if (!s_pm_lock_acquired) { + s_pm_lock_acquired = true; + esp_pm_lock_acquire(s_pm_lock); + } +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_TIMER) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up source %d", esp_sleep_get_wakeup_cause()); + } +#endif +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER + if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_BT) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up source %d", esp_sleep_get_wakeup_cause()); + } +#endif +#endif +} + +#ifdef CONFIG_PM_ENABLE +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER +static void btdm_slp_tmr_callback(void *arg) +{ + (void)(arg); + if (!s_pm_lock_acquired) { + s_pm_lock_acquired = true; + esp_pm_lock_acquire(s_pm_lock); + } +} + +#endif +#endif // CONFIG_PM_ENABLE + +void controller_sleep_init(void) +{ +#ifdef CONFIG_NIMBLE_SLEEP_ENABLE + s_is_sleep_state = false; +#ifdef CONFIG_PM_ENABLE + s_btdm_allow_light_sleep = true; +#endif // CONFIG_PM_ENABLE + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled"); + // register sleep callbacks + r_ble_ll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US); +#else +#ifdef CONFIG_PM_ENABLE + s_btdm_allow_light_sleep = false; +#endif // CONFIG_PM_ENABLE +#endif // CONFIG_NIMBLE_SLEEP_ENABLE + + // enable light sleep +#ifdef CONFIG_PM_ENABLE + if (!s_btdm_allow_light_sleep) { + if (esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btnosleep", &s_light_sleep_pm_lock) != ESP_OK) { + goto error; + } + } + if (esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock) != ESP_OK) { + goto error; + } +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + esp_timer_create_args_t create_args = { + .callback = btdm_slp_tmr_callback, + .arg = NULL, + .name = "btSlp" + }; + if ( esp_timer_create(&create_args, &s_btdm_slp_tmr) != ESP_OK) { + goto error; + } + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "light sleep enable success, CPU RTC timer wake up"); +#endif //CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER + esp_sleep_enable_bt_wakeup(); + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "light sleep enable success, BLE RTC timer wake up"); +#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER + + s_pm_lock_acquired = true; + + if (!s_btdm_allow_light_sleep) { + esp_pm_lock_acquire(s_light_sleep_pm_lock); + } + if (s_pm_lock) { + esp_pm_lock_acquire(s_pm_lock); + } + + return; + +error: + if (!s_btdm_allow_light_sleep) { + if (s_light_sleep_pm_lock != NULL) { + esp_pm_lock_delete(s_light_sleep_pm_lock); + s_light_sleep_pm_lock = NULL; + } + } + if (s_pm_lock != NULL) { + esp_pm_lock_delete(s_pm_lock); + s_pm_lock = NULL; + } +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + if (s_btdm_slp_tmr != NULL) { + esp_timer_delete(s_btdm_slp_tmr); + s_btdm_slp_tmr = NULL; + } +#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER + esp_sleep_disable_bt_wakeup(); +#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER +#endif + +} + +void controller_sleep_deinit(void) +{ +#ifdef CONFIG_PM_ENABLE + if (!s_btdm_allow_light_sleep) { + if (s_light_sleep_pm_lock != NULL) { + esp_pm_lock_delete(s_light_sleep_pm_lock); + s_light_sleep_pm_lock = NULL; + } + } + if (s_pm_lock != NULL) { + esp_pm_lock_delete(s_pm_lock); + s_pm_lock = NULL; + } +#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER + if (s_btdm_slp_tmr != NULL) { + esp_timer_stop(s_btdm_slp_tmr); + esp_timer_delete(s_btdm_slp_tmr); + s_btdm_slp_tmr = NULL; + } +#endif + s_pm_lock_acquired = false; +#endif + +} + +void ble_rtc_clk_init(void) +{ + // modem_clkrst_reg + // LP_TIMER_SEL_XTAL32K -> 0 + // LP_TIMER_SEL_XTAL -> 1 + // LP_TIMER_SEL_8M -> 0 + // LP_TIMER_SEL_RTC_SLOW -> 0 + // LP_TIMER_CLK_DIV_NUM -> 1250 + SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S); + SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S); + SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S); + SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S); + SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S); + + // MODEM_CLKRST_ETM_CLK_ACTIVE -> 1 + // MODEM_CLKRST_ETM_CLK_SEL -> 0 + SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 1, MODEM_CLKRST_ETM_CLK_ACTIVE_S); + SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S); + +} + + +esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg) +{ + if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state"); + return ESP_FAIL; + } + if (cfg == NULL) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL"); + return ESP_ERR_INVALID_ARG; + } + + ble_rtc_clk_init(); + + if (esp_register_ext_funcs(&ext_funcs_ro) != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed"); + return ESP_ERR_INVALID_ARG; + } + + /* Initialize the function pointers for OS porting */ + npl_freertos_funcs_init(); + + struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get(); + if (!p_npl_funcs) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed"); + return ESP_ERR_INVALID_ARG; + } + + if (esp_register_npl_funcs(p_npl_funcs) != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed"); + return ESP_ERR_INVALID_ARG; + } + + if (npl_freertos_mempool_init() != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed"); + return ESP_ERR_INVALID_ARG; + } + + /* Initialize the global memory pool */ + if (os_msys_buf_alloc() != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed"); + return ESP_ERR_INVALID_ARG; + } + + os_msys_init(); +#if CONFIG_BT_NIMBLE_ENABLED + // ble_npl_eventq_init() need to use npl function in rom and must be called after esp_bt_controller_init() + /* Initialize default event queue */ + ble_npl_eventq_init(nimble_port_get_dflt_eventq()); +#endif + periph_module_enable(PERIPH_BT_MODULE); + + // init phy + esp_phy_enable(); + + // init bb + bt_bb_v2_init_cmplx(1); + + if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed"); + return ESP_ERR_INVALID_ARG; + } + +#if CONFIG_SW_COEXIST_ENABLE + coex_init(); +#endif + int rc = ble_controller_init(cfg); + if (rc != 0) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", rc); + return ESP_ERR_NO_MEM; + } + + controller_sleep_init(); + + uint8_t mac[6]; + ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT)); + + swap_in_place(mac, 6); + + esp_ble_ll_set_public_addr(mac); + + ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; +#ifdef CONFIG_BT_BLUEDROID_ENABLED + ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); +#endif + return ESP_OK; +} + +esp_err_t esp_bt_controller_deinit(void) +{ + if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) || (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state"); + return ESP_FAIL; + } + + controller_sleep_deinit(); + + if (ble_controller_deinit() != 0) { + return ESP_FAIL; + } +#if CONFIG_BT_NIMBLE_ENABLED + /* De-initialize default event queue */ + ble_npl_eventq_deinit(nimble_port_get_dflt_eventq()); +#endif + os_msys_buf_free(); + + esp_unregister_npl_funcs(); + + esp_unregister_ext_funcs(); + + /* De-initialize npl functions */ + npl_freertos_funcs_deinit(); + + npl_freertos_mempool_deinit(); + + esp_phy_disable(); + + ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; + + return ESP_OK; +} + +esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode) +{ + if (mode != ESP_BT_MODE_BLE) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode"); + return ESP_FAIL; + } + if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state"); + return ESP_FAIL; + } +#if CONFIG_SW_COEXIST_ENABLE + coex_enable(); +#endif + if (ble_controller_enable(mode) != 0) { + return ESP_FAIL; + } + ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED; + return ESP_OK; +} + +esp_err_t esp_bt_controller_disable(void) +{ + if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state"); + return ESP_FAIL; + } + if (ble_controller_disable() != 0) { + return ESP_FAIL; + } + ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; + return ESP_OK; +} + +esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode) +{ + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__); + return ESP_OK; +} + +esp_err_t esp_bt_mem_release(esp_bt_mode_t mode) +{ + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__); + return ESP_OK; +} + + +esp_bt_controller_status_t esp_bt_controller_get_status(void) +{ + return ble_controller_status; +} + +/* extra functions */ +esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level) +{ + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__); + return ESP_OK; +} + +esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type) +{ + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__); + return ESP_PWR_LVL_N0; +} + +#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true) + +#define BLE_SM_KEY_ERR 0x17 + +#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS +#include "mbedtls/aes.h" + +#if CONFIG_BT_LE_SM_SC +#include "mbedtls/cipher.h" +#include "mbedtls/entropy.h" +#include "mbedtls/ctr_drbg.h" +#include "mbedtls/cmac.h" +#include "mbedtls/ecdh.h" +#include "mbedtls/ecp.h" +#endif + +#else +#include "tinycrypt/aes.h" +#include "tinycrypt/constants.h" +#include "tinycrypt/utils.h" + +#if CONFIG_BT_LE_SM_SC +#include "tinycrypt/cmac_mode.h" +#include "tinycrypt/ecc_dh.h" +#endif + +#endif + +#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS +#if CONFIG_BT_LE_SM_SC +static mbedtls_ecp_keypair keypair; +#endif +#endif + +int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y, + const uint8_t *our_priv_key, uint8_t *out_dhkey) +{ + uint8_t dh[32]; + uint8_t pk[64]; + uint8_t priv[32]; + int rc = BLE_SM_KEY_ERR; + + swap_buf(pk, peer_pub_key_x, 32); + swap_buf(&pk[32], peer_pub_key_y, 32); + swap_buf(priv, our_priv_key, 32); + +#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS + struct mbedtls_ecp_point pt = {0}, Q = {0}; + mbedtls_mpi z = {0}, d = {0}; + mbedtls_ctr_drbg_context ctr_drbg = {0}; + mbedtls_entropy_context entropy = {0}; + + uint8_t pub[65] = {0}; + /* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */ + pub[0] = 0x04; + memcpy(&pub[1], pk, 64); + + /* Initialize the required structures here */ + mbedtls_ecp_point_init(&pt); + mbedtls_ecp_point_init(&Q); + mbedtls_ctr_drbg_init(&ctr_drbg); + mbedtls_entropy_init(&entropy); + mbedtls_mpi_init(&d); + mbedtls_mpi_init(&z); + + /* Below 3 steps are to validate public key on curve secp256r1 */ + if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) { + goto exit; + } + + if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) { + goto exit; + } + + if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) { + goto exit; + } + + /* Set PRNG */ + if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy, + NULL, 0)) != 0) { + goto exit; + } + + /* Prepare point Q from pub key */ + if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) { + goto exit; + } + + if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) { + goto exit; + } + + rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d, + mbedtls_ctr_drbg_random, &ctr_drbg); + if (rc != 0) { + goto exit; + } + + rc = mbedtls_mpi_write_binary(&z, dh, 32); + if (rc != 0) { + goto exit; + } + +exit: + mbedtls_ecp_point_free(&pt); + mbedtls_mpi_free(&z); + mbedtls_mpi_free(&d); + mbedtls_ecp_point_free(&Q); + mbedtls_entropy_free(&entropy); + mbedtls_ctr_drbg_free(&ctr_drbg); + if (rc != 0) { + return BLE_SM_KEY_ERR; + } + +#else + if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) { + return BLE_SM_KEY_ERR; + } + + rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1); + if (rc == TC_CRYPTO_FAIL) { + return BLE_SM_KEY_ERR; + } +#endif + + swap_buf(out_dhkey, dh, 32); + return 0; +} + +/* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */ +static const uint8_t ble_sm_alg_dbg_priv_key[32] = { + 0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3, + 0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99, + 0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd +}; + +#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS +static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key) +{ + int rc = BLE_SM_KEY_ERR; + mbedtls_entropy_context entropy = {0}; + mbedtls_ctr_drbg_context ctr_drbg = {0}; + + mbedtls_entropy_init(&entropy); + mbedtls_ctr_drbg_init(&ctr_drbg); + mbedtls_ecp_keypair_init(&keypair); + + if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy, + NULL, 0)) != 0) { + goto exit; + } + + if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair, + mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) { + goto exit; + } + + if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) { + goto exit; + } + + size_t olen = 0; + uint8_t pub[65] = {0}; + + if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp), &keypair.MBEDTLS_PRIVATE(Q), MBEDTLS_ECP_PF_UNCOMPRESSED, + &olen, pub, 65)) != 0) { + goto exit; + } + + memcpy(public_key, &pub[1], 64); + +exit: + mbedtls_ctr_drbg_free(&ctr_drbg); + mbedtls_entropy_free(&entropy); + if (rc != 0) { + mbedtls_ecp_keypair_free(&keypair); + return BLE_SM_KEY_ERR; + } + + return 0; +} +#endif + +/** + * pub: 64 bytes + * priv: 32 bytes + */ +int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv) +{ +#if CONFIG_BT_LE_SM_SC_DEBUG_KEYS + swap_buf(pub, ble_sm_alg_dbg_pub_key, 32); + swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32); + swap_buf(priv, ble_sm_alg_dbg_priv_key, 32); +#else + uint8_t pk[64]; + + do { + +#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS + if (mbedtls_gen_keypair(pk, priv) != 0) { + return BLE_SM_KEY_ERR; + } +#else + if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) { + return BLE_SM_KEY_ERR; + } +#endif + + /* Make sure generated key isn't debug key. */ + } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0); + + swap_buf(pub, pk, 32); + swap_buf(&pub[32], &pk[32], 32); + swap_in_place(priv, 32); +#endif + + return 0; +} + +#endif diff --git a/components/bt/controller/esp32h2/Kconfig.in b/components/bt/controller/esp32h2/Kconfig.in index e69de29bb2..6a2540f9b0 100644 --- a/components/bt/controller/esp32h2/Kconfig.in +++ b/components/bt/controller/esp32h2/Kconfig.in @@ -0,0 +1,304 @@ + +menu "HCI Config" + + choice BT_LE_HCI_INTERFACE + prompt "Select HCI interface" + default BT_LE_HCI_INTERFACE_USE_RAM + + config BT_LE_HCI_INTERFACE_USE_RAM + bool "ram" + help + Use RAM as HCI interface + config BT_LE_HCI_INTERFACE_USE_UART + bool "uart" + help + Use UART as HCI interface + endchoice + + config BT_LE_HCI_UART_PORT + int "HCI UART port" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 1 + help + Set the port number of HCI UART + + config BT_LE_HCI_UART_TX_PIN + int "HCI uart Tx gpio" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 19 + + config BT_LE_HCI_UART_RX_PIN + int "HCI uart Rx gpio" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 10 + + config BT_LE_HCI_UART_TASK_STACK_SIZE + int "HCI uart task stack size" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 1000 + help + Set the size of uart task stack + + config BT_LE_HCI_UART_BAUD + int "HCI uart baudrate" + depends on BT_LE_HCI_INTERFACE_USE_UART + default 921600 + help + HCI uart baud rate 115200 ~ 1000000 + +endmenu + +config BT_LE_CONTROLLER_TASK_STACK_SIZE + int "Controller task stack size" + default 5120 if BLE_MESH + default 4096 + help + This configures stack size of NimBLE controller task + +config BT_LE_LL_RESOLV_LIST_SIZE + int "BLE LL Resolving list size" + range 1 5 if IDF_TARGET_ESP32C2 + default 4 + help + Configure the size of resolving list used in link layer. + +menuconfig BT_LE_SECURITY_ENABLE + bool "Enable BLE SM feature" + depends on !BT_NIMBLE_ENABLED + default y + help + Enable BLE sm feature + +config BT_LE_SM_LEGACY + bool "Security manager legacy pairing" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable security manager legacy pairing + +config BT_LE_SM_SC + bool "Security manager secure connections (4.2)" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable security manager secure connections + +config BT_LE_SM_SC_DEBUG_KEYS + bool "Use predefined public-private key pair" + default n + depends on BT_LE_SECURITY_ENABLE && BT_LE_SM_SC + help + If this option is enabled, SM uses predefined DH key pair as described + in Core Specification, Vol. 3, Part H, 2.3.5.6.1. This allows to + decrypt air traffic easily and thus should only be used for debugging. + +config BT_LE_LL_CFG_FEAT_LE_ENCRYPTION + bool "Enable LE encryption" + depends on BT_LE_SECURITY_ENABLE + default y + help + Enable encryption connection + +menu "Memory Settings" + depends on !BT_NIMBLE_ENABLED + config BT_LE_ACL_BUF_COUNT + int "ACL Buffer count" + default 24 + help + The number of ACL data buffers. + + config BT_LE_ACL_BUF_SIZE + int "ACL Buffer size" + default 255 + help + This is the maximum size of the data portion of HCI ACL data packets. + It does not include the HCI data header (of 4 bytes) + + config BT_LE_HCI_EVT_BUF_SIZE + int "HCI Event Buffer size" + default 257 if BT_LE_EXT_ADV + default 70 + help + This is the size of each HCI event buffer in bytes. In case of + extended advertising, packets can be fragmented. 257 bytes is the + maximum size of a packet. + + config BT_LE_HCI_EVT_HI_BUF_COUNT + int "High Priority HCI Event Buffer count" + default 30 + help + This is the high priority HCI events' buffer size. High-priority + event buffers are for everything except advertising reports. If there + are no free high-priority event buffers then host will try to allocate a + low-priority buffer instead + + config BT_LE_HCI_EVT_LO_BUF_COUNT + int "Low Priority HCI Event Buffer count" + default 8 + help + This is the low priority HCI events' buffer size. Low-priority event + buffers are only used for advertising reports. If there are no free + low-priority event buffers, then an incoming advertising report will + get dropped +endmenu + +config BT_LE_CRYPTO_STACK_MBEDTLS + bool "Override TinyCrypt with mbedTLS for crypto computations" + default y + depends on !BT_NIMBLE_ENABLED + select MBEDTLS_ECP_RESTARTABLE + select MBEDTLS_CMAC_C + help + Enable this option to choose mbedTLS instead of TinyCrypt for crypto + computations. + +menuconfig BT_LE_50_FEATURE_SUPPORT + bool "Enable BLE 5 feature" + depends on !BT_NIMBLE_ENABLED + default y + help + Enable BLE 5 feature + +config BT_LE_LL_CFG_FEAT_LE_2M_PHY + bool "Enable 2M Phy" + depends on BT_LE_50_FEATURE_SUPPORT + default y + help + Enable 2M-PHY + +config BT_LE_LL_CFG_FEAT_LE_CODED_PHY + bool "Enable coded Phy" + depends on BT_LE_50_FEATURE_SUPPORT + default y + help + Enable coded-PHY + +config BT_LE_EXT_ADV + bool "Enable extended advertising" + depends on BT_LE_50_FEATURE_SUPPORT + default n + help + Enable this option to do extended advertising. Extended advertising + will be supported from BLE 5.0 onwards. + +if BT_LE_EXT_ADV + config BT_LE_MAX_EXT_ADV_INSTANCES + int "Maximum number of extended advertising instances." + range 0 4 + default 1 if BT_LE_EXT_ADV + default 0 + depends on BT_LE_EXT_ADV + help + Change this option to set maximum number of extended advertising + instances. Minimum there is always one instance of + advertising. Enter how many more advertising instances you + want. + + config BT_LE_EXT_ADV_MAX_SIZE + int "Maximum length of the advertising data." + range 0 1650 + default 1650 if BT_LE_EXT_ADV + default 0 + depends on BT_LE_EXT_ADV + help + Defines the length of the extended adv data. The value should not + exceed 1650. + + config BT_LE_ENABLE_PERIODIC_ADV + bool "Enable periodic advertisement." + default y + depends on BT_LE_EXT_ADV + help + Enable this option to start periodic advertisement. + + config BT_LE_PERIODIC_ADV_SYNC_TRANSFER + bool "Enable Transer Sync Events" + depends on BT_LE_ENABLE_PERIODIC_ADV + default y + help + This enables controller transfer periodic sync events to host + +endif + +config BT_LE_MAX_PERIODIC_SYNCS + int "Maximum number of periodic advertising syncs" + depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED + + range 0 8 if !IDF_TARGET_ESP32C2 + range 0 3 if IDF_TARGET_ESP32C2 + default 1 if BT_LE_ENABLE_PERIODIC_ADV + default 0 + help + Set this option to set the upper limit for number of periodic sync + connections. This should be less than maximum connections allowed by + controller. + +config BT_LE_MAX_PERIODIC_ADVERTISER_LIST + int "Maximum number of periodic advertiser list" + depends on BT_LE_50_FEATURE_SUPPORT && IDF_TARGET_ESP32C2 && !BT_NIMBLE_ENABLED + range 1 5 + default 5 if BT_LE_50_FEATURE_SUPPORT + help + Set this option to set the upper limit for number of periodic advertiser list. + +config BT_LE_WHITELIST_SIZE + int "BLE white list size" + range 1 5 if IDF_TARGET_ESP32C2 + default 5 if IDF_TARGET_ESP32C2 + depends on !BT_NIMBLE_ENABLED + + help + BLE list size + +config BT_LE_LL_DUP_SCAN_LIST_COUNT + int "BLE duplicate scan list count" + range 1 100 + default 20 + help + config the max count of duplicate scan list + +config BT_LE_LL_SCA + int "BLE Sleep clock accuracy" + range 0 500 + default 60 + help + Sleep clock accuracy of our device (in ppm) + +config BT_LE_MAX_CONNECTIONS + int "Maximum number of concurrent connections" + depends on !BT_NIMBLE_ENABLED + range 1 8 if IDF_TARGET_ESP32H2 + default 3 if IDF_TARGET_ESP32H2 + range 1 2 if IDF_TARGET_ESP32C2 + default 2 if IDF_TARGET_ESP32C2 + help + Defines maximum number of concurrent BLE connections. For ESP32, user + is expected to configure BTDM_CTRL_BLE_MAX_CONN from controller menu + along with this option. Similarly for ESP32-C3 or ESP32-S3, user is expected to + configure BT_CTRL_BLE_MAX_ACT from controller menu. + + +choice BT_LE_COEX_PHY_CODED_TX_RX_TLIM + prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection" + default BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS + depends on !BT_NIMBLE_ENABLED + help + When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to + better avoid dramatic performance deterioration of Wi-Fi. + + config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN + bool "Force Enable" + help + Always enable the limitation on max tx/rx time for Coded-PHY connection + + config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS + bool "Force Disable" + help + Disable the limitation on max tx/rx time for Coded-PHY connection +endchoice + +config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF + int + default 0 if !BT_NIMBLE_ENABLED + default 1 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN + default 0 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS diff --git a/components/bt/controller/esp32h2/bt.c b/components/bt/controller/esp32h2/bt.c index 78c721d757..c743c45edc 100644 --- a/components/bt/controller/esp32h2/bt.c +++ b/components/bt/controller/esp32h2/bt.c @@ -27,7 +27,7 @@ #include "esp_coexist_internal.h" #endif -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART #include "transport/uart/ble_hci_uart.h" #else #include "transport/ram/ble_hci_ram.h" @@ -91,11 +91,6 @@ struct ext_funcs_t { uint32_t magic; }; -struct ble_ll_trace_func_t { - void (*_ble_ll_trace_u32_func)(uint32_t id, uint32_t p1); - void (*_ble_ll_trace_u32x2_func)(uint32_t id, uint32_t p1, uint32_t p2); - void (*_ble_ll_trace_u32x3_func)(uint32_t id, uint32_t p1, uint32_t p2, uint32_t p3); -}; /* External functions or variables ************************************************************************ @@ -117,7 +112,6 @@ extern void npl_freertos_mempool_deinit(void); /* TX power */ int ble_txpwr_set(int power_type, int power_level); int ble_txpwr_get(int power_type); -extern void coex_pti_v2(void); extern void bt_bb_v2_init_cmplx(uint8_t i); extern int os_msys_buf_alloc(void); extern uint32_t r_os_cputime_get32(void); @@ -236,7 +230,7 @@ bool esp_vhci_host_check_send_available(void) if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { return false; } - return 1; + return true; } /** @@ -282,18 +276,16 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) return; } - if (*(data) == DATA_TYPE_COMMAND) - { - struct ble_hci_cmd *cmd = NULL; - cmd = (void *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); - memcpy((uint8_t *)cmd, data + 1, len - 1); - ble_hci_trans_hs_cmd_tx(cmd); + if (*(data) == DATA_TYPE_COMMAND) { + struct ble_hci_cmd *cmd = NULL; + cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); + memcpy((uint8_t *)cmd, data + 1, len - 1); + ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); } - if (*(data) == DATA_TYPE_ACL) - { + if (*(data) == DATA_TYPE_ACL) { struct os_mbuf *om = os_msys_get_pkthdr(0, 0); - assert(om); + assert(om); memcpy(om->om_data, &data[1], len - 1); om->om_len = len - 1; OS_MBUF_PKTHDR(om)->omp_len = len - 1; @@ -326,7 +318,7 @@ static void task_delete_wrapper(void *task_handle) static void hal_uart_start_tx_wrapper(int uart_no) { -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART hal_uart_start_tx(uart_no); #endif } @@ -335,7 +327,7 @@ static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func, hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg) { int rc = -1; -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART rc = hal_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); #endif return rc; @@ -345,7 +337,7 @@ static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl) { int rc = -1; -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART rc = hal_uart_config(uart_no, speed, databits, stopbits, parity, flow_ctl); #endif return rc; @@ -354,7 +346,7 @@ static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, static int hal_uart_close_wrapper(int uart_no) { int rc = -1; -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART rc = hal_uart_close(uart_no); #endif return rc; @@ -362,7 +354,7 @@ static int hal_uart_close_wrapper(int uart_no) static void hal_uart_blocking_tx_wrapper(int port, uint8_t data) { -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART hal_uart_blocking_tx(port, data); #endif } @@ -370,7 +362,7 @@ static void hal_uart_blocking_tx_wrapper(int port, uint8_t data) static int hal_uart_init_wrapper(int uart_no, void *cfg) { int rc = -1; -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART rc = hal_uart_init(uart_no, cfg); #endif return rc; @@ -531,10 +523,10 @@ error: esp_timer_delete(s_btdm_slp_tmr); s_btdm_slp_tmr = NULL; } -#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER +#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER #ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER esp_sleep_disable_bt_wakeup(); -#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER +#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER #endif } @@ -623,7 +615,7 @@ esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg) } #if CONFIG_SW_COEXIST_ENABLE - coex_enable(); + coex_init(); #endif if (ble_controller_init(cfg) != 0) { @@ -754,6 +746,11 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode) ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state"); return ESP_FAIL; } + +#if CONFIG_SW_COEXIST_ENABLE + coex_enable(); +#endif + if (ble_controller_enable(mode) != 0) { return ESP_FAIL; } diff --git a/components/bt/controller/lib_esp32c2/esp32c2-bt-lib b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib new file mode 160000 index 0000000000..5f1b106c75 --- /dev/null +++ b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib @@ -0,0 +1 @@ +Subproject commit 5f1b106c7501d3a61c5d084d6abf2824ae31b8e8 diff --git a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib index b595381e3c..4956cf810c 160000 --- a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib +++ b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib @@ -1 +1 @@ -Subproject commit b595381e3cb4cb4b34cbf9f0b18256553d0dea66 +Subproject commit 4956cf810cc7ef32fab78d814ce1e531e71967da diff --git a/components/bt/host/bluedroid/Kconfig.in b/components/bt/host/bluedroid/Kconfig.in index 71dd46ac61..828d0317da 100644 --- a/components/bt/host/bluedroid/Kconfig.in +++ b/components/bt/host/bluedroid/Kconfig.in @@ -26,245 +26,6 @@ config BT_BLUEDROID_PINNED_TO_CORE default 1 if BT_BLUEDROID_PINNED_TO_CORE_1 default 0 -config BT_BLE_CONTROLLER_ENABLED - bool "Enable BLE controller" - depends on SOC_ESP_NIMBLE_CONTROLLER - default y - help - Enable or Disable NimBLE controller - -choice BT_BLE_SELECT_HCI_INTERFACE - prompt "Select HCI interface" - depends on SOC_ESP_NIMBLE_CONTROLLER - default BT_BLE_CONTROL_USE_RAM_HCI - - config BT_BLE_CONTROL_USE_RAM_HCI - bool "ram" - help - Use RAM as HCI interface - config BT_BLE_CONTROL_USE_UART_HCI - bool "uart" - help - Use UART as HCI interface -endchoice - -config BT_BLE_HCI_EVT_BUF_SIZE - int "HCI Event Buffer size" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default 257 if BT_BLE_EXT_ADV - default 70 - help - This is the size of each HCI event buffer in bytes. In case of - extended advertising, packets can be fragmented. 257 bytes is the - maximum size of a packet. - -menuconfig BT_BLE_MEMORY_SETTINGS - bool "OS Memory Settings" - depends on SOC_ESP_NIMBLE_CONTROLLER - default y - help - Settings memory blocks - -config BT_BLE_MSYS_1_BLOCK_COUNT - int "MSYS_1 Block Count" - depends on BT_BLE_MEMORY_SETTINGS - default 12 - help - MSYS is a system level mbuf registry. For prepare write & prepare - responses MBUFs are allocated out of msys_1 pool. For NIMBLE_MESH - enabled cases, this block count is increased by 8 than user defined - count. - -config BT_BLE_MSYS_1_BLOCK_SIZE - int "MSYS_1 Block Size" - depends on BT_BLE_MEMORY_SETTINGS - default 256 - help - Dynamic memory size of block 1 - -config BT_BLE_MSYS_2_BLOCK_COUNT - int "MSYS_2 Block Count" - depends on BT_BLE_MEMORY_SETTINGS - default 24 - help - Dynamic memory count - -config BT_BLE_MSYS_2_BLOCK_SIZE - int "MSYS_2 Block Size" - depends on BT_BLE_MEMORY_SETTINGS - default 320 - help - Dynamic memory size of block 2 - -config BT_BLE_LL_RESOLV_LIST_SIZE - int "BLE LL Resolving list size" - range 1 5 - default 5 - depends on SOC_ESP_NIMBLE_CONTROLLER - help - Configure the size of resolving list used in link layer. - - -config BT_BLE_HCI_EVT_HI_BUF_COUNT - int "High Priority HCI Event Buffer count" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default 30 - help - This is the high priority HCI events' buffer size. High-priority - event buffers are for everything except advertising reports. If there - are no free high-priority event buffers then host will try to allocate a - low-priority buffer instead - -config BT_BLE_HCI_EVT_LO_BUF_COUNT - int "Low Priority HCI Event Buffer count" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default 8 - help - This is the low priority HCI events' buffer size. Low-priority event - buffers are only used for advertising reports. If there are no free - low-priority event buffers, then an incoming advertising report will - get dropped - -config BT_BLE_LL_DUP_SCAN_LIST_COUNT - int "BLE duplicate scan list count" - range 1 20 - default 10 - depends on SOC_ESP_NIMBLE_CONTROLLER - help - config the max count of duplicate scan list - -config BT_BLE_MAX_CONNECTIONS - int "Maximum number of concurrent connections" - range 1 2 if ( SOC_ESP_NIMBLE_CONTROLLER) - default 2 - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - help - Defines maximum number of concurrent BLE connections. For ESP32, user - is expected to configure BTDM_CTRL_BLE_MAX_CONN from controller menu - along with this option. Similarly for ESP32-C3 or ESP32-S3, user is expected to - configure BT_CTRL_BLE_MAX_ACT from controller menu. - -config BT_BLE_ACL_BUF_COUNT - int "ACL Buffer count" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default 24 - help - The number of ACL data buffers. - -config BT_BLE_ACL_BUF_SIZE - int "ACL Buffer size" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default 251 - help - This is the maximum size of the data portion of HCI ACL data packets. - It does not include the HCI data header (of 4 bytes) - -config BT_BLE_HCI_UART_PORT - int "HCI UART port" - depends on BT_BLE_USE_UART_HCI - default 1 - help - Set the port number of HCI UART - -config BT_BLE_HCI_UART_BAUD - int "HCI uart baudrate" - depends on BT_BLE_USE_UART_HCI - default 921600 - help - HCI uart baud rate 115200 ~ 1000000 - -config BT_BLE_SLEEP_ENABLE - bool "Enable BLE sleep" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - default n - help - Enable BLE sleep - - -choice BT_BLE_COEX_PHY_CODED_TX_RX_TLIM - prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection" - default BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_DIS - depends on ESP32_WIFI_SW_COEXIST_ENABLE && (BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) - help - When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to - better avoid dramatic performance deterioration of Wi-Fi. - - config BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EN - bool "Force Enable" - help - Always enable the limitation on max tx/rx time for Coded-PHY connection - - config BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_DIS - bool "Force Disable" - help - Disable the limitation on max tx/rx time for Coded-PHY connection -endchoice - -config BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EFF - int - default 0 if !(ESP32_WIFI_SW_COEXIST_ENABLE && (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)) - default 1 if BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EN - default 0 if BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_DIS - -config BT_BLE_MAX_BONDS - int "Maximum number of bonds to save across reboots" - default 3 - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - help - Defines maximum number of bonds to save for peer security and our security - - -config BT_BLE_WHITELIST_SIZE - int "BLE white list size" - depends on BT_BLUEDROID_ENABLED && SOC_ESP_NIMBLE_CONTROLLER - range 1 5 - default 5 - help - BLE list size - -config BT_BLE_CONTROLLER_TASK_STACK_SIZE - int "NimBLE Controller task stack size" - depends on (BT_BLUEDROID_ENABLED) && SOC_ESP_NIMBLE_CONTROLLER - default 5120 if BLE_MESH - default 4096 - help - This configures stack size of NimBLE controller task - -choice BT_BLE_MEM_ALLOC_MODE - prompt "Memory allocation strategy" - default BT_BLE_MEM_ALLOC_MODE_INTERNAL - depends on SOC_ESP_NIMBLE_CONTROLLER - help - Allocation strategy for NimBLE host stack, essentially provides ability to - allocate all required dynamic allocations from, - - - Internal DRAM memory only - - External SPIRAM memory only - - Either internal or external memory based on default malloc() - behavior in ESP-IDF - - Internal IRAM memory wherever applicable else internal DRAM - - config BT_BLE_MEM_ALLOC_MODE_INTERNAL - bool "Internal memory" - - config BT_BLE_MEM_ALLOC_MODE_EXTERNAL - bool "External SPIRAM" - depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC - - config BT_BLE_MEM_ALLOC_MODE_DEFAULT - bool "Default alloc mode" - - config BT_BLE_MEM_ALLOC_MODE_IRAM_8BIT - bool "Internal IRAM" - depends on ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY - help - Allows to use IRAM memory region as 8bit accessible region. - - Every unaligned (8bit or 16bit) access will result in an exception - and incur penalty of certain clock cycles per unaligned read/write. - -endchoice #BT_BLE_MEM_ALLOC_MODE - config BT_BTU_TASK_STACK_SIZE int "Bluetooth Bluedroid Host Stack task stack size" depends on BT_BLUEDROID_ENABLED @@ -1323,7 +1084,7 @@ config BT_BLE_50_FEATURES_SUPPORTED config BT_BLE_42_FEATURES_SUPPORTED bool "Enable BLE 4.2 features" - depends on (BT_BLUEDROID_ENABLED && (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)) + depends on (BT_BLUEDROID_ENABLED && (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || SOC_ESP_NIMBLE_CONTROLLER)) default n help This enables BLE 4.2 features. diff --git a/components/bt/host/nimble/Kconfig.in b/components/bt/host/nimble/Kconfig.in index 2e8b5562b0..37db6e8466 100644 --- a/components/bt/host/nimble/Kconfig.in +++ b/components/bt/host/nimble/Kconfig.in @@ -1,32 +1,3 @@ -config BT_NIMBLE_CONTROLLER_ENABLED - bool "Enable NimBLE controller" - depends on BT_NIMBLE_ENABLED && IDF_TARGET_ESP32H2 - default y - help - Enable or Disable NimBLE controller - -config BT_NIMBLE_CONTROL_SEQUENCE_MODE_ENABLED - bool "Enable controller in sequence mode" - depends on BT_NIMBLE_CONTROLLER_ENABLED - default y - help - Enable or Disable controller sequence mode - -choice - prompt "Select HCI interface" - depends on BT_NIMBLE_ENABLED && IDF_TARGET_ESP32H2 - default BT_NIMBLE_CONTROL_USE_RAM_HCI - - config BT_NIMBLE_CONTROL_USE_RAM_HCI - bool "ram" - help - Use RAM as HCI interface - config BT_NIMBLE_CONTROL_USE_UART_HCI - bool "uart" - help - Use UART as HCI interface -endchoice - choice BT_NIMBLE_MEM_ALLOC_MODE prompt "Memory allocation strategy" @@ -91,55 +62,13 @@ config BT_NIMBLE_LOG_LEVEL default 3 if BT_NIMBLE_LOG_LEVEL_ERROR default 4 if BT_NIMBLE_LOG_LEVEL_NONE - -config BT_NIMBLE_HCI_UART_PORT - int "HCI UART port" - depends on BT_NIMBLE_USE_UART_HCI - default 1 - help - Set the port number of HCI UART - -config BT_NIMBLE_HCI_UART_TX_PIN - int "HCI uart Tx gpio" - depends on BT_NIMBLE_USE_UART_HCI - default 19 - -config BT_NIMBLE_HCI_UART_RX_PIN - int "HCI uart Rx gpio" - depends on BT_NIMBLE_USE_UART_HCI - default 10 - -config BT_NIMBLE_HCI_UART_TASK_STACK_SIZE - int "HCI uart task stack size" - depends on BT_NIMBLE_USE_UART_HCI - default 1000 - help - Set the size of uart task stack - -config BT_NIMBLE_HCI_UART_BAUD - int "HCI uart baudrate" - depends on BT_NIMBLE_USE_UART_HCI - default 921600 - help - HCI uart baud rate 115200 ~ 1000000 - -config BT_NIMBLE_RUN_QA_TEST - bool "Run QA test" - default y - help - Enable this option to run QA test. - -config BT_NIMBLE_RUN_BQB_TEST - bool "Run BQB test" - default n - help - Enable this option to run BQB test. - config BT_NIMBLE_MAX_CONNECTIONS int "Maximum number of concurrent connections" range 1 8 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2) + range 1 2 if IDF_TARGET_ESP32C2 range 1 9 if IDF_TARGET_ESP32 - default 3 + default 3 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2) + default 2 if IDF_TARGET_ESP32C2 depends on BT_NIMBLE_ENABLED help Defines maximum number of concurrent BLE connections. For ESP32, user @@ -226,21 +155,6 @@ config BT_NIMBLE_ROLE_OBSERVER help Enables observer role -config BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE - int "NimBLE Controller task stack size" - depends on BT_NIMBLE_ENABLED && IDF_TARGET_ESP32H2 - default 5120 if BLE_MESH - default 4096 - help - This configures stack size of NimBLE controller task - -config BT_NIMBLE_CONTROLLER_TASK_PRIORITY - int "NimBLE Controller task priority" - depends on BT_NIMBLE_ENABLED - default 23 - help - This configures priority of NimBLE controller task - config BT_NIMBLE_NVS_PERSIST bool "Persist the BLE Bonding keys in NVS" depends on BT_NIMBLE_ENABLED @@ -269,13 +183,14 @@ config BT_NIMBLE_SM_SC help Enable security manager secure connections -config BT_NIMBLE_DEBUG - bool "Enable extra runtime asserts and host debugging" +config BT_NIMBLE_SM_SC_DEBUG_KEYS + bool "Use predefined public-private key pair" default n - depends on BT_NIMBLE_ENABLED + depends on BT_NIMBLE_SECURITY_ENABLE && BT_NIMBLE_SM_SC help - This enables extra runtime asserts and host debugging - + If this option is enabled, SM uses predefined DH key pair as described + in Core Specification, Vol. 3, Part H, 2.3.5.6.1. This allows to + decrypt air traffic easily and thus should only be used for debugging. config BT_NIMBLE_LL_CFG_FEAT_LE_ENCRYPTION bool "Enable LE encryption" @@ -284,14 +199,12 @@ config BT_NIMBLE_LL_CFG_FEAT_LE_ENCRYPTION help Enable encryption connection -config BT_NIMBLE_SM_SC_DEBUG_KEYS - bool "Use predefined public-private key pair" +config BT_NIMBLE_DEBUG + bool "Enable extra runtime asserts and host debugging" default n - depends on BT_NIMBLE_SM_SC + depends on BT_NIMBLE_ENABLED help - If this option is enabled, SM uses predefined DH key pair as described - in Core Specification, Vol. 3, Part H, 2.3.5.6.1. This allows to - decrypt air traffic easily and thus should only be used for debugging. + This enables extra runtime asserts and host debugging config BT_NIMBLE_SVC_GAP_DEVICE_NAME string "BLE GAP default device name" @@ -323,87 +236,81 @@ config BT_NIMBLE_SVC_GAP_APPEARANCE help Standard BLE GAP Appearance value in HEX format e.g. 0x02C0 -config BT_NIMBLE_ACL_BUF_COUNT - int "ACL Buffer count" - depends on BT_NIMBLE_ENABLED - default 24 - help - The number of ACL data buffers. -config BT_NIMBLE_ACL_BUF_SIZE - int "ACL Buffer size" - depends on BT_NIMBLE_ENABLED - default 255 - help - This is the maximum size of the data portion of HCI ACL data packets. - It does not include the HCI data header (of 4 bytes) +menu "Memory Settings" + config BT_NIMBLE_MSYS_1_BLOCK_COUNT + int "MSYS_1 Block Count" + default 12 + help + MSYS is a system level mbuf registry. For prepare write & prepare + responses MBUFs are allocated out of msys_1 pool. For NIMBLE_MESH + enabled cases, this block count is increased by 8 than user defined + count. -config BT_NIMBLE_HCI_EVT_BUF_SIZE - int "HCI Event Buffer size" - depends on BT_NIMBLE_ENABLED - default 257 if BT_NIMBLE_EXT_ADV - default 70 - help - This is the size of each HCI event buffer in bytes. In case of - extended advertising, packets can be fragmented. 257 bytes is the - maximum size of a packet. + config BT_NIMBLE_MSYS_1_BLOCK_SIZE + int "MSYS_1 Block Size" + default 256 + help + Dynamic memory size of block 1 -config BT_NIMBLE_HCI_EVT_HI_BUF_COUNT - int "High Priority HCI Event Buffer count" - depends on BT_NIMBLE_ENABLED - default 30 - help - This is the high priority HCI events' buffer size. High-priority - event buffers are for everything except advertising reports. If there - are no free high-priority event buffers then host will try to allocate a - low-priority buffer instead + config BT_NIMBLE_MSYS_2_BLOCK_COUNT + int "MSYS_2 Block Count" + default 24 + help + Dynamic memory count -config BT_NIMBLE_HCI_EVT_LO_BUF_COUNT - int "Low Priority HCI Event Buffer count" - depends on BT_NIMBLE_ENABLED - default 8 - help - This is the low priority HCI events' buffer size. Low-priority event - buffers are only used for advertising reports. If there are no free - low-priority event buffers, then an incoming advertising report will - get dropped + config BT_NIMBLE_MSYS_2_BLOCK_SIZE + int "MSYS_2 Block Size" + default 320 + help + Dynamic memory size of block 2 -menuconfig BT_NIMBLE_MEMORY_SETTINGS - bool "OS Memory Settings" - default y - help - Settings memory blocks + config BT_NIMBLE_ACL_BUF_COUNT + int "ACL Buffer count" + depends on BT_NIMBLE_ENABLED + default 24 + help + The number of ACL data buffers. -config BT_NIMBLE_MSYS_1_BLOCK_COUNT - int "MSYS_1 Block Count" - depends on BT_NIMBLE_MEMORY_SETTINGS - default 12 - help - MSYS is a system level mbuf registry. For prepare write & prepare - responses MBUFs are allocated out of msys_1 pool. For NIMBLE_MESH - enabled cases, this block count is increased by 8 than user defined - count. + config BT_NIMBLE_ACL_BUF_SIZE + int "ACL Buffer size" + depends on BT_NIMBLE_ENABLED + default 255 + help + This is the maximum size of the data portion of HCI ACL data packets. + It does not include the HCI data header (of 4 bytes) -config BT_NIMBLE_MSYS_1_BLOCK_SIZE - int "MSYS_1 Block Size" - depends on BT_NIMBLE_MEMORY_SETTINGS - default 256 - help - Dynamic memory size of block 1 + config BT_NIMBLE_HCI_EVT_BUF_SIZE + int "HCI Event Buffer size" + depends on BT_NIMBLE_ENABLED + default 257 if BT_NIMBLE_EXT_ADV + default 70 + help + This is the size of each HCI event buffer in bytes. In case of + extended advertising, packets can be fragmented. 257 bytes is the + maximum size of a packet. -config BT_NIMBLE_MSYS_2_BLOCK_COUNT - int "MSYS_2 Block Count" - depends on BT_NIMBLE_MEMORY_SETTINGS - default 24 - help - Dynamic memory count + config BT_NIMBLE_HCI_EVT_HI_BUF_COUNT + int "High Priority HCI Event Buffer count" + depends on BT_NIMBLE_ENABLED + default 30 + help + This is the high priority HCI events' buffer size. High-priority + event buffers are for everything except advertising reports. If there + are no free high-priority event buffers then host will try to allocate a + low-priority buffer instead -config BT_NIMBLE_MSYS_2_BLOCK_SIZE - int "MSYS_2 Block Size" - depends on BT_NIMBLE_MEMORY_SETTINGS - default 320 - help - Dynamic memory size of block 2 + config BT_NIMBLE_HCI_EVT_LO_BUF_COUNT + int "Low Priority HCI Event Buffer count" + depends on BT_NIMBLE_ENABLED + default 8 + help + This is the low priority HCI events' buffer size. Low-priority event + buffers are only used for advertising reports. If there are no free + low-priority event buffers, then an incoming advertising report will + get dropped + +endmenu config BT_NIMBLE_HS_FLOW_CTRL bool "Enable Host Flow control" @@ -567,7 +474,7 @@ config BT_NIMBLE_HOST_BASED_PRIVACY config BT_NIMBLE_ENABLE_CONN_REATTEMPT bool "Enable connection reattempts on connection establishment error" - default y if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2 ) + default y if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2) default n if IDF_TARGET_ESP32 help Enable to make the NimBLE host to reattempt GAP connection on connection @@ -582,30 +489,93 @@ config BT_NIMBLE_MAX_CONN_REATTEMPT Defines maximum number of connection reattempts. menuconfig BT_NIMBLE_50_FEATURE_SUPPORT - bool "Enable BLE v5.0 feature" + bool "Enable BLE 5 feature" depends on BT_NIMBLE_ENABLED default y help - Enable BLE v5.0 feature + Enable BLE 5 feature +config BT_NIMBLE_LL_CFG_FEAT_LE_2M_PHY + bool "Enable 2M Phy" + depends on BT_NIMBLE_50_FEATURE_SUPPORT + default y + help + Enable 2M-PHY + +config BT_NIMBLE_LL_CFG_FEAT_LE_CODED_PHY + bool "Enable coded Phy" + depends on BT_NIMBLE_50_FEATURE_SUPPORT + default y + help + Enable coded-PHY config BT_NIMBLE_EXT_ADV bool "Enable extended advertising" - depends on BT_NIMBLE_ENABLED && BT_NIMBLE_50_FEATURE_SUPPORT + depends on BT_NIMBLE_50_FEATURE_SUPPORT default n help Enable this option to do extended advertising. Extended advertising will be supported from BLE 5.0 onwards. if BT_NIMBLE_EXT_ADV - config BT_NIMBLE_EXT_ADV_MAX_SIZE - int "set ext adv maximum paket size" - depends on BT_NIMBLE_50_FEATURE_SUPPORT - default 1650 + config BT_NIMBLE_MAX_EXT_ADV_INSTANCES + int "Maximum number of extended advertising instances." + range 0 4 + default 1 if BT_NIMBLE_EXT_ADV + default 0 + depends on BT_NIMBLE_EXT_ADV help - Ext ADV packet size + Change this option to set maximum number of extended advertising + instances. Minimum there is always one instance of + advertising. Enter how many more advertising instances you + want. + + config BT_NIMBLE_EXT_ADV_MAX_SIZE + int "Maximum length of the advertising data." + range 0 1650 + default 1650 if BT_NIMBLE_EXT_ADV + default 0 + depends on BT_NIMBLE_EXT_ADV + help + Defines the length of the extended adv data. The value should not + exceed 1650. + + config BT_NIMBLE_ENABLE_PERIODIC_ADV + bool "Enable periodic advertisement." + default y + depends on BT_NIMBLE_EXT_ADV + help + Enable this option to start periodic advertisement. + + config BT_NIMBLE_PERIODIC_ADV_SYNC_TRANSFER + bool "Enable Transer Sync Events" + depends on BT_NIMBLE_ENABLE_PERIODIC_ADV + default y + help + This enables controller transfer periodic sync events to host + endif +config BT_NIMBLE_MAX_PERIODIC_SYNCS + int "Maximum number of periodic advertising syncs" + depends on BT_NIMBLE_50_FEATURE_SUPPORT + range 0 8 if !IDF_TARGET_ESP32C2 + range 0 3 if IDF_TARGET_ESP32C2 + default 1 if BT_NIMBLE_ENABLE_PERIODIC_ADV + default 0 + help + Set this option to set the upper limit for number of periodic sync + connections. This should be less than maximum connections allowed by + controller. + +config BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST + int "Maximum number of periodic advertiser list" + depends on BT_NIMBLE_50_FEATURE_SUPPORT && IDF_TARGET_ESP32C2 + range 1 5 + default 5 if BT_NIMBLE_50_FEATURE_SUPPORT + help + Set this option to set the upper limit for number of periodic advertiser list. + choice BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection" default BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS @@ -635,100 +605,19 @@ config BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF config BT_NIMBLE_WHITELIST_SIZE int "BLE white list size" depends on BT_NIMBLE_ENABLED - range 1 15 - default 12 + range 1 15 if !IDF_TARGET_ESP32C2 + default 12 if !IDF_TARGET_ESP32C2 + range 1 5 if IDF_TARGET_ESP32C2 + default 5 if IDF_TARGET_ESP32C2 help BLE list size - -config BT_NIMBLE_MAX_EXT_ADV_INSTANCES - int "Maximum number of extended advertising instances." - range 0 4 - default 1 if BT_NIMBLE_EXT_ADV - default 0 - depends on BT_NIMBLE_EXT_ADV - help - Change this option to set maximum number of extended advertising - instances. Minimum there is always one instance of - advertising. Enter how many more advertising instances you - want. - -config BT_NIMBLE_MAX_EXT_ADV_DATA_LEN - int "Maximum length of the advertising data." - range 0 1650 - default 1650 if BT_NIMBLE_EXT_ADV - default 0 - depends on BT_NIMBLE_EXT_ADV - help - Defines size of extended advertising data. Size should not increase - 1650. - -config BT_NIMBLE_ENABLE_PERIODIC_ADV - bool "Enable periodic advertisement." - default y - depends on BT_NIMBLE_EXT_ADV - help - Enable this option to start periodic advertisement. - -config BT_NIMBLE_PERIODIC_ADV_SYNC_TRANSFER - bool "Enable Transer Sync Events" - depends on BT_NIMBLE_EXT_ADV - default y - help - This enables controller transfer periodic sync events to host - - -config BT_NIMBLE_MAX_PERIODIC_SYNCS - int "Maximum number of periodic advertising syncs." - default 1 if BT_NIMBLE_ENABLE_PERIODIC_ADV - default 0 - depends on BT_NIMBLE_ENABLE_PERIODIC_ADV - range 1 8 - help - Set this option to set the upper limit for number of periodic sync - connections. This should be less than maximum connections allowed by - controller. - -config BT_NIMBLE_LL_CFG_FEAT_LE_2M_PHY - bool "Enable 2M Phy" - depends on BT_NIMBLE_50_FEATURE_SUPPORT - default y - help - Enable 2M-PHY - -config BT_NIMBLE_LL_CFG_FEAT_LE_CODED_PHY - bool "Enable coded Phy" - depends on BT_NIMBLE_50_FEATURE_SUPPORT - default y - help - Enable coded-PHY - -config BT_NIMBLE_HARDWARE_BLE_ONLY - bool "Run example on Ble Only Hardware" - default y - help - Run example on Ble Only Hardware - config BT_NIMBLE_TEST_THROUGHPUT_TEST bool "Throughput Test Mode enable" default n help Enable the throughput test mode - -config BT_NIMBLE_LL_RESOLV_LIST_SIZE - int "BLE LL Resolving list size" - default 4 - help - Configure the size of resolving list used in link layer. - -config BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT - int "BLE duplicate scan list count" - range 1 100 - default 8 - help - config the max count of duplicate scan list - config BT_NIMBLE_SLEEP_ENABLE bool "Enable BLE sleep" depends on BT_NIMBLE_ENABLED @@ -736,7 +625,7 @@ config BT_NIMBLE_SLEEP_ENABLE help Enable BLE sleep -choice +choice BT_NIMBLE_WAKEUP_SOURCE prompt "BLE light sleep wakeup source" depends on BT_NIMBLE_SLEEP_ENABLE default BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER diff --git a/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c b/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c index bfbfb09a62..f96f435142 100644 --- a/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c +++ b/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c @@ -7,7 +7,9 @@ #include #include "sysinit/sysinit.h" #include "nimble/hci_common.h" +#if CONFIG_BT_NIMBLE_ENABLED #include "host/ble_hs.h" +#endif //CONFIG_BT_NIMBLE_ENABLED #include "nimble/nimble_port.h" #include "nimble/nimble_port_freertos.h" #include "esp_nimble_hci.h" diff --git a/components/bt/host/nimble/nimble b/components/bt/host/nimble/nimble index 3c2e1d4b5b..f547144fe4 160000 --- a/components/bt/host/nimble/nimble +++ b/components/bt/host/nimble/nimble @@ -1 +1 @@ -Subproject commit 3c2e1d4b5b9066db5c227c669012fd0568daee12 +Subproject commit f547144fe4ed5a57636c4dc0d55b1bdf2df06f76 diff --git a/components/bt/host/nimble/port/include/esp_nimble_cfg.h b/components/bt/host/nimble/port/include/esp_nimble_cfg.h index 0261d59f1e..095b044819 100644 --- a/components/bt/host/nimble/port/include/esp_nimble_cfg.h +++ b/components/bt/host/nimble/port/include/esp_nimble_cfg.h @@ -22,12 +22,6 @@ #define IRAM_ATTR_64MCPU IRAM_ATTR #endif -#ifdef CONFIG_BT_NIMBLE_RUN_QA_TEST -#define RUN_QA_TEST_N (CONFIG_BT_NIMBLE_RUN_QA_TEST) -#else -#define RUN_QA_TEST_N (0) -#endif - #define BLE_LL_CTRL_PROC_TIMEOUT_MS_N (40000) /* ms */ #define BLE_LL_CFG_NUM_HCI_CMD_PKTS_N (1) @@ -54,14 +48,10 @@ #define BLE_LL_TX_PWR_DBM_N (0) -#define BLE_LL_SYNC_CNT_N (7) - -#define BLE_LL_SYNC_LIST_CNT_N (7) - -#ifndef CONFIG_BT_NIMBLE_CONTROLLER_ENABLED +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 #define NIMBLE_CFG_CONTROLLER 0 #else -#define NIMBLE_CFG_CONTROLLER CONFIG_BT_NIMBLE_CONTROLLER_ENABLED +#define NIMBLE_CFG_CONTROLLER CONFIG_BT_CONTROLLER_ENABLED #endif /*** kernel/os */ @@ -144,6 +134,11 @@ #define MYNEWT_VAL_BLE_MAX_PERIODIC_SYNCS (CONFIG_BT_NIMBLE_MAX_PERIODIC_SYNCS) #endif +#ifndef CONFIG_BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST +#define MYNEWT_VAL_BLE_MAX_PERIODIC_ADVERTISER_LIST (0) +#else +#define MYNEWT_VAL_BLE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST) +#endif #ifndef CONFIG_BT_NIMBLE_MAX_EXT_ADV_INSTANCES #define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (1) @@ -193,7 +188,7 @@ /*** @apache-mynewt-nimble/nimble/controller */ /*** @apache-mynewt-nimble/nimble/controller */ #ifndef MYNEWT_VAL_BLE_CONTROLLER -#if CONFIG_IDF_TARGET_ESP32H2 +#if NIMBLE_CFG_CONTROLLER #define MYNEWT_VAL_BLE_CONTROLLER (1) #else #define MYNEWT_VAL_BLE_CONTROLLER (0) @@ -284,10 +279,6 @@ #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION (CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_ENCRYPTION) #endif -#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING -#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING (MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION) -#endif - /* Value copied from BLE_LL_OUR_SCA */ #ifndef MYNEWT_VAL_BLE_LL_SCA #define MYNEWT_VAL_BLE_LL_SCA (60) @@ -330,11 +321,7 @@ #endif #ifndef MYNEWT_VAL_BLE_HCI_UART_PARITY -#if CONFIG_IDF_TARGET_ESP32H2 -#define MYNEWT_VAL_BLE_HCI_UART_PARITY 0 -#else -#define MYNEWT_VAL_BLE_HCI_UART_PARITY (HAL_UART_PARITY_NONE) -#endif +#define MYNEWT_VAL_BLE_HCI_UART_PARITY (0) // HAL_UART_PARITY_NONE #endif #ifndef CONFIG_BT_NIMBLE_HCI_UART_PORT @@ -360,12 +347,6 @@ #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV (MYNEWT_VAL_BLE_EXT_ADV) #endif -#if MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV -#define BLE_LL_SCAN_PHY_NUMBER_N (2) -#else -#define BLE_LL_SCAN_PHY_NUMBER_N (1) -#endif - /* Value copied from BLE_PERIODIC_ADV */ #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV (CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV) @@ -431,7 +412,7 @@ #endif #ifndef MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE -#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (CONFIG_BT_NIMBLE_LL_RESOLV_LIST_SIZE) +#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (4) #endif #ifndef MYNEWT_VAL_BLE_LL_RNG_BUFSIZE diff --git a/components/bt/include/esp32c2/include/esp_bt.h b/components/bt/include/esp32c2/include/esp_bt.h new file mode 100644 index 0000000000..cc40cdb073 --- /dev/null +++ b/components/bt/include/esp32c2/include/esp_bt.h @@ -0,0 +1,469 @@ +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __ESP_BT_H__ +#define __ESP_BT_H__ + +#include +#include +#include "esp_err.h" +#include "sdkconfig.h" +#include "esp_task.h" + +#include "nimble/nimble_npl.h" +#include "syscfg/syscfg.h" +#include "esp_nimble_cfg.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if (SOC_ESP_NIMBLE_CONTROLLER) +#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE +#endif + +/** + * @brief Bluetooth mode for controller enable/disable + */ + +typedef enum { + ESP_BT_MODE_IDLE = 0x00, /*!< Bluetooth is not running */ + ESP_BT_MODE_BLE = 0x01, /*!< Run BLE mode */ + ESP_BT_MODE_CLASSIC_BT = 0x02, /*!< Run Classic BT mode */ + ESP_BT_MODE_BTDM = 0x03, /*!< Run dual mode */ +} esp_bt_mode_t; + +/** + * @brief Bluetooth controller enable/disable/initialised/de-initialised status + */ + +typedef enum { + ESP_BT_CONTROLLER_STATUS_IDLE = 0, /*!< Controller is in idle state */ + ESP_BT_CONTROLLER_STATUS_INITED, /*!< Controller is in initialising state */ + ESP_BT_CONTROLLER_STATUS_ENABLED, /*!< Controller is in enabled state */ + ESP_BT_CONTROLLER_STATUS_NUM, /*!< Controller is in disabled state */ +} esp_bt_controller_status_t; + +/** + * @brief BLE tx power type + * ESP_BLE_PWR_TYPE_CONN_HDL0-8: for each connection, and only be set after connection completed. + * when disconnect, the correspond TX power is not effected. + * ESP_BLE_PWR_TYPE_ADV : for advertising/scan response. + * ESP_BLE_PWR_TYPE_SCAN : for scan. + * ESP_BLE_PWR_TYPE_DEFAULT : if each connection's TX power is not set, it will use this default value. + * if neither in scan mode nor in adv mode, it will use this default value. + * If none of power type is set, system will use ESP_PWR_LVL_P3 as default for ADV/SCAN/CONN0-9. + */ +typedef enum { + ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< For connection handle 0 */ + ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< For connection handle 1 */ + ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< For connection handle 2 */ + ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< For connection handle 3 */ + ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< For connection handle 4 */ + ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< For connection handle 5 */ + ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< For connection handle 6 */ + ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< For connection handle 7 */ + ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< For connection handle 8 */ + ESP_BLE_PWR_TYPE_ADV = 9, /*!< For advertising */ + ESP_BLE_PWR_TYPE_SCAN = 10, /*!< For scan */ + ESP_BLE_PWR_TYPE_DEFAULT = 11, /*!< For default, if not set other, it will use default value */ + ESP_BLE_PWR_TYPE_NUM = 12, /*!< TYPE numbers */ +} esp_ble_power_type_t; + +/** + * @brief Bluetooth TX power level(index), it's just a index corresponding to power(dbm). + */ +typedef enum { + ESP_PWR_LVL_N27 = 0, /*!< Corresponding to -27dbm */ + ESP_PWR_LVL_N24 = 1, /*!< Corresponding to -24dbm */ + ESP_PWR_LVL_N21 = 2, /*!< Corresponding to -21dbm */ + ESP_PWR_LVL_N18 = 3, /*!< Corresponding to -18dbm */ + ESP_PWR_LVL_N15 = 4, /*!< Corresponding to -15dbm */ + ESP_PWR_LVL_N12 = 5, /*!< Corresponding to -12dbm */ + ESP_PWR_LVL_N9 = 6, /*!< Corresponding to -9dbm */ + ESP_PWR_LVL_N6 = 7, /*!< Corresponding to -6dbm */ + ESP_PWR_LVL_N3 = 8, /*!< Corresponding to -3dbm */ + ESP_PWR_LVL_N0 = 9, /*!< Corresponding to 0dbm */ + ESP_PWR_LVL_P3 = 10, /*!< Corresponding to +3dbm */ + ESP_PWR_LVL_P6 = 11, /*!< Corresponding to +6dbm */ + ESP_PWR_LVL_P9 = 12, /*!< Corresponding to +9dbm */ + ESP_PWR_LVL_P12 = 13, /*!< Corresponding to +12dbm */ + ESP_PWR_LVL_P15 = 14, /*!< Corresponding to +15dbm */ + ESP_PWR_LVL_P18 = 15, /*!< Corresponding to +18dbm */ + ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */ +} esp_power_level_t; + +typedef struct { + uint8_t type; + uint8_t val[6]; +} esp_ble_addr_t; + +/** + * @brief Set BLE TX power + * Connection Tx power should only be set after connection created. + * @param power_type : The type of which tx power, could set Advertising/Connection/Default and etc + * @param power_level: Power level(index) corresponding to absolute value(dbm) + * @return ESP_OK - success, other - failed + */ +esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level); + +/** + * @brief Get BLE TX power + * Connection Tx power should only be get after connection created. + * @param power_type : The type of which tx power, could set Advertising/Connection/Default and etc + * @return >= 0 - Power level, < 0 - Invalid + */ +esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type); + + +#define CONFIG_VERSION 0x20220105 +#define CONFIG_MAGIC 0x5A5AA5A5 + +/** + * @brief Controller config options, depend on config mask. + * Config mask indicate which functions enabled, this means + * some options or parameters of some functions enabled by config mask. + */ + +struct esp_bt_controller_config_t{ + uint32_t config_version; + uint16_t ble_ll_resolv_list_size; + uint16_t ble_hci_evt_hi_buf_count; + uint16_t ble_hci_evt_lo_buf_count; + uint8_t ble_ll_sync_list_cnt; + uint8_t ble_ll_sync_cnt; + uint16_t ble_ll_rsp_dup_list_count; + uint16_t ble_ll_adv_dup_list_count; + uint8_t ble_ll_tx_pwr_dbm; + uint64_t rtc_freq; + uint16_t ble_ll_sca; + uint8_t ble_ll_scan_phy_number; + uint16_t ble_ll_conn_def_auth_pyld_tmo; + uint8_t ble_ll_jitter_usecs; + uint16_t ble_ll_sched_max_adv_pdu_usecs; + uint16_t ble_ll_sched_direct_adv_max_usecs; + uint16_t ble_ll_sched_adv_max_usecs; + uint16_t ble_scan_rsp_data_max_len; + uint8_t ble_ll_cfg_num_hci_cmd_pkts; + uint32_t ble_ll_ctrl_proc_timeout_ms; + uint16_t nimble_max_connections; + uint8_t ble_whitelist_size; + uint16_t ble_acl_buf_size; + uint16_t ble_acl_buf_count; + uint16_t ble_hci_evt_buf_size; + uint16_t ble_multi_adv_instances; + uint16_t ble_ext_adv_max_size; + uint16_t controller_task_stack_size; + uint8_t controller_task_prio; + uint8_t controller_run_cpu; + uint8_t enable_qa_test; + uint8_t enable_bqb_test; + uint8_t enable_uart_hci; + uint8_t ble_hci_uart_port; + uint32_t ble_hci_uart_baud; + uint8_t ble_hci_uart_data_bits; + uint8_t ble_hci_uart_stop_bits; + uint8_t ble_hci_uart_flow_ctrl; + uint8_t ble_hci_uart_uart_parity; + uint8_t enable_tx_cca; + uint8_t cca_rssi_thresh; + uint8_t sleep_en; + uint8_t coex_phy_coded_tx_rx_time_limit; + uint8_t dis_scan_backoff; + uint8_t esp_scan_filter_en; + uint32_t config_magic; +}; + +typedef struct esp_bt_controller_config_t esp_bt_controller_config_t; + +#define RUN_BQB_TEST 0 +#define RUN_QA_TEST 0 +#define NIMBLE_DISABLE_SCAN_BACKOFF 0 + +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART +#define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART +#else +#define HCI_UART_EN 0 // hci ram mode +#endif + +#if CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY +#define BLE_LL_SCAN_PHY_NUMBER_N (2) +#else +#define BLE_LL_SCAN_PHY_NUMBER_N (1) +#endif + +#ifdef CONFIG_BT_NIMBLE_SLEEP_ENABLE +#define NIMBLE_SLEEP_ENABLE CONFIG_BT_NIMBLE_SLEEP_ENABLE +#else +#define NIMBLE_SLEEP_ENABLE 0 +#endif + + +#if CONFIG_BT_NIMBLE_ENABLED + +#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST) +#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS) +#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS) +#define DEFAULT_BT_LE_ACL_BUF_SIZE MYNEWT_VAL(BLE_ACL_BUF_SIZE) +#define DEFAULT_BT_LE_ACL_BUF_COUNT MYNEWT_VAL(BLE_ACL_BUF_COUNT) +#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE MYNEWT_VAL(BLE_HCI_EVT_BUF_SIZE) +#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE MYNEWT_VAL(BLE_EXT_ADV_MAX_SIZE) +#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES) +#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE MYNEWT_VAL(BLE_LL_WHITELIST_SIZE) +#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT) +#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT) +#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF + +#else +# if defined(CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST) + #define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST) +#else + #define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_PERIODIC_SYNCS) + #define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (CONFIG_BT_LE_MAX_PERIODIC_SYNCS) +#else + #define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_CONNECTIONS) + #define DEFAULT_BT_LE_MAX_CONNECTIONS (CONFIG_BT_LE_MAX_CONNECTIONS) +#else + #define DEFAULT_BT_LE_MAX_CONNECTIONS (0) +#endif + +#if defined(CONFIG_BT_LE_ACL_BUF_SIZE) + #define DEFAULT_BT_LE_ACL_BUF_SIZE (CONFIG_BT_LE_ACL_BUF_SIZE) +#else + #define DEFAULT_BT_LE_ACL_BUF_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_ACL_BUF_COUNT) + #define DEFAULT_BT_LE_ACL_BUF_COUNT (CONFIG_BT_LE_ACL_BUF_COUNT) +#else + #define DEFAULT_BT_LE_ACL_BUF_COUNT (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_BUF_SIZE) + #define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (CONFIG_BT_LE_HCI_EVT_BUF_SIZE) +#else + #define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_EXT_ADV_MAX_SIZE) + #define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (CONFIG_BT_LE_EXT_ADV_MAX_SIZE) +#else + #define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES) + #define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES) +#else + #define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (0) +#endif + +#if defined(CONFIG_BT_LE_WHITELIST_SIZE) + #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (CONFIG_BT_LE_WHITELIST_SIZE) +#else + #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT) + #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT) +#else + #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) + #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) +#else + #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (0) +#endif + +#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF + +#endif + + +#ifdef BT_LE_HCI_INTERFACE_USE_UART + #define DEFAULT_BT_LE_HCI_UART_TX_PIN (CONFIG_BT_LE_HCI_UART_TX_PIN) + #define DEFAULT_BT_LE_HCI_UART_RX_PIN (CONFIG_BT_LE_HCI_UART_RX_PIN) + #define DEFAULT_BT_LE_HCI_UART_PORT (CONFIG_BT_LE_HCI_UART_PORT) + #define DEFAULT_BT_LE_HCI_UART_BAUD (CONFIG_BT_LE_HCI_UART_BAUD) + #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (CONFIG_BT_LE_HCI_UART_DATA_BITS) + #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (CONFIG_BT_LE_HCI_UART_STOP_BITS) + #define DEFAULT_BT_LE_HCI_UART_PARITY (CONFIG_BT_LE_HCI_UART_BAUD) + #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOW_CTRL) +#else + #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) + #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) + #define DEFAULT_BT_LE_HCI_UART_PORT (0) + #define DEFAULT_BT_LE_HCI_UART_BAUD (0) + #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (8) + #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (1) + #define DEFAULT_BT_LE_HCI_UART_PARITY (0) + #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) +#endif + +#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \ + .config_version = CONFIG_VERSION, \ + .ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \ + .ble_hci_evt_hi_buf_count = DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT, \ + .ble_hci_evt_lo_buf_count = DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT, \ + .ble_ll_sync_list_cnt = DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST, \ + .ble_ll_sync_cnt = DEFAULT_BT_LE_MAX_PERIODIC_SYNCS, \ + .ble_ll_rsp_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \ + .ble_ll_adv_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \ + .ble_ll_tx_pwr_dbm = BLE_LL_TX_PWR_DBM_N, \ + .rtc_freq = RTC_FREQ_N, \ + .ble_ll_sca = CONFIG_BT_LE_LL_SCA, \ + .ble_ll_scan_phy_number = BLE_LL_SCAN_PHY_NUMBER_N, \ + .ble_ll_conn_def_auth_pyld_tmo = BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N, \ + .ble_ll_jitter_usecs = BLE_LL_JITTER_USECS_N, \ + .ble_ll_sched_max_adv_pdu_usecs = BLE_LL_SCHED_MAX_ADV_PDU_USECS_N, \ + .ble_ll_sched_direct_adv_max_usecs = BLE_LL_SCHED_DIRECT_ADV_MAX_USECS_N, \ + .ble_ll_sched_adv_max_usecs = BLE_LL_SCHED_ADV_MAX_USECS_N, \ + .ble_scan_rsp_data_max_len = BLE_SCAN_RSP_DATA_MAX_LEN_N, \ + .ble_ll_cfg_num_hci_cmd_pkts = BLE_LL_CFG_NUM_HCI_CMD_PKTS_N, \ + .ble_ll_ctrl_proc_timeout_ms = BLE_LL_CTRL_PROC_TIMEOUT_MS_N, \ + .nimble_max_connections = DEFAULT_BT_LE_MAX_CONNECTIONS, \ + .ble_whitelist_size = DEFAULT_BT_NIMBLE_WHITELIST_SIZE, \ + .ble_acl_buf_size = DEFAULT_BT_LE_ACL_BUF_SIZE, \ + .ble_acl_buf_count = DEFAULT_BT_LE_ACL_BUF_COUNT, \ + .ble_hci_evt_buf_size = DEFAULT_BT_LE_HCI_EVT_BUF_SIZE, \ + .ble_multi_adv_instances = DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, \ + .ble_ext_adv_max_size = DEFAULT_BT_LE_EXT_ADV_MAX_SIZE, \ + .controller_task_stack_size = NIMBLE_LL_STACK_SIZE, \ + .controller_task_prio = ESP_TASK_BT_CONTROLLER_PRIO, \ + .controller_run_cpu = 0, \ + .enable_qa_test = RUN_QA_TEST, \ + .enable_bqb_test = RUN_BQB_TEST, \ + .enable_uart_hci = HCI_UART_EN, \ + .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ + .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ + .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ + .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ + .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ + .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ + .enable_tx_cca = MYNEWT_VAL(BLE_TX_CCA_ENABLED), \ + .cca_rssi_thresh = 256 - MYNEWT_VAL(BLE_CCA_RSSI_THRESH), \ + .sleep_en = NIMBLE_SLEEP_ENABLE, \ + .coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \ + .dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \ + .esp_scan_filter_en = 0, \ + .config_magic = CONFIG_MAGIC, \ +}; + +esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg); + +/** + * @brief Get BT controller is initialised/de-initialised/enabled/disabled + * @return status value + */ +esp_bt_controller_status_t esp_bt_controller_get_status(void); +esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type); +esp_err_t esp_bt_controller_deinit(void); +esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode); +esp_err_t esp_bt_controller_disable(void); + +typedef struct esp_vhci_host_callback { + void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */ + int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/ +} esp_vhci_host_callback_t; + +/** @brief esp_vhci_host_check_send_available + * used for check actively if the host can send packet to controller or not. + * @return true for ready to send, false means cannot send packet + */ +bool esp_vhci_host_check_send_available(void); + +/** @brief esp_vhci_host_send_packet + * host send packet to controller + * + * Should not call this function from within a critical section + * or when the scheduler is suspended. + * + * @param data the packet point + * @param len the packet length + */ +void esp_vhci_host_send_packet(uint8_t *data, uint16_t len); + +/** @brief esp_vhci_host_register_callback + * register the vhci reference callback + * struct defined by vhci_host_callback structure. + * @param callback esp_vhci_host_callback type variable + * @return ESP_OK - success, ESP_FAIL - failed + */ +esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback); + +/** @brief esp_bt_controller_mem_release + * release the controller memory as per the mode + * + * This function releases the BSS, data and other sections of the controller to heap. The total size is about 70k bytes. + * + * esp_bt_controller_mem_release(mode) should be called only before esp_bt_controller_init() + * or after esp_bt_controller_deinit(). + * + * Note that once BT controller memory is released, the process cannot be reversed. It means you cannot use the bluetooth + * mode which you have released by this function. + * + * If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled) + * then do not call this function. + * + * If the app calls esp_bt_controller_enable(ESP_BT_MODE_BLE) to use BLE only then it is safe to call + * esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT) at initialization time to free unused BT Classic memory. + * + * If the mode is ESP_BT_MODE_BTDM, then it may be useful to call API esp_bt_mem_release(ESP_BT_MODE_BTDM) instead, + * which internally calls esp_bt_controller_mem_release(ESP_BT_MODE_BTDM) and additionally releases the BSS and data + * consumed by the BT/BLE host stack to heap. For more details about usage please refer to the documentation of + * esp_bt_mem_release() function + * + * @param mode : the mode want to release memory + * @return ESP_OK - success, other - failed + */ +esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); + +/** @brief esp_bt_mem_release + * release controller memory and BSS and data section of the BT/BLE host stack as per the mode + * + * This function first releases controller memory by internally calling esp_bt_controller_mem_release(). + * Additionally, if the mode is set to ESP_BT_MODE_BTDM, it also releases the BSS and data consumed by the BT/BLE host stack to heap + * + * Note that once BT memory is released, the process cannot be reversed. It means you cannot use the bluetooth + * mode which you have released by this function. + * + * If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled) + * then do not call this function. + * + * If you never intend to use bluetooth in a current boot-up cycle, you can call esp_bt_mem_release(ESP_BT_MODE_BTDM) + * before esp_bt_controller_init or after esp_bt_controller_deinit. + * + * For example, if a user only uses bluetooth for setting the WiFi configuration, and does not use bluetooth in the rest of the product operation". + * In such cases, after receiving the WiFi configuration, you can disable/deinit bluetooth and release its memory. + * Below is the sequence of APIs to be called for such scenarios: + * + * esp_bluedroid_disable(); + * esp_bluedroid_deinit(); + * esp_bt_controller_disable(); + * esp_bt_controller_deinit(); + * esp_bt_mem_release(ESP_BT_MODE_BTDM); + * + * @param mode : the mode whose memory is to be released + * @return ESP_OK - success, other - failed + */ +esp_err_t esp_bt_mem_release(esp_bt_mode_t mode); + +/* Returns random static address or -1 if not present */ +extern int esp_ble_hw_get_static_addr(esp_ble_addr_t *addr); + +#ifdef __cplusplus +} +#endif + +#endif /* __ESP_BT_H__ */ diff --git a/components/bt/include/esp32h2/include/esp_bt.h b/components/bt/include/esp32h2/include/esp_bt.h index 8b2511e6f7..2d8822a1c3 100644 --- a/components/bt/include/esp32h2/include/esp_bt.h +++ b/components/bt/include/esp32h2/include/esp_bt.h @@ -15,7 +15,9 @@ #include "nimble/nimble_npl.h" #include "syscfg/syscfg.h" +#if CONFIG_BT_NIMBLE_ENABLED #include "esp_nimble_cfg.h" +#endif #include "nimble/ble.h" #ifdef __cplusplus @@ -23,7 +25,7 @@ extern "C" { #endif #if (SOC_ESP_NIMBLE_CONTROLLER) -#define NIMBLE_LL_STACK_SIZE CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE +#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE #endif /** @@ -97,6 +99,11 @@ typedef enum { ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */ } esp_power_level_t; +typedef struct { + uint8_t type; + uint8_t val[6]; +} esp_ble_addr_t; + /** * @brief Set BLE TX power * Connection Tx power should only be set after connection created. @@ -173,42 +180,149 @@ struct esp_bt_controller_config_t{ typedef struct esp_bt_controller_config_t esp_bt_controller_config_t; -#ifdef CONFIG_BT_NIMBLE_RUN_BQB_TEST -#define RUN_BQB_TEST CONFIG_BT_NIMBLE_RUN_BQB_TEST -#else -#define RUN_BQB_TEST 0 -#endif +#define RUN_BQB_TEST 0 +#define RUN_QA_TEST 0 -#ifdef CONFIG_BT_NIMBLE_RUN_QA_TEST -#define RUN_QA_TEST CONFIG_BT_NIMBLE_RUN_QA_TEST -#else -#define RUN_QA_TEST 0 -#endif - -#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI -#define HCI_UART_EN CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI +#ifdef CONFIG_BT_NIMBLE_HCI_INTERFACE_USE_UART +#define HCI_UART_EN CONFIG_BT_NIMBLE_HCI_INTERFACE_USE_UART #else #define HCI_UART_EN 0 // hci ram mode #endif +#if CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY +#define BLE_LL_SCAN_PHY_NUMBER_N (2) +#else +#define BLE_LL_SCAN_PHY_NUMBER_N (1) +#endif + #ifdef CONFIG_BT_NIMBLE_SLEEP_ENABLE #define NIMBLE_SLEEP_ENABLE CONFIG_BT_NIMBLE_SLEEP_ENABLE #else #define NIMBLE_SLEEP_ENABLE 0 #endif +#if CONFIG_BT_NIMBLE_ENABLED + +#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST) +#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS) +#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS) +#define DEFAULT_BT_LE_ACL_BUF_SIZE MYNEWT_VAL(BLE_ACL_BUF_SIZE) +#define DEFAULT_BT_LE_ACL_BUF_COUNT MYNEWT_VAL(BLE_ACL_BUF_COUNT) +#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE MYNEWT_VAL(BLE_HCI_EVT_BUF_SIZE) +#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE MYNEWT_VAL(BLE_EXT_ADV_MAX_SIZE) +#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES) +#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE MYNEWT_VAL(BLE_LL_WHITELIST_SIZE) +#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT) +#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT) +#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF + +#else +# if defined(CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST) + #define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST) +#else + #define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_PERIODIC_SYNCS) + #define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (CONFIG_BT_LE_MAX_PERIODIC_SYNCS) +#else + #define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_CONNECTIONS) + #define DEFAULT_BT_LE_MAX_CONNECTIONS (CONFIG_BT_LE_MAX_CONNECTIONS) +#else + #define DEFAULT_BT_LE_MAX_CONNECTIONS (0) +#endif + +#if defined(CONFIG_BT_LE_ACL_BUF_SIZE) + #define DEFAULT_BT_LE_ACL_BUF_SIZE (CONFIG_BT_LE_ACL_BUF_SIZE) +#else + #define DEFAULT_BT_LE_ACL_BUF_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_ACL_BUF_COUNT) + #define DEFAULT_BT_LE_ACL_BUF_COUNT (CONFIG_BT_LE_ACL_BUF_COUNT) +#else + #define DEFAULT_BT_LE_ACL_BUF_COUNT (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_BUF_SIZE) + #define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (CONFIG_BT_LE_HCI_EVT_BUF_SIZE) +#else + #define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_EXT_ADV_MAX_SIZE) + #define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (CONFIG_BT_LE_EXT_ADV_MAX_SIZE) +#else + #define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES) + #define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES) +#else + #define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (0) +#endif + +#if defined(CONFIG_BT_LE_WHITELIST_SIZE) + #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (CONFIG_BT_LE_WHITELIST_SIZE) +#else + #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT) + #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT) +#else + #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (0) +#endif + +#if defined(CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) + #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) +#else + #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (0) +#endif + +#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF + +#endif + + +#ifdef BT_LE_HCI_INTERFACE_USE_UART + #define DEFAULT_BT_LE_HCI_UART_TX_PIN (CONFIG_BT_LE_HCI_UART_TX_PIN) + #define DEFAULT_BT_LE_HCI_UART_RX_PIN (CONFIG_BT_LE_HCI_UART_RX_PIN) + #define DEFAULT_BT_LE_HCI_UART_PORT (CONFIG_BT_LE_HCI_UART_PORT) + #define DEFAULT_BT_LE_HCI_UART_BAUD (CONFIG_BT_LE_HCI_UART_BAUD) + #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (CONFIG_BT_LE_HCI_UART_DATA_BITS) + #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (CONFIG_BT_LE_HCI_UART_STOP_BITS) + #define DEFAULT_BT_LE_HCI_UART_PARITY (CONFIG_BT_LE_HCI_UART_BAUD) + #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOW_CTRL) +#else + #warning "DEFAULT_BT_LE_HCI_UART is not set" + #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) + #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) + #define DEFAULT_BT_LE_HCI_UART_PORT (0) + #define DEFAULT_BT_LE_HCI_UART_BAUD (0) + #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (8) + #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (1) + #define DEFAULT_BT_LE_HCI_UART_PARITY (0) + #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) +#endif + #define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \ .config_version = CONFIG_VERSION, \ - .ble_ll_resolv_list_size = MYNEWT_VAL(BLE_LL_RESOLV_LIST_SIZE), \ - .ble_hci_evt_hi_buf_count = MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT), \ - .ble_hci_evt_lo_buf_count = MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT), \ - .ble_ll_sync_list_cnt = BLE_LL_SYNC_LIST_CNT_N, \ - .ble_ll_sync_cnt = BLE_LL_SYNC_CNT_N, \ - .ble_ll_rsp_dup_list_count = CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT, \ - .ble_ll_adv_dup_list_count = CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT, \ + .ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \ + .ble_hci_evt_hi_buf_count = DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT, \ + .ble_hci_evt_lo_buf_count = DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT, \ + .ble_ll_sync_list_cnt = DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST, \ + .ble_ll_sync_cnt = DEFAULT_BT_LE_MAX_PERIODIC_SYNCS, \ + .ble_ll_rsp_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \ + .ble_ll_adv_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \ .ble_ll_tx_pwr_dbm = BLE_LL_TX_PWR_DBM_N, \ .rtc_freq = RTC_FREQ_N, \ - .ble_ll_sca = MYNEWT_VAL(BLE_LL_SCA), \ + .ble_ll_sca = CONFIG_BT_LE_LL_SCA, \ .ble_ll_scan_phy_number = BLE_LL_SCAN_PHY_NUMBER_N, \ .ble_ll_conn_def_auth_pyld_tmo = BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N, \ .ble_ll_jitter_usecs = BLE_LL_JITTER_USECS_N, \ @@ -218,33 +332,32 @@ typedef struct esp_bt_controller_config_t esp_bt_controller_config_t; .ble_scan_rsp_data_max_len = BLE_SCAN_RSP_DATA_MAX_LEN_N, \ .ble_ll_cfg_num_hci_cmd_pkts = BLE_LL_CFG_NUM_HCI_CMD_PKTS_N, \ .ble_ll_ctrl_proc_timeout_ms = BLE_LL_CTRL_PROC_TIMEOUT_MS_N, \ - .nimble_max_connections = MYNEWT_VAL(BLE_MAX_CONNECTIONS), \ - .ble_whitelist_size = MYNEWT_VAL(BLE_LL_WHITELIST_SIZE), \ - .ble_acl_buf_size = MYNEWT_VAL(BLE_ACL_BUF_SIZE), \ - .ble_acl_buf_count = MYNEWT_VAL(BLE_ACL_BUF_COUNT), \ - .ble_hci_evt_buf_size = MYNEWT_VAL(BLE_HCI_EVT_BUF_SIZE), \ - .ble_multi_adv_instances = MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES), \ - .ble_ext_adv_max_size = MYNEWT_VAL(BLE_EXT_ADV_MAX_SIZE), \ + .nimble_max_connections = DEFAULT_BT_LE_MAX_CONNECTIONS, \ + .ble_whitelist_size = DEFAULT_BT_NIMBLE_WHITELIST_SIZE, \ + .ble_acl_buf_size = DEFAULT_BT_LE_ACL_BUF_SIZE, \ + .ble_acl_buf_count = DEFAULT_BT_LE_ACL_BUF_COUNT, \ + .ble_hci_evt_buf_size = DEFAULT_BT_LE_HCI_EVT_BUF_SIZE, \ + .ble_multi_adv_instances = DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, \ + .ble_ext_adv_max_size = DEFAULT_BT_LE_EXT_ADV_MAX_SIZE, \ .controller_task_stack_size = NIMBLE_LL_STACK_SIZE, \ .controller_task_prio = ESP_TASK_BT_CONTROLLER_PRIO, \ .controller_run_cpu = 0, \ .enable_qa_test = RUN_QA_TEST, \ .enable_bqb_test = RUN_BQB_TEST, \ .enable_uart_hci = HCI_UART_EN, \ - .ble_hci_uart_port = MYNEWT_VAL(BLE_HCI_UART_PORT), \ - .ble_hci_uart_baud = MYNEWT_VAL(BLE_HCI_UART_BAUD), \ - .ble_hci_uart_data_bits = MYNEWT_VAL(BLE_HCI_UART_DATA_BITS), \ - .ble_hci_uart_stop_bits = MYNEWT_VAL(BLE_HCI_UART_STOP_BITS), \ - .ble_hci_uart_flow_ctrl = MYNEWT_VAL(BLE_HCI_UART_FLOW_CTRL), \ - .ble_hci_uart_uart_parity = MYNEWT_VAL(BLE_HCI_UART_PARITY), \ + .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ + .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ + .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ + .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ + .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ + .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .enable_tx_cca = MYNEWT_VAL(BLE_TX_CCA_ENABLED), \ .cca_rssi_thresh = 256 - MYNEWT_VAL(BLE_CCA_RSSI_THRESH), \ .sleep_en = NIMBLE_SLEEP_ENABLE, \ - .coex_phy_coded_tx_rx_time_limit = CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \ + .coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \ .config_magic = CONFIG_MAGIC, \ }; - esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg); /** @@ -345,7 +458,7 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); esp_err_t esp_bt_mem_release(esp_bt_mode_t mode); /* Returns random static address or -1 if not present */ -extern int esp_ble_hw_get_static_addr(ble_addr_t *addr); +extern int esp_ble_hw_get_static_addr(esp_ble_addr_t *addr); #ifdef __cplusplus } diff --git a/components/bt/sdkconfig.rename.esp32c2 b/components/bt/sdkconfig.rename.esp32c2 new file mode 100644 index 0000000000..e69de29bb2 diff --git a/components/bt/sdkconfig.rename.esp32h2 b/components/bt/sdkconfig.rename.esp32h2 index 5c2cc09a52..e69de29bb2 100644 --- a/components/bt/sdkconfig.rename.esp32h2 +++ b/components/bt/sdkconfig.rename.esp32h2 @@ -1,34 +0,0 @@ -# sdkconfig replacement configurations for deprecated options formatted as -# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION - -CONFIG_BT_NIMBLE_CONTROLLER_ENABLED CONFIG_BT_BLE_CONTROLLER_ENABLED -CONFIG_BT_NIMBLE_CONTROL_USE_RAM_HCI CONFIG_BT_BLE_CONTROL_USE_RAM_HCI -CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI CONFIG_BT_BLE_CONTROL_USE_UART_HCI -CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE CONFIG_BT_BLE_HCI_EVT_BUF_SIZE -CONFIG_BT_NIMBLE_MEMORY_SETTINGS CONFIG_BT_BLE_MEMORY_SETTINGS -CONFIG_BT_NIMBLE_MSYS_1_BLOCK_COUNT CONFIG_BT_BLE_MSYS_1_BLOCK_COUNT -CONFIG_BT_NIMBLE_MSYS_1_BLOCK_SIZE CONFIG_BT_BLE_MSYS_1_BLOCK_SIZE -CONFIG_BT_NIMBLE_MSYS_2_BLOCK_COUNT CONFIG_BT_BLE_MSYS_2_BLOCK_COUNT -CONFIG_BT_NIMBLE_MSYS_2_BLOCK_SIZE CONFIG_BT_BLE_MSYS_2_BLOCK_SIZE -CONFIG_BT_NIMBLE_LL_RESOLV_LIST_SIZE CONFIG_BT_BLE_LL_RESOLV_LIST_SIZE -CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT CONFIG_BT_BLE_HCI_EVT_HI_BUF_COUNT -CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT CONFIG_BT_BLE_HCI_EVT_LO_BUF_COUNT -CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT CONFIG_BT_BLE_LL_DUP_SCAN_LIST_COUNT -CONFIG_BT_NIMBLE_MAX_CONNECTIONS CONFIG_BT_BLE_MAX_CONNECTIONS -CONFIG_BT_NIMBLE_ACL_BUF_COUNT CONFIG_BT_BLE_ACL_BUF_COUNT -CONFIG_BT_NIMBLE_ACL_BUF_SIZE CONFIG_BT_BLE_ACL_BUF_SIZE -CONFIG_BT_NIMBLE_HCI_UART_PORT CONFIG_BT_BLE_HCI_UART_PORT -CONFIG_BT_NIMBLE_HCI_UART_BAUD CONFIG_BT_BLE_HCI_UART_BAUD -CONFIG_BT_NIMBLE_SLEEP_ENABLE CONFIG_BT_BLE_SLEEP_ENABLE -CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM -CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EFF -CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EN CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EN -CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_DIS -CONFIG_BT_NIMBLE_MAX_BONDS CONFIG_BT_BLE_MAX_BONDS -CONFIG_BT_NIMBLE_WHITELIST_SIZE CONFIG_BT_BLE_WHITELIST_SIZE -CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE CONFIG_BT_BLE_CONTROLLER_TASK_STACK_SIZE -CONFIG_BT_NIMBLE_MEM_ALLOC_MODE CONFIG_BT_BLE_MEM_ALLOC_MODE -CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL CONFIG_BT_BLE_MEM_ALLOC_MODE_INTERNAL -CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_EXTERNAL CONFIG_BT_BLE_MEM_ALLOC_MODE_EXTERNAL -CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT CONFIG_BT_BLE_MEM_ALLOC_MODE_DEFAULT -CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_IRAM_8BIT CONFIG_BT_BLE_MEM_ALLOC_MODE_IRAM_8BIT diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c index 8a226b236f..2bdf993232 100644 --- a/components/esp_hw_support/periph_ctrl.c +++ b/components/esp_hw_support/periph_ctrl.c @@ -42,7 +42,7 @@ void periph_module_reset(periph_module_t periph) portEXIT_CRITICAL_SAFE(&periph_spinlock); } -#if CONFIG_ESP32_WIFI_ENABLED +#if CONFIG_ESP32_WIFI_ENABLED || CONFIG_BT_ENABLED IRAM_ATTR void wifi_bt_common_module_enable(void) { portENTER_CRITICAL_SAFE(&periph_spinlock); diff --git a/components/hal/esp32c2/include/hal/clk_gate_ll.h b/components/hal/esp32c2/include/hal/clk_gate_ll.h index 8bc09c3ca1..e9e215b34c 100644 --- a/components/hal/esp32c2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c2/include/hal/clk_gate_ll.h @@ -98,6 +98,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en // Don't assert reset on secure boot, otherwise AES is held in reset return SYSTEM_CRYPTO_SHA_RST; } + case PERIPH_MODEM_RPA_MODULE: + return BLE_RPA_REST_BIT; default: return 0; } @@ -132,6 +134,7 @@ static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) case PERIPH_WIFI_BT_COMMON_MODULE: case PERIPH_BT_BASEBAND_MODULE: case PERIPH_BT_LC_MODULE: + case PERIPH_MODEM_RPA_MODULE: return SYSTEM_WIFI_RST_EN_REG; case PERIPH_SHA_MODULE: diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index 33161ac474..b73a13d777 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -39,10 +39,6 @@ config SOC_BT_SUPPORTED bool default y -config SOC_BLUEDROID_SUPPORTED - bool - default y - config SOC_CLASSIC_BT_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index 38cbe76484..0002dd016a 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -69,7 +69,6 @@ #define SOC_MCPWM_SUPPORTED 1 #define SOC_SDMMC_HOST_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 -#define SOC_BLUEDROID_SUPPORTED 1 #define SOC_CLASSIC_BT_SUPPORTED 1 #define SOC_PCNT_SUPPORTED 1 #define SOC_WIFI_SUPPORTED 1 diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index b64541ba5a..fbe6a60578 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -21,7 +21,11 @@ config SOC_GDMA_SUPPORTED config SOC_BT_SUPPORTED bool - default n + default y + +config SOC_ESP_NIMBLE_CONTROLLER + bool + default y config SOC_WIFI_SUPPORTED bool diff --git a/components/soc/esp32c2/include/soc/modem_clkrst_reg.h b/components/soc/esp32c2/include/soc/modem_clkrst_reg.h new file mode 100644 index 0000000000..172de0b263 --- /dev/null +++ b/components/soc/esp32c2/include/soc/modem_clkrst_reg.h @@ -0,0 +1,126 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include "soc/soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define MODEM_CLKRST_CLK_CONF_REG (DR_REG_MODEM_CLKRST_BASE + 0x0) +/* MODEM_CLKRST_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_CLK_EN (BIT(0)) +#define MODEM_CLKRST_CLK_EN_M (BIT(0)) +#define MODEM_CLKRST_CLK_EN_V 0x1 +#define MODEM_CLKRST_CLK_EN_S 0 + +#define MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG (DR_REG_MODEM_CLKRST_BASE + 0x4) +/* MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM : R/W ;bitpos:[11:4] ;default: 8'h0 ; */ +/*description: .*/ +#define MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM 0x000000FF +#define MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_M ((MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_V)<<(MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S)) +#define MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_V 0xFF +#define MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S 4 +/* MODEM_CLKRST_LP_TIMER_SEL_XTAL32K : R/W ;bitpos:[3] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL32K (BIT(3)) +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_M (BIT(3)) +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_V 0x1 +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S 3 +/* MODEM_CLKRST_LP_TIMER_SEL_XTAL : R/W ;bitpos:[2] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL (BIT(2)) +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL_M (BIT(2)) +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL_V 0x1 +#define MODEM_CLKRST_LP_TIMER_SEL_XTAL_S 2 +/* MODEM_CLKRST_LP_TIMER_SEL_8M : R/W ;bitpos:[1] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_LP_TIMER_SEL_8M (BIT(1)) +#define MODEM_CLKRST_LP_TIMER_SEL_8M_M (BIT(1)) +#define MODEM_CLKRST_LP_TIMER_SEL_8M_V 0x1 +#define MODEM_CLKRST_LP_TIMER_SEL_8M_S 1 +/* MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW : R/W ;bitpos:[0] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW (BIT(0)) +#define MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_M (BIT(0)) +#define MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_V 0x1 +#define MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S 0 + +#define MODEM_CLKRST_COEX_LP_CLK_CONF_REG (DR_REG_MODEM_CLKRST_BASE + 0x8) +/* MODEM_CLKRST_COEX_LPCLK_DIV_NUM : R/W ;bitpos:[11:4] ;default: 8'h0 ; */ +/*description: .*/ +#define MODEM_CLKRST_COEX_LPCLK_DIV_NUM 0x000000FF +#define MODEM_CLKRST_COEX_LPCLK_DIV_NUM_M ((MODEM_CLKRST_COEX_LPCLK_DIV_NUM_V)<<(MODEM_CLKRST_COEX_LPCLK_DIV_NUM_S)) +#define MODEM_CLKRST_COEX_LPCLK_DIV_NUM_V 0xFF +#define MODEM_CLKRST_COEX_LPCLK_DIV_NUM_S 4 +/* MODEM_CLKRST_COEX_LPCLK_SEL_XTAL32K : R/W ;bitpos:[3] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL32K (BIT(3)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL32K_M (BIT(3)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL32K_V 0x1 +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL32K_S 3 +/* MODEM_CLKRST_COEX_LPCLK_SEL_XTAL : R/W ;bitpos:[2] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL (BIT(2)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL_M (BIT(2)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL_V 0x1 +#define MODEM_CLKRST_COEX_LPCLK_SEL_XTAL_S 2 +/* MODEM_CLKRST_COEX_LPCLK_SEL_8M : R/W ;bitpos:[1] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_COEX_LPCLK_SEL_8M (BIT(1)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_8M_M (BIT(1)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_8M_V 0x1 +#define MODEM_CLKRST_COEX_LPCLK_SEL_8M_S 1 +/* MODEM_CLKRST_COEX_LPCLK_SEL_RTC_SLOW : R/W ;bitpos:[0] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_COEX_LPCLK_SEL_RTC_SLOW (BIT(0)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_RTC_SLOW_M (BIT(0)) +#define MODEM_CLKRST_COEX_LPCLK_SEL_RTC_SLOW_V 0x1 +#define MODEM_CLKRST_COEX_LPCLK_SEL_RTC_SLOW_S 0 + +#define MODEM_CLKRST_BLE_TIMER_CLK_CONF_REG (DR_REG_MODEM_CLKRST_BASE + 0xC) +/* MODEM_CLKRST_BLETIMER_CLK_IS_ACTIVE : R/W ;bitpos:[1] ;default: 1'b1 ; */ +/*description: .*/ +#define MODEM_CLKRST_BLETIMER_CLK_IS_ACTIVE (BIT(1)) +#define MODEM_CLKRST_BLETIMER_CLK_IS_ACTIVE_M (BIT(1)) +#define MODEM_CLKRST_BLETIMER_CLK_IS_ACTIVE_V 0x1 +#define MODEM_CLKRST_BLETIMER_CLK_IS_ACTIVE_S 1 +/* MODEM_CLKRST_BLETIMER_USE_XTAL : R/W ;bitpos:[0] ;default: 1'b1 ; */ +/*description: .*/ +#define MODEM_CLKRST_BLETIMER_USE_XTAL (BIT(0)) +#define MODEM_CLKRST_BLETIMER_USE_XTAL_M (BIT(0)) +#define MODEM_CLKRST_BLETIMER_USE_XTAL_V 0x1 +#define MODEM_CLKRST_BLETIMER_USE_XTAL_S 0 + +#define MODEM_CLKRST_ETM_CLK_CONF_REG (DR_REG_MODEM_CLKRST_BASE + 0x10) +/* MODEM_CLKRST_ETM_CLK_ACTIVE : R/W ;bitpos:[1] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_ETM_CLK_ACTIVE (BIT(1)) +#define MODEM_CLKRST_ETM_CLK_ACTIVE_M (BIT(1)) +#define MODEM_CLKRST_ETM_CLK_ACTIVE_V 0x1 +#define MODEM_CLKRST_ETM_CLK_ACTIVE_S 1 +/* MODEM_CLKRST_ETM_CLK_SEL : R/W ;bitpos:[0] ;default: 1'b0 ; */ +/*description: .*/ +#define MODEM_CLKRST_ETM_CLK_SEL (BIT(0)) +#define MODEM_CLKRST_ETM_CLK_SEL_M (BIT(0)) +#define MODEM_CLKRST_ETM_CLK_SEL_V 0x1 +#define MODEM_CLKRST_ETM_CLK_SEL_S 0 + +#define MODEM_CLKRST_DATE_REG (DR_REG_MODEM_CLKRST_BASE + 0xC) +/* MODEM_CLKRST_DATE : R/W ;bitpos:[27:0] ;default: 28'h2107270 ; */ +/*description: .*/ +#define MODEM_CLKRST_DATE 0x0FFFFFFF +#define MODEM_CLKRST_DATE_M ((MODEM_CLKRST_DATE_V)<<(MODEM_CLKRST_DATE_S)) +#define MODEM_CLKRST_DATE_V 0xFFFFFFF +#define MODEM_CLKRST_DATE_S 0 + + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32c2/include/soc/periph_defs.h b/components/soc/esp32c2/include/soc/periph_defs.h index 97ffbefdc7..ad812d4eb1 100644 --- a/components/soc/esp32c2/include/soc/periph_defs.h +++ b/components/soc/esp32c2/include/soc/periph_defs.h @@ -32,6 +32,7 @@ typedef enum { PERIPH_GDMA_MODULE, PERIPH_SYSTIMER_MODULE, PERIPH_SARADC_MODULE, + PERIPH_MODEM_RPA_MODULE, PERIPH_MODULE_MAX } periph_module_t; diff --git a/components/soc/esp32c2/include/soc/reg_base.h b/components/soc/esp32c2/include/soc/reg_base.h index 77973a6cca..bdfe3f8039 100644 --- a/components/soc/esp32c2/include/soc/reg_base.h +++ b/components/soc/esp32c2/include/soc/reg_base.h @@ -40,5 +40,6 @@ #define DR_REG_BLE_TIMER_BASE 0x6004B800 #define DR_REG_BLE_SEC_BASE 0x6004C000 #define DR_REG_COEX_BIT_BASE 0x6004C400 +#define DR_REG_MODEM_CLKRST_BASE 0x6004d800 #define DR_REG_I2C_MST_BASE 0x6004E800 #define DR_REG_AES_XTS_BASE 0x600CC000 diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index ab6a666564..55780a0dfb 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -29,7 +29,8 @@ #define SOC_ADC_SUPPORTED 1 #define SOC_DEDICATED_GPIO_SUPPORTED 1 #define SOC_GDMA_SUPPORTED 1 -#define SOC_BT_SUPPORTED 0 // Enable during bringup, IDF-4357 +#define SOC_BT_SUPPORTED 1 +#define SOC_ESP_NIMBLE_CONTROLLER 1 #define SOC_WIFI_SUPPORTED 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_SUPPORTS_SECURE_DL_MODE 1 diff --git a/components/soc/esp32c2/include/soc/syscon_reg.h b/components/soc/esp32c2/include/soc/syscon_reg.h index bdbade2d89..9c4f8b5e61 100644 --- a/components/soc/esp32c2/include/soc/syscon_reg.h +++ b/components/soc/esp32c2/include/soc/syscon_reg.h @@ -209,6 +209,7 @@ extern "C" { #define BLE_REG_REST_BIT BIT(11) #define BLE_PWR_REG_REST_BIT BIT(12) #define BLE_BB_REG_REST_BIT BIT(13) +#define BLE_RPA_REST_BIT BIT(27) #define SYSCON_HOST_INF_SEL_REG (DR_REG_SYSCON_BASE + 0x1C) /* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */ diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index 74c34aae1d..4ebedf8127 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -27,10 +27,6 @@ config SOC_BT_SUPPORTED bool default y -config SOC_BLUEDROID_SUPPORTED - bool - default y - config SOC_ASYNC_MEMCPY_SUPPORTED bool default y diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 41e79af81e..e6c9e9ddeb 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -31,7 +31,6 @@ #define SOC_GDMA_SUPPORTED 1 #define SOC_TWAI_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 -#define SOC_BLUEDROID_SUPPORTED 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 #define SOC_TEMP_SENSOR_SUPPORTED 1 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 0d0ea68d3b..6ed1c9e699 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -27,10 +27,6 @@ config SOC_BT_SUPPORTED bool default y -config SOC_BLUEDROID_SUPPORTED - bool - default y - config SOC_ESP_NIMBLE_CONTROLLER bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index fc4d2a4d09..18bc3bfbd3 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -39,7 +39,6 @@ #define SOC_GDMA_SUPPORTED 1 #define SOC_TWAI_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 -#define SOC_BLUEDROID_SUPPORTED 1 #define SOC_ESP_NIMBLE_CONTROLLER 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index 443c3da2f5..7a60bfd6c6 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -115,10 +115,6 @@ config SOC_BT_SUPPORTED bool default y -config SOC_BLUEDROID_SUPPORTED - bool - default y - config SOC_USB_OTG_SUPPORTED bool default y diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index bf0a452094..8f5c5119d3 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -38,7 +38,6 @@ #define SOC_ULP_SUPPORTED 1 #define SOC_RISCV_COPROC_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 -#define SOC_BLUEDROID_SUPPORTED 1 #define SOC_USB_OTG_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 #define SOC_CCOMP_TIMER_SUPPORTED 1