From 9c195f52a359e12b86388b3e33dc3ce7389c614f Mon Sep 17 00:00:00 2001
From: wuzhenghui <wuzhenghui@espressif.com>
Date: Fri, 8 Nov 2024 18:44:14 +0800
Subject: [PATCH] fix(esp_system): writeback L1 Dcache before disable L2 if
 PSRAM used

---
 components/esp_system/port/soc/esp32p4/system_internal.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/components/esp_system/port/soc/esp32p4/system_internal.c b/components/esp_system/port/soc/esp32p4/system_internal.c
index 547f291810..14e12fdc4f 100644
--- a/components/esp_system/port/soc/esp32p4/system_internal.c
+++ b/components/esp_system/port/soc/esp32p4/system_internal.c
@@ -126,6 +126,9 @@ void IRAM_ATTR esp_restart_noos(void)
     wdt_hal_write_protect_enable(&wdt1_context);
 
     // Disable cache
+#if CONFIG_SPIRAM
+    Cache_WriteBack_All(CACHE_MAP_L1_DCACHE);
+#endif
     Cache_Disable_L2_Cache();
 
     esp_system_reset_modules_on_exit();