From 72430321235b6e122505afeece1c4753f9eebe38 Mon Sep 17 00:00:00 2001 From: cje Date: Wed, 17 Aug 2022 10:58:14 +0800 Subject: [PATCH] set fosc div to 1 to make chip run stablly for C2 --- components/soc/esp32c2/include/soc/rtc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/soc/esp32c2/include/soc/rtc.h b/components/soc/esp32c2/include/soc/rtc.h index 775c39cfbe..58a5cafd51 100644 --- a/components/soc/esp32c2/include/soc/rtc.h +++ b/components/soc/esp32c2/include/soc/rtc.h @@ -179,7 +179,7 @@ typedef struct { .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ .clk_rtc_clk_div = 0, \ - .clk_8m_clk_div = 0, \ + .clk_8m_clk_div = 1, \ .slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \ .clk_8m_dfreq = RTC_CNTL_CK8M_DFREQ_DEFAULT, \ }