Merge branch 'bugfix/minor_fixes' into 'master'

Minor fixes from various sources

- Fix memory debugging code. Noticed by Tuan.
- intr_enable/disable should be in IRAM. Noticed by rojer
- Still old timer code in examples in doxygen comments. Noticed on the forum by jumjum123
- Timer example was broken. Noticed on the forum by jumjum123

See merge request !325

components/driver/include/driver/gpio.h

@@ -343,9 +343,6 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
 /**
  * @brief   register GPIO interrupt handler, the handler is an ISR.
  *          The handler will be attached to the same CPU core that this function is running on.
- *          @note
- *          Users should know that which CPU is running and then pick a INUM that is not used by system.
- *          We can find the information of INUM and interrupt level in soc.h.
  *
  * @param  fn  Interrupt handler function.
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
@@ -444,12 +441,8 @@ esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
 /**
  *----------EXAMPLE TO SET ISR HANDLER ----------------------
  * @code{c}
- * gpio_isr_register(gpio_intr_test,NULL, 0);    //hook the isr handler for GPIO interrupt
+ * gpio_isr_register(gpio_intr_test, 0, NULL);    //hook the isr handler for GPIO interrupt
  * @endcode
- * @note
- *     1. user should arrange the INUMs that used, better not to use a same INUM for different interrupt.
- *     2. do not pick the INUM that already occupied by the system.
- *     3. refer to soc.h to check which INUMs that can be used.
  */
 /**
  *-------------EXAMPLE OF HANDLER FUNCTION-------------------*

components/driver/include/driver/uart.h

@@ -463,8 +463,6 @@ esp_err_t uart_intr_config(uart_port_t uart_num, const uart_intr_config_t *intr_
  * @brief Install UART driver.
  *
  * UART ISR handler will be attached to the same CPU core that this function is running on.
- * Users should know that which CPU is running and then pick a INUM that is not used by system.
- * We can find the information of INUM and interrupt level in soc.h.
  *
  * @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
  * @param rx_buffer_size UART RX ring buffer size
@@ -595,7 +593,6 @@ esp_err_t uart_flush(uart_port_t uart_num);
  * @code{c}
  * //1. Setup UART
  * #include "freertos/queue.h"
- * #define UART_INTR_NUM 17                                //choose one interrupt number from soc.h
  * //a. Set UART parameter
  * int uart_num = 0;                                       //uart port number
  * uart_config_t uart_config = {
@@ -658,7 +655,7 @@ esp_err_t uart_flush(uart_port_t uart_num);
  *     //Set UART1 pins(TX: IO16, RX: IO17, RTS: IO18, CTS: IO19)
  *     uart_set_pin(uart_num, 16, 17, 18, 19);
  *     //Install UART driver( We don't need an event queue here)
- *     uart_driver_install(uart_num, 1024 * 2, 1024*4, 10, 17, NULL, RINGBUF_TYPE_BYTEBUF);
+ *     uart_driver_install(uart_num, 1024 * 2, 1024*4, 10, NULL, 0);
  *     uint8_t data[1000];
  *     while(1) {
  *         //Read data from UART

components/esp32/intr_alloc.c

@@ -636,7 +636,7 @@ int esp_intr_get_cpu(intr_handle_t handle)
 //Muxing an interrupt source to interrupt 6, 7, 11, 15, 16 or 29 cause the interrupt to effectively be disabled.
 #define INT_MUX_DISABLED_INTNO 6
 
-esp_err_t esp_intr_enable(intr_handle_t handle)
+esp_err_t IRAM_ATTR esp_intr_enable(intr_handle_t handle)
 {
     if (!handle) return ESP_ERR_INVALID_ARG;
     portENTER_CRITICAL(&spinlock);
@@ -659,7 +659,7 @@ esp_err_t esp_intr_enable(intr_handle_t handle)
     return ESP_OK;
 }
 
-esp_err_t esp_intr_disable(intr_handle_t handle)
+esp_err_t IRAM_ATTR esp_intr_disable(intr_handle_t handle)
 {
     if (!handle) return ESP_ERR_INVALID_ARG;
     portENTER_CRITICAL(&spinlock);

components/freertos/heap_regions.c

@@ -174,7 +174,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /* The size of the structure placed at the beginning of each allocated memory
-block must by correctly byte aligned. */
+block must be correctly byte aligned. */
 static const uint32_t uxHeapStructSize  = ( ( sizeof ( BlockLink_t ) + BLOCK_HEAD_LEN + BLOCK_TAIL_LEN + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
 
 /* Create a couple of list links to mark the start and end of the list. */
@@ -583,7 +583,7 @@ const HeapRegionTagged_t *pxHeapRegion;
 
         #if (configENABLE_MEMORY_DEBUG == 1)
         {
-            mem_debug_init(uxHeapStructSize, &xStart, pxEnd, &xMallocMutex, xBlockAllocatedBit);
+            mem_debug_init(uxHeapStructSize, &xStart, pxEnd, &xMallocMutex);
             mem_check_all(0);
         }
         #endif

components/freertos/include/freertos/heap_regions_debug.h

@@ -22,9 +22,10 @@ typedef struct {
 
 /* Please keep this definition same as BlockLink_t */
 typedef struct _os_block_t {
-    struct _os_block_t *next;
+    struct _os_block_t *next;               /*<< The next free block in the list. */
-    size_t   size;
+    int size: 24;                           /*<< The size of the free block. */
-    unsigned int xtag;
+    int xtag: 7;                            /*<< Tag of this region */
+    int xAllocated: 1;                      /*<< 1 if allocated */
 }os_block_t;
 
 typedef struct {
@@ -50,7 +51,7 @@ typedef struct _mem_dbg_ctl{
 #define OS_BLOCK(_b)   ((os_block_t*)((debug_block_t*)((char*)(_b) + BLOCK_HEAD_LEN)))
 #define DEBUG_BLOCK(_b)  ((debug_block_t*)((char*)(_b) - BLOCK_HEAD_LEN))
 #define HEAD_DOG(_b) ((_b)->head.dog)
-#define TAIL_DOG(_b) (*(unsigned int*)((char*)(_b) + (((_b)->os_block.size & (~g_alloc_bit) ) - BLOCK_TAIL_LEN)))
+#define TAIL_DOG(_b) (*(unsigned int*)((char*)(_b) + (((_b)->os_block.size ) - BLOCK_TAIL_LEN)))
 
 #define DOG_ASSERT()\
 {\

examples/13_timer_group/main/timer_group.c

@@ -83,7 +83,7 @@ void IRAM_ATTR timer_group0_isr(void *para)
     uint32_t intr_status = TIMERG0.int_st_timers.val;
     timer_event_t evt;
     if((intr_status & BIT(timer_idx)) && timer_idx == TIMER_0) {
-        /*Timer0 is an example that don't reload counter value*/
+        /*Timer0 is an example that doesn't reload counter value*/
         TIMERG0.hw_timer[timer_idx].update = 1;
 
         /* We don't call a API here because they are not declared with IRAM_ATTR.
@@ -197,9 +197,9 @@ void tg0_timer1_init()
  */
 void app_main()
 {
+    timer_queue = xQueueCreate(10, sizeof(timer_event_t));
     tg0_timer0_init();
     tg0_timer1_init();
-    timer_queue = xQueueCreate(10, sizeof(timer_event_t));
+    xTaskCreate(timer_evt_task, "timer_evt_task", 2048, NULL, 5, NULL);
-    xTaskCreate(timer_evt_task, "timer_evt_task", 1024, NULL, 5, NULL);
 }