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https://github.com/espressif/esp-idf.git
synced 2025-11-02 16:11:41 +01:00
spiflash: add octal spi psram support on 727
This commit is contained in:
Armando
@@ -8,12 +8,46 @@
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#include <stdio.h>
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#include <string.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "spi_flash.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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uint8_t mode;
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uint8_t cmd_bit_len;
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uint16_t cmd;
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uint32_t addr;
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uint8_t addr_bit_len;
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uint8_t dummy_bit_len;
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uint8_t data_bit_len;
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uint8_t cs_sel: 4;
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uint8_t is_pe: 4;
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} esp_rom_opiflash_cmd_t;
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typedef struct {
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uint8_t addr_bit_len;
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uint8_t dummy_bit_len;
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uint16_t cmd;
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uint8_t cmd_bit_len;
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uint8_t var_dummy_en;
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} esp_rom_opiflash_spi0rd_t;
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typedef struct {
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esp_rom_opiflash_cmd_t rdid;
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esp_rom_opiflash_cmd_t rdsr;
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esp_rom_opiflash_cmd_t wren;
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esp_rom_opiflash_cmd_t se;
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esp_rom_opiflash_cmd_t be64k;
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esp_rom_opiflash_cmd_t read;
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esp_rom_opiflash_cmd_t pp;
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esp_rom_opiflash_spi0rd_t cache_rd_cmd;
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} esp_rom_opiflash_def_t;
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typedef struct {
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uint16_t cmd; /*!< Command value */
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uint16_t cmdBitLen; /*!< Command byte length*/
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@@ -40,7 +74,6 @@ typedef struct {
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#define ESP_ROM_SPIFLASH_BP2 BIT4
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#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
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#define ESP_ROM_SPIFLASH_QE BIT9
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#define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
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#define FLASH_OP_MODE_RDCMD_DOUT 0x3B
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#define ESP_ROM_FLASH_SECTOR_SIZE 0x1000
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@@ -112,8 +145,14 @@ typedef struct {
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#define ROM_FLASH_CMD_EN4B_GD 0xB7
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#define ROM_FLASH_CMD_DIS4B_GD 0xE9
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// spi user mode command config
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extern const esp_rom_opiflash_def_t *rom_opiflash_cmd_def;
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/**
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* @brief init legacy driver for Octal Flash
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*/
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void esp_rom_opiflash_legacy_driver_init(const esp_rom_opiflash_def_t *flash_cmd_def);
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// spi user mode command config
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/**
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* @brief Config the spi user command
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* @param spi_num spi port
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@@ -159,8 +198,6 @@ void esp_rom_spi_set_dtr_swap_mode(int spi, bool wr_swap, bool rd_swap);
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*/
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void esp_rom_opiflash_mode_reset(int spi_num);
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#if 0
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// MX25UM25645G opi flash interface
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/**
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* @brief To execute a flash operation command
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* @param spi_num spi port
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@@ -193,105 +230,91 @@ void esp_rom_opiflash_exec_cmd(int spi_num, esp_rom_spiflash_read_mode_t mode,
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*/
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void esp_rom_opiflash_soft_reset(int spi_num, esp_rom_spiflash_read_mode_t mode);
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/**
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* @brief to read opi flash ID(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode Flash Operation Mode
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* @return opi flash id
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*/
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uint32_t esp_rom_opiflash_read_id(int spi_num, esp_rom_spiflash_read_mode_t mode);
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/**
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* @brief to read opi flash status register(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode Flash Operation Mode
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* @brief to read opi flash ID
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* @note command format would be defined in initialization
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* @param[out] out_id buffer to accept id
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_read_id(uint8_t *out_id);
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/**
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* @brief to read opi flash status register
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* @note command format would be defined in initialization
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* @return opi flash status value
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*/
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uint8_t esp_rom_opiflash_rdsr(int spi_num, esp_rom_spiflash_read_mode_t mode);
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uint8_t esp_rom_opiflash_rdsr(void);
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/**
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* @brief wait opi flash status register to be idle
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* @param spi_num spi port
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* @param mode Flash Operation Mode
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*/
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void esp_rom_opiflash_wait_idle(int spi_num, esp_rom_spiflash_read_mode_t mode);
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/**
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* @brief to read the config register2(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode Flash Operation Mode
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* @param addr the address of configure register
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* @return value of config register2
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*/
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uint8_t esp_rom_opiflash_rdcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr);
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/**
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* @brief to write the config register2(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode Flash Operation Mode
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* @param addr the address of config register
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* @param val the value to write
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*/
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void esp_rom_opiflash_wrcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr, uint8_t val);
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/**
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* @brief to erase flash sector(for MX25UM25645G)
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* @param spi_num spi port
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* @param address the sector address to be erased
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* @param mode Flash operation mode
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* @note command format would be defined in initialization
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_sector(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
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esp_rom_spiflash_result_t esp_rom_opiflash_wait_idle(void);
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/**
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* @brief to erase flash block(for MX25UM25645G)
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* @param spi_num spi port
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* @param address the block address to be erased
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* @param mode Flash operation mode
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* @brief to erase flash sector
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* @note command format would be defined in initialization
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* @param sector_num the sector to be erased
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_block_64k(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_sector(uint32_t sector_num);
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/**
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* @brief to erase a flash area define by start address and length(for MX25UM25645G)
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* @param spi_num spi port
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* @brief to erase flash block
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* @note command format would be defined in initialization
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* @param block_num the block to be erased
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_block_64k(uint32_t block_num);
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/**
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* @brief to erase a flash area define by start address and length
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* @note command format would be defined in initialization
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* @param start_addr the start address to be erased
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* @param area_len the erea length to be erased
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* @param mode flash operation mode
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_area(int spi_num, uint32_t start_addr, uint32_t area_len, esp_rom_spiflash_read_mode_t mode);
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esp_rom_spiflash_result_t esp_rom_opiflash_erase_area(uint32_t start_addr, uint32_t area_len);
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/**
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* @brief to read data from opi flash(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode flash operation mode
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* @brief to read data from opi flash
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* @note command format would be defined in initialization
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* @param flash_addr flash address to read data from
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* @param data_addr data buffer to accept the data
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* @param len data length to be read
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_read(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, int len);
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esp_rom_spiflash_result_t esp_rom_opiflash_read(uint32_t flash_addr, void *data_addr, int len);
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/**
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* @brief to write data to opi flash(for MX25UM25645G)
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* @param spi_num spi port
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* @param mode flash operation mode
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* @brief to write data to opi flash
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* @note command format would be defined in initialization
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* @param flash_addr flash address to write data to
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* @param data_addr data buffer to write to flash
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* @param len data length to write
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* @return flash operation result
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*/
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esp_rom_spiflash_result_t esp_rom_opiflash_write(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, uint32_t len);
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esp_rom_spiflash_result_t esp_rom_opiflash_write(uint32_t flash_addr, const uint32_t *data_addr, int len);
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/**
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* @brief to set opi flash operation mode(for MX25UM25645G)
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* @param spi_num spi port
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* @param cur_mode current operation mode
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* @param target the target operation mode to be set
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* @brief send WREN command
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* @note command format would be defined in initialization
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* @param arg not used, set to NULL
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* @return flash operation result
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*/
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void esp_rom_opiflash_set_mode(int spi_num, esp_rom_spiflash_read_mode_t cur_mode, esp_rom_spiflash_read_mode_t target_mode);
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#endif
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esp_rom_spiflash_result_t esp_rom_opiflash_wren(void* arg);
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/**
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* @brief to configure SPI0 read flash command format for cache
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* @note command format would be defined in initialization
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*
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*/
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void esp_rom_opiflash_cache_mode_config(esp_rom_spiflash_read_mode_t mode, const esp_rom_opiflash_spi0rd_t *cache);
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esp_rom_spiflash_result_t esp_rom_opiflash_read_raw(uint32_t flash_addr, uint8_t* buf, int len);
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#ifdef __cplusplus
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}
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@@ -121,7 +121,12 @@ typedef enum {
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ESP_ROM_SPIFLASH_DIO_MODE,
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ESP_ROM_SPIFLASH_DOUT_MODE,
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ESP_ROM_SPIFLASH_FASTRD_MODE,
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ESP_ROM_SPIFLASH_SLOWRD_MODE
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ESP_ROM_SPIFLASH_SLOWRD_MODE,
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ESP_ROM_SPIFLASH_OPI_STR_MODE,
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ESP_ROM_SPIFLASH_OPI_DTR_MODE,
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ESP_ROM_SPIFLASH_OOUT_MODE,
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ESP_ROM_SPIFLASH_OIO_STR_MODE,
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ESP_ROM_SPIFLASH_OIO_DTR_MODE,
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} esp_rom_spiflash_read_mode_t;
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typedef enum {
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@@ -148,6 +153,34 @@ typedef struct {
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uint16_t data;
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} esp_rom_spiflash_common_cmd_t;
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typedef void (*spi_flash_func_t)(void);
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typedef esp_rom_spiflash_result_t (*spi_flash_op_t)(void);
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typedef esp_rom_spiflash_result_t (*spi_flash_erase_t)(uint32_t);
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typedef esp_rom_spiflash_result_t (*spi_flash_rd_t)(uint32_t, void*, int);
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typedef esp_rom_spiflash_result_t (*spi_flash_wr_t)(uint32_t, const uint32_t*, int);
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typedef esp_rom_spiflash_result_t (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
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typedef esp_rom_spiflash_result_t (*spi_flash_wren_t)(void*);
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typedef esp_rom_spiflash_result_t (* spi_flash_erase_area_t)(uint32_t, uint32_t);
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typedef struct {
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uint8_t pp_addr_bit_len;
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uint8_t se_addr_bit_len;
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uint8_t be_addr_bit_len;
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uint8_t rd_addr_bit_len;
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uint32_t read_sub_len;
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uint32_t write_sub_len;
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spi_flash_op_t unlock;
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spi_flash_erase_t erase_sector;
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spi_flash_erase_t erase_block;
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spi_flash_rd_t read;
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spi_flash_wr_t write;
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spi_flash_ewr_t encrypt_write;
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spi_flash_func_t check_sus;
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spi_flash_wren_t wren;
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spi_flash_op_t wait_idle;
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spi_flash_erase_area_t erase_area;
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} spiflash_legacy_funcs_t;
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/**
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* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
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@@ -548,33 +581,6 @@ void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
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* @return always ESP_ROM_SPIFLASH_RESULT_OK
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*/
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esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
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typedef void (* spi_flash_func_t)(void);
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typedef SpiFlashOpResult (* spi_flash_op_t)(void);
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typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
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typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
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typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
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typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
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typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
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typedef struct {
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uint32_t read_sub_len;
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uint32_t write_sub_len;
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spi_flash_op_t unlock;
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spi_flash_erase_t erase_sector;
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spi_flash_erase_t erase_block;
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spi_flash_rd_t read;
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spi_flash_wr_t write;
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spi_flash_ewr_t encrypt_write;
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spi_flash_func_t check_sus;
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spi_flash_wren_t wren;
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spi_flash_op_t wait_idle;
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} spiflash_legacy_funcs_t;
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/* Defined in the interfaces file, default value is rom_default_spiflash_legacy_flash_func */
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extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
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typedef struct {
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esp_rom_spiflash_chip_t chip;
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uint8_t dummy_len_plus[3];
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