From bd92e95160644d843f52b6629256c85e5bd4ae2a Mon Sep 17 00:00:00 2001
From: fuzhibo <fuzhibo@espressif.com>
Date: Thu, 11 Jun 2020 22:05:18 +0800
Subject: [PATCH] driver(adc): add adc-dma code for esp32

---
 components/driver/esp32/adc.c                 |  34 +++-
 components/driver/esp32s2/adc.c               |   2 +-
 .../driver/esp32s2/include/driver/adc.h       |  23 ---
 components/driver/include/driver/adc_common.h |  77 +++++--
 components/soc/include/hal/adc_hal.h          |  16 ++
 components/soc/include/hal/adc_types.h        | 188 ++++++++++--------
 .../soc/soc/esp32/include/soc/adc_caps.h      |   4 +-
 components/soc/src/esp32/adc_hal.c            |   6 +-
 .../soc/src/esp32/include/hal/adc_hal.h       |  33 ---
 components/soc/src/esp32/include/hal/adc_ll.h |  35 +---
 .../soc/src/esp32s2/include/hal/adc_hal.h     |  17 --
 11 files changed, 211 insertions(+), 224 deletions(-)

diff --git a/components/driver/esp32/adc.c b/components/driver/esp32/adc.c
index cdd4448c6c..351601968e 100644
--- a/components/driver/esp32/adc.c
+++ b/components/driver/esp32/adc.c
@@ -40,7 +40,6 @@
 
 #define ADC_MAX_MEAS_NUM_DEFAULT      (255)
 #define ADC_MEAS_NUM_LIM_DEFAULT      (1)
-#define SAR_ADC_CLK_DIV_DEFUALT       (2)
 
 #define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIGI_FORMAT_12BIT)
 #define DIG_ADC_ATTEN_DEFUALT         (ADC_ATTEN_DB_11)
@@ -94,14 +93,13 @@ esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
         ADC_CHANNEL_CHECK(ADC_NUM_2, channel);
     }
 
-    adc_hal_digi_pattern_table_t adc1_pattern[1];
-    adc_hal_digi_pattern_table_t adc2_pattern[1];
-    adc_hal_digi_config_t dig_cfg = {
+    adc_digi_pattern_table_t adc1_pattern[1];
+    adc_digi_pattern_table_t adc2_pattern[1];
+    adc_digi_config_t dig_cfg = {
         .conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
         .conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
-        .clk_div = SAR_ADC_CLK_DIV_DEFUALT,
         .format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
-        .conv_mode = (adc_hal_digi_convert_mode_t)adc_unit,
+        .conv_mode = (adc_digi_convert_mode_t)adc_unit,
     };
 
     if (adc_unit & ADC_UNIT_1) {
@@ -127,6 +125,30 @@ esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
     return ESP_OK;
 }
 
+esp_err_t adc_digi_init(void)
+{
+    ADC_ENTER_CRITICAL();
+    adc_hal_digi_init();
+    ADC_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t adc_digi_deinit(void)
+{
+    ADC_ENTER_CRITICAL();
+    adc_hal_digi_deinit();
+    ADC_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
+{
+    ADC_ENTER_CRITICAL();
+    adc_hal_digi_controller_config(config);
+    ADC_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
 /*---------------------------------------------------------------
                     RTC controller setting
 ---------------------------------------------------------------*/
diff --git a/components/driver/esp32s2/adc.c b/components/driver/esp32s2/adc.c
index 937785248f..7eaecace38 100644
--- a/components/driver/esp32s2/adc.c
+++ b/components/driver/esp32s2/adc.c
@@ -72,7 +72,7 @@ esp_err_t adc_digi_init(void)
 esp_err_t adc_digi_deinit(void)
 {
     ADC_ENTER_CRITICAL();
-    adc_hal_digi_init();
+    adc_hal_digi_deinit();
     ADC_EXIT_CRITICAL();
     return ESP_OK;
 }
diff --git a/components/driver/esp32s2/include/driver/adc.h b/components/driver/esp32s2/include/driver/adc.h
index 65bda25c27..10c201e60b 100644
--- a/components/driver/esp32s2/include/driver/adc.h
+++ b/components/driver/esp32s2/include/driver/adc.h
@@ -44,29 +44,6 @@ esp_err_t adc_arbiter_config(adc_unit_t adc_unit, adc_arbiter_t *config);
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
-/**
- * @brief ADC digital controller initialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_init(void);
-
-/**
- * @brief ADC digital controller deinitialization.
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_deinit(void);
-
-/**
- * @brief Setting the digital controller.
- *
- * @param config Pointer to digital controller paramter. Refer to `adc_digi_config_t`.
- *
- * @return
- *      - ESP_OK Success
- */
-esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
 
 /**
  * @brief Enable digital controller to trigger the measurement.
diff --git a/components/driver/include/driver/adc_common.h b/components/driver/include/driver/adc_common.h
index 2c426b71d6..c8c7f0cbab 100644
--- a/components/driver/include/driver/adc_common.h
+++ b/components/driver/include/driver/adc_common.h
@@ -84,6 +84,35 @@ typedef enum {
     ADC_ENCODE_MAX,
 } adc_i2s_encode_t;
 
+/*---------------------------------------------------------------
+                    Common setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief Enable ADC power
+ */
+void adc_power_on(void);
+
+/**
+ * @brief Power off SAR ADC
+ * This function will force power down for ADC
+ */
+void adc_power_off(void);
+
+/**
+ * @brief Initialize ADC pad
+ * @param adc_unit ADC unit index
+ * @param channel ADC channel index
+ * @return
+ *     - ESP_OK success
+ *     - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
+
+/*---------------------------------------------------------------
+                    RTC controller setting
+---------------------------------------------------------------*/
+
 /**
  * @brief Get the GPIO number of a specific ADC1 channel.
  *
@@ -173,27 +202,6 @@ esp_err_t adc1_config_width(adc_bits_width_t width_bit);
  */
 int adc1_get_raw(adc1_channel_t channel);
 
-/**
- * @brief Enable ADC power
- */
-void adc_power_on(void);
-
-/**
- * @brief Power off SAR ADC
- * This function will force power down for ADC
- */
-void adc_power_off(void);
-
-/**
- * @brief Initialize ADC pad
- * @param adc_unit ADC unit index
- * @param channel ADC channel index
- * @return
- *     - ESP_OK success
- *     - ESP_ERR_INVALID_ARG Parameter error
- */
-esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
-
 /**
  * @brief Set ADC data invert
  * @param adc_unit ADC unit index
@@ -345,6 +353,33 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
  *                  - ESP_ERR_INVALID_ARG: Unsupported GPIO
  */
 esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
+/*---------------------------------------------------------------
+                    Digital controller setting
+---------------------------------------------------------------*/
+
+/**
+ * @brief ADC digital controller initialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_init(void);
+
+/**
+ * @brief ADC digital controller deinitialization.
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_deinit(void);
+
+/**
+ * @brief Setting the digital controller.
+ *
+ * @param config Pointer to digital controller paramter. Refer to `adc_digi_config_t`.
+ *
+ * @return
+ *      - ESP_OK Success
+ */
+esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
 
 #ifdef __cplusplus
 }
diff --git a/components/soc/include/hal/adc_hal.h b/components/soc/include/hal/adc_hal.h
index e497149e61..3a0a5a5c55 100644
--- a/components/soc/include/hal/adc_hal.h
+++ b/components/soc/include/hal/adc_hal.h
@@ -185,6 +185,22 @@ int adc_hal_convert(adc_ll_num_t adc_n, int channel, int *value);
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
+/**
+ * Digital controller initialization.
+ */
+void adc_hal_digi_init(void);
+
+/**
+ * Digital controller deinitialization.
+ */
+void adc_hal_digi_deinit(void);
+
+/**
+ * Setting the digital controller.
+ *
+ * @param cfg Pointer to digital controller paramter.
+ */
+void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
 
 /**
  * Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
diff --git a/components/soc/include/hal/adc_types.h b/components/soc/include/hal/adc_types.h
index 5f3d5a134c..ae6283c73b 100644
--- a/components/soc/include/hal/adc_types.h
+++ b/components/soc/include/hal/adc_types.h
@@ -89,6 +89,49 @@ typedef enum {
     ADC_WIDTH_MAX,
 } adc_bits_width_t;
 
+/**
+ * @brief ADC digital controller (DMA mode) work mode.
+ *
+ * @note  The conversion mode affects the sampling frequency:
+ *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
+ *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
+ *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
+ *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
+ */
+typedef enum {
+    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1. */
+    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2. */
+    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2. */
+    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode. */
+    ADC_CONV_UNIT_MAX,
+} adc_digi_convert_mode_t;
+
+/**
+ * @brief ADC digital controller (DMA mode) conversion rules setting.
+ */
+typedef struct {
+    union {
+        struct {
+            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration.
+                                         0: input voltage * 1;
+                                         1: input voltage * 1/1.34;
+                                         2: input voltage * 1/2;
+                                         3: input voltage * 1/3.6. */
+#ifdef CONFIG_IDF_TARGET_ESP32
+            uint8_t bit_width: 2;   /*!< ADC resolution.
+-                                         0: 9 bit;
+-                                         1: 10 bit;
+-                                         2: 11 bit;
+-                                         3: 12 bit. */
+#elif CONFIG_IDF_TARGET_ESP32S2
+            uint8_t reserved:  2;   /*!< reserved0 */
+#endif
+            uint8_t channel:   4;   /*!< ADC channel index. */
+        };
+        uint8_t val;
+    };
+} adc_digi_pattern_table_t;
+
 /**
  * @brief ADC digital controller (DMA mode) output data format option.
  */
@@ -141,6 +184,64 @@ typedef struct {
     uint32_t div_a;     /*!<Division factor. Range: 0 ~ 63. */
 } adc_digi_clk_t;
 
+#endif //CONFIG_IDF_TARGET_ESP32S2
+
+/**
+ * @brief ADC digital controller (DMA mode) configuration parameters.
+ *
+ * ESP32S2: Example setting: Use ADC1 channel0 to measure voltage, the sampling rate is required to be 1KHz:
+ *     +---------------------+--------+--------+--------+
+ *     | sample rate         |  1KHz  |  1KHz  |  1KHz  |
+ *     +---------------------+--------+--------+--------+
+ *     | conv_mode           | single |  both  |  alter |
+ *     | adc1_pattern_len    |    1   |    1   |    1   |
+ *     | dig_clk.use_apll    |    0   |    0   |    0   |
+ *     | dig_clk.div_num     |   99   |   99   |   99   |
+ *     | dig_clk.div_b       |    0   |    0   |    0   |
+ *     | dig_clk.div_a       |    0   |    0   |    0   |
+ *     | interval            |  400   |  400   |  200   |
+ *     +---------------------+--------+--------+--------+
+ *     | `trigger_meas_freq` |  1KHz  |  1KHz  |  2KHz  |
+ *     +---------------------+--------+--------+--------+
+ *
+ * ESP32S2: Explain the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA output:
+ *     +---------------------+--------+--------+--------+
+ *     | conv_mode           | single |  both  |  alter |
+ *     +---------------------+--------+--------+--------+
+ *     | trigger meas times  |    1   |    1   |    1   |
+ *     +---------------------+--------+--------+--------+
+ *     | conv_limit_num      |   +1   |   +1   |   +1   |
+ *     | dma_eof_num         |   +1   |   +2   |   +1   |
+ *     | dma output (byte)   |   +2   |   +4   |   +2   |
+ *     +---------------------+--------+--------+--------+
+ */
+typedef struct {
+    bool conv_limit_en;         /*!<Enable the function of limiting ADC conversion times.
+                                    If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
+    uint32_t conv_limit_num;    /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
+    uint32_t adc1_pattern_len;  /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
+                                    The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
+                                    resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
+                                    pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
+    uint32_t adc2_pattern_len;  /*!<Refer to ``adc1_pattern_len`` */
+    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
+    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to ``adc1_pattern`` */
+    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
+    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
+#ifdef CONFIG_IDF_TARGET_ESP32S2
+    uint32_t interval;          /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
+                                    The unit is the divided clock. Range: 40 ~ 4095.
+                                    Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
+                                    Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
+    adc_digi_clk_t dig_clk;     /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t`` */
+    uint32_t dma_eof_num;       /*!<DMA eof num of adc digital controller.
+                                    If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
+                                    Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
+#endif
+} adc_digi_config_t;
+
+#ifdef CONFIG_IDF_TARGET_ESP32S2
+
 /**
  * @brief ADC arbiter work mode option.
  *
@@ -177,41 +278,6 @@ typedef struct {
     .pwdet_pri = 2, \
 }
 
-/**
- * @brief ADC digital controller (DMA mode) work mode.
- *
- * @note  The conversion mode affects the sampling frequency:
- *        SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once.
- *        SINGLE_UNIT_2: When the measurement is triggered, only ADC2 is sampled once.
- *        BOTH_UNIT    : When the measurement is triggered, ADC1 and ADC2 are sampled at the same time.
- *        ALTER_UNIT   : When the measurement is triggered, ADC1 or ADC2 samples alternately.
- */
-typedef enum {
-    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1. */
-    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2. */
-    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2. */
-    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode. */
-    ADC_CONV_UNIT_MAX,
-} adc_digi_convert_mode_t;
-
-/**
- * @brief ADC digital controller (DMA mode) conversion rules setting.
- */
-typedef struct {
-    union {
-        struct {
-            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration.
-                                         0: input voltage * 1;
-                                         1: input voltage * 1/1.34;
-                                         2: input voltage * 1/2;
-                                         3: input voltage * 1/3.6. */
-            uint8_t reserved:  2;   /*!< reserved0 */
-            uint8_t channel:   4;   /*!< ADC channel index. */
-        };
-        uint8_t val;                /*!< Raw entry value */
-    };
-} adc_digi_pattern_table_t;
-
 /**
  * @brief ADC digital controller (DMA mode) interrupt type options.
  */
@@ -221,58 +287,6 @@ typedef enum {
     ADC_DIGI_INTR_MASK_ALL = 0x3,
 } adc_digi_intr_t;
 
-/**
- * @brief ADC digital controller (DMA mode) configuration parameters.
- *
- * Example setting: Use ADC1 channel0 to measure voltage, the sampling rate is required to be 1KHz:
- *     +---------------------+--------+--------+--------+
- *     | sample rate         |  1KHz  |  1KHz  |  1KHz  |
- *     +---------------------+--------+--------+--------+
- *     | conv_mode           | single |  both  |  alter |
- *     | adc1_pattern_len    |    1   |    1   |    1   |
- *     | dig_clk.use_apll    |    0   |    0   |    0   |
- *     | dig_clk.div_num     |   99   |   99   |   99   |
- *     | dig_clk.div_b       |    0   |    0   |    0   |
- *     | dig_clk.div_a       |    0   |    0   |    0   |
- *     | interval            |  400   |  400   |  200   |
- *     +---------------------+--------+--------+--------+
- *     | `trigger_meas_freq` |  1KHz  |  1KHz  |  2KHz  |
- *     +---------------------+--------+--------+--------+
- *
- * Explain the relationship between `conv_limit_num`, `dma_eof_num` and the number of DMA output:
- *     +---------------------+--------+--------+--------+
- *     | conv_mode           | single |  both  |  alter |
- *     +---------------------+--------+--------+--------+
- *     | trigger meas times  |    1   |    1   |    1   |
- *     +---------------------+--------+--------+--------+
- *     | conv_limit_num      |   +1   |   +1   |   +1   |
- *     | dma_eof_num         |   +1   |   +2   |   +1   |
- *     | dma output (byte)   |   +2   |   +4   |   +2   |
- *     +---------------------+--------+--------+--------+
- */
-typedef struct {
-    bool conv_limit_en;         /*!<Enable the function of limiting ADC conversion times.
-                                    If the number of ADC conversion trigger count is equal to the `limit_num`, the conversion is stopped. */
-    uint32_t conv_limit_num;    /*!<Set the upper limit of the number of ADC conversion triggers. Range: 1 ~ 255. */
-    uint32_t adc1_pattern_len;  /*!<Pattern table length for digital controller. Range: 0 ~ 16 (0: Don't change the pattern table setting).
-                                    The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
-                                    resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                    pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    uint32_t adc2_pattern_len;  /*!<Refer to ``adc1_pattern_len`` */
-    adc_digi_pattern_table_t *adc1_pattern;  /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
-    adc_digi_pattern_table_t *adc2_pattern;  /*!<Refer to ``adc1_pattern`` */
-    adc_digi_convert_mode_t conv_mode;       /*!<ADC conversion mode for digital controller. See ``adc_digi_convert_mode_t``. */
-    adc_digi_output_format_t format;         /*!<ADC output data format for digital controller. See ``adc_digi_output_format_t``. */
-    uint32_t interval;          /*!<The number of interval clock cycles for the digital controller to trigger the measurement.
-                                    The unit is the divided clock. Range: 40 ~ 4095.
-                                    Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. Refer to ``adc_digi_clk_t``.
-                                    Note: The sampling rate of each channel is also related to the conversion mode (See ``adc_digi_convert_mode_t``) and pattern table settings. */
-    adc_digi_clk_t dig_clk;     /*!<ADC digital controller clock divider settings. Refer to ``adc_digi_clk_t`` */
-    uint32_t dma_eof_num;       /*!<DMA eof num of adc digital controller.
-                                    If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
-                                    Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
-} adc_digi_config_t;
-
 /**
  * @brief ADC digital controller (DMA mode) filter index options.
  *
diff --git a/components/soc/soc/esp32/include/soc/adc_caps.h b/components/soc/soc/esp32/include/soc/adc_caps.h
index dbcb6483d9..e7af39c4fe 100644
--- a/components/soc/soc/esp32/include/soc/adc_caps.h
+++ b/components/soc/soc/esp32/include/soc/adc_caps.h
@@ -26,4 +26,6 @@
 
 #define SOC_ADC_PWDET_CCT_DEFAULT           (4)
 
-#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (2)
\ No newline at end of file
+#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (2)
+
+#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT    (2)
\ No newline at end of file
diff --git a/components/soc/src/esp32/adc_hal.c b/components/soc/src/esp32/adc_hal.c
index 3d60dc80f9..8a06631401 100644
--- a/components/soc/src/esp32/adc_hal.c
+++ b/components/soc/src/esp32/adc_hal.c
@@ -20,8 +20,7 @@
 void adc_hal_digi_init(void)
 {
     adc_hal_init();
-    adc_hal_set_sar_clk_div(ADC_NUM_1, SOC_ADC_SAR_CLK_DIV_DEFAULT(ADC_NUM_1));
-    adc_hal_set_sar_clk_div(ADC_NUM_2, SOC_ADC_SAR_CLK_DIV_DEFAULT(ADC_NUM_2));
+    adc_ll_digi_set_clk_div(SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT);
 }
 
 void adc_hal_digi_deinit(void)
@@ -31,11 +30,10 @@ void adc_hal_digi_deinit(void)
     adc_hal_deinit();
 }
 
-void adc_hal_digi_controller_config(const adc_hal_digi_config_t *cfg)
+void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
 {
     /* If enable digital controller, adc xpd should always on. */
     adc_ll_set_power_manage(ADC_POWER_SW_ON);
-    adc_ll_digi_set_clk_div(cfg->clk_div);
     /* Single channel mode or multi channel mode. */
     adc_ll_digi_set_convert_mode(cfg->conv_mode);
     if (cfg->conv_mode & ADC_CONV_SINGLE_UNIT_1) {
diff --git a/components/soc/src/esp32/include/hal/adc_hal.h b/components/soc/src/esp32/include/hal/adc_hal.h
index 1bd84bd217..4755054408 100644
--- a/components/soc/src/esp32/include/hal/adc_hal.h
+++ b/components/soc/src/esp32/include/hal/adc_hal.h
@@ -31,22 +31,6 @@
 extern "C" {
 #endif
 
-typedef struct {
-    bool conv_limit_en;         /*!<Enable max conversion number detection for digital controller.
-                                    If the number of ADC conversion is equal to the `limit_num`, the conversion is stopped. */
-    uint32_t conv_limit_num;    /*!<ADC max conversion number for digital controller. */
-    uint32_t adc1_pattern_len;  /*!<Pattern table length for digital controller. Range: 0 ~ 16.
-                                    The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
-                                    resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
-                                    pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself. */
-    uint32_t adc2_pattern_len;  /*!<Refer to `adc1_pattern_len` */
-    adc_hal_digi_pattern_table_t *adc1_pattern;   /*!<Pointer to pattern table for digital controller. The table size defined by `adc1_pattern_len`. */
-    adc_hal_digi_pattern_table_t *adc2_pattern;   /*!<Refer to `adc1_pattern` */
-    adc_hal_digi_convert_mode_t conv_mode;        /*!<ADC conversion mode for digital controller. ESP32 only support ADC1 single mode. */
-    adc_digi_output_format_t format;      /*!<ADC output data format for digital controller. */
-    uint32_t clk_div;           /*!< ADC module clock division factor. ADC clock divided from APB clock.*/
-} adc_hal_digi_config_t;
-
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
@@ -58,27 +42,10 @@ typedef struct {
  */
 #define adc_hal_digi_set_data_source(src) adc_ll_digi_set_data_source(src)
 
-/**
- * Setting the digital controller.
- *
- * @prarm adc_digi_config_t cfg Pointer to digital controller paramter.
- */
-void adc_hal_digi_controller_config(const adc_hal_digi_config_t *cfg);
-
 /*---------------------------------------------------------------
                     Common setting
 ---------------------------------------------------------------*/
 
-/**
- * @brief ADC digital controller initialization.
- */
-void adc_hal_digi_init(void);
-
-/**
- * @brief ADC digital controller deinitialization.
- */
-void adc_hal_digi_deinit(void);
-
 /*---------------------------------------------------------------
                     Hall sensor setting
 ---------------------------------------------------------------*/
diff --git a/components/soc/src/esp32/include/hal/adc_ll.h b/components/soc/src/esp32/include/hal/adc_ll.h
index a472ae6673..f6de5d23e1 100644
--- a/components/soc/src/esp32/include/hal/adc_ll.h
+++ b/components/soc/src/esp32/include/hal/adc_ll.h
@@ -8,39 +8,12 @@
 extern "C" {
 #endif
 
-typedef enum {
-    ADC_CONV_SINGLE_UNIT_1 = 1, /*!< SAR ADC 1*/
-    ADC_CONV_SINGLE_UNIT_2 = 2, /*!< SAR ADC 2, not supported yet*/
-    ADC_CONV_BOTH_UNIT     = 3, /*!< SAR ADC 1 and 2, not supported yet */
-    ADC_CONV_ALTER_UNIT    = 7, /*!< SAR ADC 1 and 2 alternative mode, not supported yet */
-    ADC_CONV_UNIT_MAX,
-} adc_hal_digi_convert_mode_t;
-
 typedef enum {
     ADC_NUM_1 = 0,          /*!< SAR ADC 1 */
     ADC_NUM_2 = 1,          /*!< SAR ADC 2 */
     ADC_NUM_MAX,
 } adc_ll_num_t;
 
-typedef struct {
-    union {
-        struct {
-            uint8_t atten:     2;   /*!< ADC sampling voltage attenuation configuration.
-                                         0: input voltage * 1;
-                                         1: input voltage * 1/1.34;
-                                         2: input voltage * 1/2;
-                                         3: input voltage * 1/3.6. */
-            uint8_t bit_width: 2;   /*!< ADC resolution.
-                                         0: 9 bit;
-                                         1: 10 bit;
-                                         2: 11 bit;
-                                         3: 12 bit. */
-            uint8_t channel:   4;   /*!< ADC channel index. */
-        };
-        uint8_t val;
-    };
-} adc_hal_digi_pattern_table_t;
-
 typedef enum {
     ADC_POWER_BY_FSM,   /*!< ADC XPD controlled by FSM. Used for polling mode */
     ADC_POWER_SW_ON,    /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
@@ -151,9 +124,9 @@ static inline void adc_ll_digi_convert_limit_disable(void)
  *
  * @note ESP32 only support ADC1 single mode.
  *
- * @param mode Conversion mode select, see ``adc_hal_digi_convert_mode_t``.
+ * @param mode Conversion mode select, see ``adc_digi_convert_mode_t``.
  */
-static inline void adc_ll_digi_set_convert_mode(adc_hal_digi_convert_mode_t mode)
+static inline void adc_ll_digi_set_convert_mode(adc_digi_convert_mode_t mode)
 {
     if (mode == ADC_CONV_SINGLE_UNIT_1) {
         SYSCON.saradc_ctrl.work_mode = 0;
@@ -219,9 +192,9 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_ll_num_t adc_n, uint32_
  *
  * @param adc_n ADC unit.
  * @param pattern_index Items index. Range: 0 ~ 15.
- * @param pattern Stored conversion rules, see ``adc_hal_digi_pattern_table_t``.
+ * @param pattern Stored conversion rules, see ``adc_digi_pattern_table_t``.
  */
-static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_hal_digi_pattern_table_t pattern)
+static inline void adc_ll_digi_set_pattern_table(adc_ll_num_t adc_n, uint32_t pattern_index, adc_digi_pattern_table_t pattern)
 {
     uint32_t tab;
     uint8_t index = pattern_index / 4;
diff --git a/components/soc/src/esp32s2/include/hal/adc_hal.h b/components/soc/src/esp32s2/include/hal/adc_hal.h
index a533ec18c5..3522d424aa 100644
--- a/components/soc/src/esp32s2/include/hal/adc_hal.h
+++ b/components/soc/src/esp32s2/include/hal/adc_hal.h
@@ -34,23 +34,6 @@ extern "C" {
 /*---------------------------------------------------------------
                     Digital controller setting
 ---------------------------------------------------------------*/
-/**
- * Digital controller initialization.
- */
-void adc_hal_digi_init(void);
-
-/**
- * Digital controller deinitialization.
- */
-void adc_hal_digi_deinit(void);
-
-/**
- * Setting the digital controller.
- *
- * @param cfg Pointer to digital controller paramter.
- */
-void adc_hal_digi_controller_config(const adc_digi_config_t *cfg);
-
 /**
  * ADC Digital controller output data invert or not.
  *