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soc: Add a soc cap, SOC_CLK_RC_FAST_D256_SUPPORTED, for whether the target has the RC_FAST_D256 clock

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This commit is contained in:
Song Ruo Jing
2022-10-27 17:18:17 +08:00
parent 2557e24a28
commit be0fdfa176
38 changed files with 170 additions and 145 deletions
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4
components/bootloader_support/test_apps/bootloader_support/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/bootloader_support/test_apps/rtc_custom_section/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- |

4
components/console/test_apps/console/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/driver/ledc.c
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@@ -101,8 +101,8 @@ static bool ledc_slow_clk_calibrate(void)
{ {
if (periph_rtc_dig_clk8m_enable()) { if (periph_rtc_dig_clk8m_enable()) {
s_ledc_slow_clk_8M = periph_rtc_dig_clk8m_get_freq(); s_ledc_slow_clk_8M = periph_rtc_dig_clk8m_get_freq();
#if CONFIG_IDF_TARGET_ESP32H2 #if !SOC_CLK_RC_FAST_D256_SUPPORTED
/* Workaround: Calibration cannot be done for CLK8M on H2, we just use its theoretic frequency */ /* Workaround: CLK8M calibration cannot be performed if there is no d256 div clk, we can only use its theoretic freq */
ESP_LOGD(LEDC_TAG, "Calibration cannot be performed, approximate CLK8M_CLK : %"PRIu32" Hz", s_ledc_slow_clk_8M); ESP_LOGD(LEDC_TAG, "Calibration cannot be performed, approximate CLK8M_CLK : %"PRIu32" Hz", s_ledc_slow_clk_8M);
#else #else
ESP_LOGD(LEDC_TAG, "Calibrate CLK8M_CLK : %"PRIu32" Hz", s_ledc_slow_clk_8M); ESP_LOGD(LEDC_TAG, "Calibrate CLK8M_CLK : %"PRIu32" Hz", s_ledc_slow_clk_8M);

4
components/esp-tls/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_app_format/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_http_client/test_apps/README.md
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@@ -1,3 +1,3 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_http_server/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

6
components/esp_hw_support/clk_ctrl_os.c
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@@ -26,7 +26,7 @@ bool periph_rtc_dig_clk8m_enable(void)
portENTER_CRITICAL(&periph_spinlock); portENTER_CRITICAL(&periph_spinlock);
if (s_periph_ref_counts == 0) { if (s_periph_ref_counts == 0) {
rtc_dig_clk8m_enable(); rtc_dig_clk8m_enable();
#if !CONFIG_IDF_TARGET_ESP32H2 #if SOC_CLK_RC_FAST_D256_SUPPORTED
s_rtc_clk_freq = rtc_clk_freq_cal(rtc_clk_cal(RTC_CAL_8MD256, 100)); s_rtc_clk_freq = rtc_clk_freq_cal(rtc_clk_cal(RTC_CAL_8MD256, 100));
if (s_rtc_clk_freq == 0) { if (s_rtc_clk_freq == 0) {
portEXIT_CRITICAL(&periph_spinlock); portEXIT_CRITICAL(&periph_spinlock);
@@ -41,8 +41,8 @@ bool periph_rtc_dig_clk8m_enable(void)
uint32_t periph_rtc_dig_clk8m_get_freq(void) uint32_t periph_rtc_dig_clk8m_get_freq(void)
{ {
#if CONFIG_IDF_TARGET_ESP32H2 #if !SOC_CLK_RC_FAST_D256_SUPPORTED
/* Workaround: H2 doesn't have 8MD256 clk, so calibration cannot be done, we just return its theoretic frequency */ /* Workaround: CLK8M calibration cannot be performed if there is no d256 div clk, we can only return its theoretic value */
return SOC_CLK_RC_FAST_FREQ_APPROX; return SOC_CLK_RC_FAST_FREQ_APPROX;
#else #else
return s_rtc_clk_freq * 256; return s_rtc_clk_freq * 256;

4
components/esp_hw_support/sleep_modes.c
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@@ -401,8 +401,8 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
suspend_uarts(); suspend_uarts();
} }
#if SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 #if SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
//Keep the RTC8M_CLK on if RTC clock is 8MD256. //Keep the RTC8M_CLK on if RTC clock is rc_fast_d256.
bool rtc_using_8md256 = (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256); bool rtc_using_8md256 = (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256);
#else #else
bool rtc_using_8md256 = false; bool rtc_using_8md256 = false;

4
components/esp_hw_support/test_apps/dma/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_rom/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_system/.build-test-rules.yml
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@@ -2,9 +2,7 @@
components/esp_system/test_apps/rtc_8md256: components/esp_system/test_apps/rtc_8md256:
disable: disable:
- if: IDF_TARGET == "esp32c6" - if: SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 != 1
temporary: true
reason: target esp32c6 is not supported yet
components/esp_system/test_apps/rtc_power_modes: components/esp_system/test_apps/rtc_power_modes:
enable: enable:
- if: IDF_TARGET == "esp32s3" - if: IDF_TARGET == "esp32s3"

4
components/espcoredump/test_apps/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# ESP Core Dump Tests # ESP Core Dump Tests

4
components/heap/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/lwip/test_afl_host/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
## Introduction ## Introduction
This test uses [american fuzzy lop](http://lcamtuf.coredump.cx/afl/) to mangle real dns, dhcp client, dhcp server packets and look for exceptions caused by the parser. This test uses [american fuzzy lop](http://lcamtuf.coredump.cx/afl/) to mangle real dns, dhcp client, dhcp server packets and look for exceptions caused by the parser.

4
components/mbedtls/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/protocomm/test_apps/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

4
components/pthread/test_apps/pthread_unity_tests/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

56
components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@@ -207,10 +207,6 @@ config SOC_ADC_RTC_MAX_BITWIDTH
int int
default 12 default 12
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_SHARED_IDCACHE_SUPPORTED config SOC_SHARED_IDCACHE_SUPPORTED
bool bool
default y default y
@@ -291,26 +287,6 @@ config SOC_I2C_SUPPORT_APB
bool bool
default y default y
config SOC_CLK_APLL_SUPPORTED
bool
default y
config SOC_APLL_MULTIPLIER_OUT_MIN_HZ
int
default 350000000
config SOC_APLL_MULTIPLIER_OUT_MAX_HZ
int
default 500000000
config SOC_APLL_MIN_HZ
int
default 5303031
config SOC_APLL_MAX_HZ
int
default 125000000
config SOC_I2S_NUM config SOC_I2S_NUM
int int
default 2 default 2
@@ -719,6 +695,34 @@ config SOC_PM_SUPPORT_RTC_SLOW_MEM_PD
bool bool
default y default y
config SOC_CLK_APLL_SUPPORTED
bool
default y
config SOC_APLL_MULTIPLIER_OUT_MIN_HZ
int
default 350000000
config SOC_APLL_MULTIPLIER_OUT_MAX_HZ
int
default 500000000
config SOC_APLL_MIN_HZ
int
default 5303031
config SOC_APLL_MAX_HZ
int
default 125000000
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_SDMMC_USE_IOMUX config SOC_SDMMC_USE_IOMUX
bool bool
default y default y
@@ -727,10 +731,6 @@ config SOC_SDMMC_NUM_SLOTS
int int
default 2 default 2
config SOC_WIFI_HW_TSF
bool
default n
config SOC_WIFI_FTM_SUPPORT config SOC_WIFI_FTM_SUPPORT
bool bool
default n default n

21
components/soc/esp32/include/soc/soc_caps.h
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@@ -125,7 +125,6 @@
/*!< RTC */ /*!< RTC */
#define SOC_ADC_RTC_MIN_BITWIDTH (9) #define SOC_ADC_RTC_MIN_BITWIDTH (9)
#define SOC_ADC_RTC_MAX_BITWIDTH (12) #define SOC_ADC_RTC_MAX_BITWIDTH (12)
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*-------------------------- BROWNOUT CAPS -----------------------------------*/ /*-------------------------- BROWNOUT CAPS -----------------------------------*/
#if SOC_CAPS_ECO_VER >= 1 #if SOC_CAPS_ECO_VER >= 1
@@ -181,14 +180,6 @@
#define SOC_I2C_SUPPORT_APB (1) #define SOC_I2C_SUPPORT_APB (1)
/*-------------------------- APLL CAPS ----------------------------------------*/
#define SOC_CLK_APLL_SUPPORTED (1)
// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
#define SOC_APLL_MIN_HZ (5303031) // 5.303031 MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_APLL_MAX_HZ (125000000) // 125MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
// ESP32 has 2 I2S // ESP32 has 2 I2S
#define SOC_I2S_NUM (2U) #define SOC_I2S_NUM (2U)
@@ -370,6 +361,17 @@
#define SOC_PM_SUPPORT_RTC_FAST_MEM_PD (1) #define SOC_PM_SUPPORT_RTC_FAST_MEM_PD (1)
#define SOC_PM_SUPPORT_RTC_SLOW_MEM_PD (1) #define SOC_PM_SUPPORT_RTC_SLOW_MEM_PD (1)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_APLL_SUPPORTED (1)
// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
#define SOC_APLL_MIN_HZ (5303031) // 5.303031 MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_APLL_MAX_HZ (125000000) // 125MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*-------------------------- SDMMC CAPS -----------------------------------------*/ /*-------------------------- SDMMC CAPS -----------------------------------------*/
/* On ESP32, clock/cmd/data pins use IO MUX. /* On ESP32, clock/cmd/data pins use IO MUX.
@@ -379,7 +381,6 @@
#define SOC_SDMMC_NUM_SLOTS 2 #define SOC_SDMMC_NUM_SLOTS 2
/*-------------------------- WI-FI HARDWARE CAPS -------------------------------*/ /*-------------------------- WI-FI HARDWARE CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (0) /*!< Hardware TSF is not supported */
#define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM is not supported */ #define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM is not supported */
#define SOC_WIFI_GCMP_SUPPORT (0) /*!< GCMP is not supported(GCMP128 and GCMP256) */ #define SOC_WIFI_GCMP_SUPPORT (0) /*!< GCMP is not supported(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */ #define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */

12
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@@ -143,10 +143,6 @@ config SOC_ADC_RTC_MAX_BITWIDTH
int int
default 12 default 12
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_ADC_CALIBRATION_V1_SUPPORTED config SOC_ADC_CALIBRATION_V1_SUPPORTED
bool bool
default y default y
@@ -571,6 +567,14 @@ config SOC_PM_SUPPORT_BT_PD
bool bool
default n default n
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_WIFI_HW_TSF config SOC_WIFI_HW_TSF
bool bool
default y default y

5
components/soc/esp32c2/include/soc/soc_caps.h
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@@ -71,7 +71,6 @@
/*!< RTC */ /*!< RTC */
#define SOC_ADC_RTC_MIN_BITWIDTH (12) #define SOC_ADC_RTC_MIN_BITWIDTH (12)
#define SOC_ADC_RTC_MAX_BITWIDTH (12) #define SOC_ADC_RTC_MAX_BITWIDTH (12)
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*!< Calibration */ /*!< Calibration */
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
@@ -276,6 +275,10 @@
#define SOC_PM_SUPPORT_WIFI_PD (0) #define SOC_PM_SUPPORT_WIFI_PD (0)
#define SOC_PM_SUPPORT_BT_PD (0) #define SOC_PM_SUPPORT_BT_PD (0)
/*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*------------------------------------ WI-FI CAPS ------------------------------------*/ /*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ #define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM is not supported */ #define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM is not supported */

12
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@@ -495,10 +495,6 @@ config SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM
int int
default 108 default 108
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_RTCIO_PIN_COUNT config SOC_RTCIO_PIN_COUNT
int int
default 0 default 0
@@ -803,6 +799,14 @@ config SOC_PM_SUPPORT_BT_PD
bool bool
default y default y
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
bool bool
default y default y

6
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -227,8 +227,6 @@
#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)) #define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*-------------------------- RTCIO CAPS --------------------------------------*/ /*-------------------------- RTCIO CAPS --------------------------------------*/
/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported /* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
* for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */ * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
@@ -371,6 +369,10 @@
#define SOC_PM_SUPPORT_BT_PD (1) #define SOC_PM_SUPPORT_BT_PD (1)
/*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1) #define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1) #define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1)

52
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
View File

@@ -231,10 +231,6 @@ config SOC_ADC_RTC_MAX_BITWIDTH
int int
default 13 default 13
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_ADC_CALIBRATION_V1_SUPPORTED config SOC_ADC_CALIBRATION_V1_SUPPORTED
bool bool
default y default y
@@ -351,26 +347,6 @@ config SOC_I2C_SUPPORT_APB
bool bool
default y default y
config SOC_CLK_APLL_SUPPORTED
bool
default y
config SOC_APLL_MULTIPLIER_OUT_MIN_HZ
int
default 350000000
config SOC_APLL_MULTIPLIER_OUT_MAX_HZ
int
default 500000000
config SOC_APLL_MIN_HZ
int
default 5303031
config SOC_APLL_MAX_HZ
int
default 125000000
config SOC_I2S_NUM config SOC_I2S_NUM
int int
default 1 default 1
@@ -911,6 +887,34 @@ config SOC_PM_SUPPORT_RTC_SLOW_MEM_PD
bool bool
default y default y
config SOC_CLK_APLL_SUPPORTED
bool
default y
config SOC_APLL_MULTIPLIER_OUT_MIN_HZ
int
default 350000000
config SOC_APLL_MULTIPLIER_OUT_MAX_HZ
int
default 500000000
config SOC_APLL_MIN_HZ
int
default 5303031
config SOC_APLL_MAX_HZ
int
default 125000000
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_COEX_HW_PTI config SOC_COEX_HW_PTI
bool bool
default y default y

20
components/soc/esp32s2/include/soc/soc_caps.h
View File

@@ -107,7 +107,6 @@
/*!< RTC */ /*!< RTC */
#define SOC_ADC_RTC_MIN_BITWIDTH (13) #define SOC_ADC_RTC_MIN_BITWIDTH (13)
#define SOC_ADC_RTC_MAX_BITWIDTH (13) #define SOC_ADC_RTC_MAX_BITWIDTH (13)
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*!< Calibration */ /*!< Calibration */
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
@@ -176,14 +175,6 @@
#define SOC_I2C_SUPPORT_REF_TICK (1) #define SOC_I2C_SUPPORT_REF_TICK (1)
#define SOC_I2C_SUPPORT_APB (1) #define SOC_I2C_SUPPORT_APB (1)
/*-------------------------- APLL CAPS ----------------------------------------*/
#define SOC_CLK_APLL_SUPPORTED (1)
// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
#define SOC_APLL_MIN_HZ (5303031) // 5.303031 MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_APLL_MAX_HZ (125000000) // 125MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
// ESP32-S2 has 1 I2S // ESP32-S2 has 1 I2S
#define SOC_I2S_NUM (1U) #define SOC_I2S_NUM (1U)
@@ -405,6 +396,17 @@
#define SOC_PM_SUPPORT_RTC_FAST_MEM_PD (1) #define SOC_PM_SUPPORT_RTC_FAST_MEM_PD (1)
#define SOC_PM_SUPPORT_RTC_SLOW_MEM_PD (1) #define SOC_PM_SUPPORT_RTC_SLOW_MEM_PD (1)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_APLL_SUPPORTED (1)
// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
#define SOC_APLL_MULTIPLIER_OUT_MIN_HZ (350000000) // 350 MHz
#define SOC_APLL_MULTIPLIER_OUT_MAX_HZ (500000000) // 500 MHz
#define SOC_APLL_MIN_HZ (5303031) // 5.303031 MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_APLL_MAX_HZ (125000000) // 125MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1) #define SOC_COEX_HW_PTI (1)
/* ---------------------------- Compatibility ------------------------------- */ /* ---------------------------- Compatibility ------------------------------- */

12
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@@ -291,10 +291,6 @@ config SOC_ADC_RTC_MAX_BITWIDTH
int int
default 12 default 12
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_ADC_CALIBRATION_V1_SUPPORTED config SOC_ADC_CALIBRATION_V1_SUPPORTED
bool bool
default y default y
@@ -943,6 +939,14 @@ config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
bool bool
default y default y
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_SECURE_BOOT_V2_RSA config SOC_SECURE_BOOT_V2_RSA
bool bool
default y default y

5
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -100,7 +100,6 @@
/*!< RTC */ /*!< RTC */
#define SOC_ADC_RTC_MIN_BITWIDTH (12) #define SOC_ADC_RTC_MIN_BITWIDTH (12)
#define SOC_ADC_RTC_MAX_BITWIDTH (12) #define SOC_ADC_RTC_MAX_BITWIDTH (12)
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*!< Calibration */ /*!< Calibration */
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
@@ -399,6 +398,10 @@
#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1)
/*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*-------------------------- Secure Boot CAPS----------------------------*/ /*-------------------------- Secure Boot CAPS----------------------------*/
#define SOC_SECURE_BOOT_V2_RSA 1 #define SOC_SECURE_BOOT_V2_RSA 1
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3 #define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3

4
examples/build_system/cmake/component_manager/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Using the component manager for downloading dependencies # Using the component manager for downloading dependencies

4
examples/build_system/cmake/import_lib/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Import Third-Party CMake Library Example # Import Third-Party CMake Library Example

4
examples/build_system/cmake/import_prebuilt/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Import Prebuilt Library Example # Import Prebuilt Library Example

4
examples/build_system/cmake/multi_config/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Multiple Build Configurations Example # Multiple Build Configurations Example

4
examples/build_system/cmake/plugins/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Link Time Plugins Registration # Link Time Plugins Registration

4
examples/build_system/wrappers/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Using wrapper to redefine IDF functions # Using wrapper to redefine IDF functions

4
examples/custom_bootloader/bootloader_hooks/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Bootloader hooks # Bootloader hooks

4
examples/custom_bootloader/bootloader_override/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# Bootloader override # Bootloader override

4
examples/security/flash_encryption/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- |
# Flash Encryption # Flash Encryption