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docs: Updated incorrect description for ULP FSM JUMPR and JUMPS instructions
This commit updates the incorrect description for the JUMPR and JUMPS instructions for ULP FSM on esp32/s2/s3. Closes https://github.com/espressif/esp-idf/issues/10923
This commit is contained in:
@@ -798,20 +798,48 @@ The detailed description of all instructions is presented below:
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- *GE* (greater or equal) – jump if value in R0 >= threshold
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- *GE* (greater or equal) – jump if value in R0 >= threshold
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**Cycles**
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**Cycles**
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Conditions *EQ*, *GT* and *LT*: 2 cycles to execute, 2 cycles to fetch next instruction
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Conditions *LE* and *GE* are implemented in the assembler using two **JUMPR** instructions::
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// JUMPR target, threshold, LE is implemented as:
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.. only:: esp32
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JUMPR target, threshold, EQ
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Conditions *LT*, *GE*, *LE* and *GT*: 2 cycles to execute, 2 cycles to fetch next instruction
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JUMPR target, threshold, LT
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// JUMPR target, threshold, GE is implemented as:
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Conditions *LE* and *GT* are implemented in the assembler using one **JUMPR** instruction::
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JUMPR target, threshold, EQ
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// JUMPR target, threshold, GT is implemented as:
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JUMPR target, threshold, GT
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JUMPR target, threshold+1, GE
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// JUMPR target, threshold, LE is implemented as:
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JUMPR target, threshold + 1, LT
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Conditions *EQ* is implemented in the assembler using two **JUMPR** instructions::
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// JUMPR target, threshold, EQ is implemented as:
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JUMPR next, threshold + 1, GE
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JUMPR target, threshold, GE
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next:
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.. only:: esp32s2 or esp32s3
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Conditions *EQ*, *GT* and *LT*: 2 cycles to execute, 2 cycles to fetch next instruction
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Conditions *LE* and *GE* are implemented in the assembler using two **JUMPR** instructions::
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// JUMPR target, threshold, LE is implemented as:
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JUMPR target, threshold, EQ
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JUMPR target, threshold, LT
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// JUMPR target, threshold, GE is implemented as:
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JUMPR target, threshold, EQ
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JUMPR target, threshold, GT
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Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch.
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Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch.
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**Description**
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**Description**
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The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of R0 register value and the threshold value.
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The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of R0 register value and the threshold value.
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@@ -844,21 +872,32 @@ The detailed description of all instructions is presented below:
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- *GE* (greater or equal) — jump if value in stage_cnt >= threshold
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- *GE* (greater or equal) — jump if value in stage_cnt >= threshold
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**Cycles**
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**Cycles**
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2 cycles to execute, 2 cycles to fetch next instruction::
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// JUMPS target, threshold, EQ is implemented as:
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.. only:: esp32
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JUMPS next, threshold, LT
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Conditions *LE*, *LT*, *GE*: 2 cycles to execute, 2 cycles to fetch next instruction
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JUMPS target, threshold, LE
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next:
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// JUMPS target, threshold, GT is implemented as:
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Conditions *EQ*, *GT* are implemented in the assembler using two **JUMPS** instructions::
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JUMPS next, threshold, LE
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// JUMPS target, threshold, EQ is implemented as:
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JUMPS target, threshold, GE
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next:
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JUMPS next, threshold, LT
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JUMPS target, threshold, LE
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next:
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// JUMPS target, threshold, GT is implemented as:
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JUMPS next, threshold, LE
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JUMPS target, threshold, GE
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next:
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Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch.
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.. only:: esp32s2 or esp32s3
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2 cycles to execute, 2 cycles to fetch next instruction
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Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch.
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**Description**
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**Description**
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The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of count register value and threshold value.
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The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of count register value and threshold value.
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