diff --git a/components/esp32s3/clk.c b/components/esp32s3/clk.c
index 0f37b89848..e3a4c8a7fc 100644
--- a/components/esp32s3/clk.c
+++ b/components/esp32s3/clk.c
@@ -44,7 +44,7 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
 
 void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
 {
-    /* Update scale factors used by ets_delay_us */
+    /* Update scale factors used by esp_rom_delay_us */
     g_ticks_per_us_pro = ticks_per_us;
 #ifndef CONFIG_FREERTOS_UNICORE
     g_ticks_per_us_app = ticks_per_us;
diff --git a/components/esp32s3/sleep_modes.c b/components/esp32s3/sleep_modes.c
index ee71b65243..5bdf392f19 100644
--- a/components/esp32s3/sleep_modes.c
+++ b/components/esp32s3/sleep_modes.c
@@ -24,8 +24,8 @@
 #include "esp_spi_flash.h"
 #include "esp32s3/rom/cache.h"
 #include "esp32s3/rom/rtc.h"
-#include "esp32s3/rom/ets_sys.h"
 #include "esp_rom_uart.h"
+#include "esp_rom_sys.h"
 #include "soc/cpu.h"
 #include "soc/rtc.h"
 #include "soc/spi_periph.h"
@@ -286,7 +286,7 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
     // If SPI flash was powered down, wait for it to become ready
     if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
         // Wait for the flash chip to start up
-        ets_delay_us(flash_enable_time_us);
+        esp_rom_delay_us(flash_enable_time_us);
     }
     return err;
 }