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Merge branch 'ci/ccomp_performance_tests' into 'master'

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unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
This commit is contained in:
Angus Gratton
2020-12-24 13:44:52 +08:00
parent 7a40b1695c 772bb2a380
commit c3ba995f2c
15 changed files with 49 additions and 25 deletions
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12
components/driver/test/test_sdio.c
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@@ -355,13 +355,13 @@ static void log_performance_tohost(uint32_t speed, const sdio_test_config_t* con
if (!config->check_data) {
switch (config->sdio_mode) {
case SDIO_4BIT:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_4BIT, "%d", speed);
break;
case SDIO_1BIT:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_1BIT, "%d", speed);
break;
case SDIO_SPI:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_SPI, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_TOHOST_SPI, "%d", speed);
break;
}
}
@@ -441,13 +441,13 @@ static void log_performance_frhost(uint32_t speed, const sdio_test_config_t* con
if (!config->check_data) {
switch (config->sdio_mode) {
case SDIO_4BIT:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_4BIT, "%d", speed);
break;
case SDIO_1BIT:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_1BIT, "%d", speed);
break;
case SDIO_SPI:
TEST_PERFORMANCE_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_SPI, "%d", speed);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SDIO_THROUGHPUT_KBSEC_FRHOST_SPI, "%d", speed);
break;
}
}

4
components/esp32/test/test_sha.c
View File

@@ -63,8 +63,8 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
free(buffer);
TEST_PERFORMANCE_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
TEST_PERFORMANCE_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
}
TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")

4
components/esp32s2/test/test_sha.c
View File

@@ -58,8 +58,8 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
free(buffer);
TEST_PERFORMANCE_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
TEST_PERFORMANCE_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA1_32KB, "%dus", us_sha1);
TEST_PERFORMANCE_CCOMP_LESS_THAN(TIME_SHA512_32KB, "%dus", us_sha512);
}
TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")

2
components/mbedtls/test/test_aes_perf.c
View File

@@ -64,6 +64,6 @@ TEST_CASE("mbedtls AES performance", "[aes][timeout=60]")
printf("Encryption rate %.3fMB/sec\n", mb_sec);
#ifdef CONFIG_MBEDTLS_HARDWARE_AES
// Don't put a hard limit on software AES performance
TEST_PERFORMANCE_GREATER_THAN(AES_CBC_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(AES_CBC_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
#endif
}

8
components/mbedtls/test/test_rsa.c
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@@ -366,11 +366,11 @@ static void rsa_key_operations(int keysize, bool check_performance, bool use_bli
private_perf = ccomp_timer_stop();
if (check_performance && keysize == 2048) {
TEST_PERFORMANCE_LESS_THAN(RSA_2048KEY_PUBLIC_OP, "public operations %d us", public_perf);
TEST_PERFORMANCE_LESS_THAN(RSA_2048KEY_PRIVATE_OP, "private operations %d us", private_perf);
TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_2048KEY_PUBLIC_OP, "public operations %d us", public_perf);
TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_2048KEY_PRIVATE_OP, "private operations %d us", private_perf);
} else if (check_performance && keysize == 4096) {
TEST_PERFORMANCE_LESS_THAN(RSA_4096KEY_PUBLIC_OP, "public operations %d us", public_perf);
TEST_PERFORMANCE_LESS_THAN(RSA_4096KEY_PRIVATE_OP, "private operations %d us", private_perf);
TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_4096KEY_PUBLIC_OP, "public operations %d us", public_perf);
TEST_PERFORMANCE_CCOMP_LESS_THAN(RSA_4096KEY_PRIVATE_OP, "private operations %d us", private_perf);
}
TEST_ASSERT_EQUAL_MEMORY_MESSAGE(orig_buf, decrypted_buf, keysize / 8, "RSA operation");

2
components/mbedtls/test/test_sha_perf.c
View File

@@ -50,6 +50,6 @@ TEST_CASE("mbedtls SHA performance", "[aes]")
printf("SHA256 rate %.3fMB/sec\n", mb_sec);
#ifdef CONFIG_MBEDTLS_HARDWARE_SHA
// Don't put a hard limit on software SHA performance
TEST_PERFORMANCE_GREATER_THAN(SHA256_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
TEST_PERFORMANCE_CCOMP_GREATER_THAN(SHA256_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
#endif
}

1
components/soc/esp32/include/soc/soc_caps.h
View File

@@ -71,6 +71,7 @@
#define SOC_CPU_CORES_NUM 2
#define SOC_ULP_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_CCOMP_TIMER_SUPPORTED 1
/*-------------------------- ADC CAPS ----------------------------------------*/
#define SOC_ADC_PERIPH_NUM (2)

1
components/soc/esp32s2/include/soc/soc_caps.h
View File

@@ -47,6 +47,7 @@
#define SOC_PCNT_SUPPORTED 1
#define SOC_ULP_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_CCOMP_TIMER_SUPPORTED 1
#define SOC_CACHE_SUPPORT_WRAP 1

2
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -14,6 +14,8 @@
#define SOC_CACHE_SUPPORT_WRAP 1
#define SOC_ULP_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_CCOMP_TIMER_SUPPORTED 1
/*-------------------------- ADC CAPS ----------------------------------------*/
#include "adc_caps.h"

4
components/spi_flash/test/test_esp_flash.c
View File

@@ -1008,8 +1008,8 @@ static void test_flash_read_write_performance(const esp_partition_t *part)
TEST_ASSERT_EQUAL_HEX8_ARRAY(data_to_write, data_read, total_len);
#if !CONFIG_SPIRAM && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
# define CHECK_DATA(bus, suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##suffix, "%d", speed_##suffix)
# define CHECK_ERASE(bus, var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##ERASE, "%d", var)
# define CHECK_DATA(bus, suffix) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##suffix, "%d", speed_##suffix)
# define CHECK_ERASE(bus, var) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##ERASE, "%d", var)
#else
# define CHECK_DATA(bus, suffix) ((void)speed_##suffix)
# define CHECK_ERASE(bus, var) ((void)var)

4
components/spi_flash/test/test_spi_flash.c
View File

@@ -312,8 +312,8 @@ TEST_CASE("Test spi_flash read/write performance", "[spi_flash]")
// Data checks are disabled when PSRAM is used or in Freertos compliance check test
#if !CONFIG_SPIRAM && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
# define CHECK_DATA(suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_##suffix, "%d", speed_##suffix)
# define CHECK_ERASE(var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE, "%d", var)
# define CHECK_DATA(suffix) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_##suffix, "%d", speed_##suffix)
# define CHECK_ERASE(var) TEST_PERFORMANCE_CCOMP_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE, "%d", var)
#else
# define CHECK_DATA(suffix) ((void)speed_##suffix)
# define CHECK_ERASE(var) ((void)var)

4
components/vfs/test/test_vfs_fd.c
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@@ -260,9 +260,9 @@ TEST_CASE("Open & write & close through VFS passes performance test", "[vfs]")
const int ns_per_iter = (int) (time_diff_us * 1000 / iter_count);
TEST_ESP_OK( esp_vfs_unregister(VFS_PREF1) );
#ifdef CONFIG_SPIRAM
TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME_PSRAM, "%dns", ns_per_iter);
TEST_PERFORMANCE_CCOMP_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME_PSRAM, "%dns", ns_per_iter);
#else
TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME, "%dns", ns_per_iter);
TEST_PERFORMANCE_CCOMP_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME, "%dns", ns_per_iter);
#endif
}

3
tools/unit-test-app/components/test_utils/ccomp_timer_impl_riscv.c
View File

@@ -87,9 +87,6 @@ int64_t IRAM_ATTR ccomp_timer_impl_get_time(void)
{
update_ccount();
int64_t cycles = s_status[cpu_hal_get_core_id()].ccount;
esp_rom_printf("cycles=%lld\n", cycles);
esp_rom_printf("cpu freq=%d\r\n", esp_clk_cpu_freq());
esp_rom_printf("duration=%lld\n", cycles * 1000000 / esp_clk_cpu_freq());
return (cycles * 1000000) / esp_clk_cpu_freq();
}

16
tools/unit-test-app/components/test_utils/include/test_utils.h
View File

@@ -21,6 +21,7 @@
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "unity.h"
#include "soc/soc_caps.h"
/* include performance pass standards header file */
#include "idf_performance.h"
#include "idf_performance_target.h"
@@ -50,6 +51,21 @@ extern "C" {
TEST_ASSERT(value > PERFORMANCE_CON(IDF_PERFORMANCE_MIN_, name)); \
} while(0)
/* Macros to be used when performance is calculated using the cache compensated timer
will not assert if ccomp not supported */
#if SOC_CCOMP_TIMER_SUPPORTED
#define TEST_PERFORMANCE_CCOMP_GREATER_THAN(name, value_fmt, value) \
TEST_PERFORMANCE_GREATER_THAN(name, value_fmt, value)
#define TEST_PERFORMANCE_CCOMP_LESS_THAN(name, value_fmt, value) \
TEST_PERFORMANCE_LESS_THAN(name, value_fmt, value)
#else
#define TEST_PERFORMANCE_CCOMP_GREATER_THAN(name, value_fmt, value) \
printf("[Performance][" PERFORMANCE_STR(name) "]: "value_fmt"\n", value);
#define TEST_PERFORMANCE_CCOMP_LESS_THAN(name, value_fmt, value) \
printf("[Performance][" PERFORMANCE_STR(name) "]: "value_fmt"\n", value);
#endif //SOC_CCOMP_TIMER_SUPPORTED
/* @brief macro to print IDF performance
* @param mode : performance item name. a string pointer.
* @param value_fmt: print format and unit of the value, for example: "%02fms", "%dKB"

7
tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c
View File

@@ -23,6 +23,11 @@
#include "sdkconfig.h"
/* No performance monitor in RISCV for now
*/
#if !DISABLED_FOR_TARGETS(ESP32C3)
static const char* TAG = "test_ccomp_timer";
#if CONFIG_IDF_TARGET_ESP32
@@ -180,3 +185,5 @@ TEST_CASE("data cache hit rate sweep", "[test_utils][ccomp_timer]")
free(flash_mem);
#endif
}
#endif // !DISABLED_FOR_TARGETS(ESP32C3)