diff --git a/components/espcoredump/include_core_dump/esp_core_dump_port.h b/components/espcoredump/include_core_dump/esp_core_dump_port.h
index 7f342972bf..4ef51d4646 100644
--- a/components/espcoredump/include_core_dump/esp_core_dump_port.h
+++ b/components/espcoredump/include_core_dump/esp_core_dump_port.h
@@ -40,8 +40,10 @@ uint16_t esp_core_dump_get_arch_id(void);
  *
  * @param info Pointer to the panic information. It contains the execution
  *             frame.
+ * @param isr_context A flag indicating whether the crash happened within an ISR context.
+ *                    Set to 1 if the crash occurred in an ISR, and 0 otherwise.
  */
-void esp_core_dump_port_init(panic_info_t *info);
+void esp_core_dump_port_init(panic_info_t *info, bool isr_context);
 
 /**
  * @brief Reset fake stacks allocator, if any.
diff --git a/components/espcoredump/src/core_dump_common.c b/components/espcoredump/src/core_dump_common.c
index 9d437d2d69..028bdc7cef 100644
--- a/components/espcoredump/src/core_dump_common.c
+++ b/components/espcoredump/src/core_dump_common.c
@@ -151,8 +151,10 @@ inline void esp_core_dump_write(panic_info_t *info, core_dump_write_config_t *wr
     esp_err_t err = ESP_ERR_NOT_SUPPORTED;
     s_exc_frame = (void*) info->frame;
 
+    bool isr_context = esp_core_dump_in_isr_context();
+
     esp_core_dump_setup_stack();
-    esp_core_dump_port_init(info);
+    esp_core_dump_port_init(info, isr_context);
 #if CONFIG_ESP_COREDUMP_DATA_FORMAT_BIN
     err = esp_core_dump_write_binary(write_cfg);
 #elif CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
diff --git a/components/espcoredump/src/port/riscv/core_dump_port.c b/components/espcoredump/src/port/riscv/core_dump_port.c
index aeb36aafb3..9f7568e132 100644
--- a/components/espcoredump/src/port/riscv/core_dump_port.c
+++ b/components/espcoredump/src/port/riscv/core_dump_port.c
@@ -141,6 +141,7 @@ _Static_assert(sizeof(riscv_prstatus) == PRSTATUS_SIZE,
  */
 typedef struct {
     uint32_t crashed_task_tcb;
+    uint32_t isr_context;
 } riscv_extra_info_t;
 
 
@@ -157,9 +158,10 @@ static uint32_t s_fake_stacks_num = 0;
 /* Statically initialize the extra information structure. */
 static riscv_extra_info_t s_extra_info = { 0 };
 
-inline void esp_core_dump_port_init(panic_info_t *info)
+inline void esp_core_dump_port_init(panic_info_t *info, bool isr_context)
 {
     s_extra_info.crashed_task_tcb = COREDUMP_CURR_TASK_MARKER;
+    s_extra_info.isr_context = isr_context;
 }
 
 /**
diff --git a/components/espcoredump/src/port/xtensa/core_dump_port.c b/components/espcoredump/src/port/xtensa/core_dump_port.c
index f89a0e0f19..6095fbbda5 100644
--- a/components/espcoredump/src/port/xtensa/core_dump_port.c
+++ b/components/espcoredump/src/port/xtensa/core_dump_port.c
@@ -95,6 +95,7 @@ typedef struct
     core_dump_reg_pair_t exccause;
     core_dump_reg_pair_t excvaddr;
     core_dump_reg_pair_t extra_regs[COREDUMP_EXTRA_REG_NUM];
+    uint32_t isr_context;
 } __attribute__((packed)) xtensa_extra_info_t;
 
 // Xtensa Program Status for GDB
@@ -259,7 +260,7 @@ static esp_err_t esp_core_dump_get_regs_from_stack(void* stack_addr,
     return ESP_OK;
 }
 
-inline void esp_core_dump_port_init(panic_info_t *info)
+inline void esp_core_dump_port_init(panic_info_t *info, bool isr_context)
 {
     s_extra_info.crashed_task_tcb = COREDUMP_CURR_TASK_MARKER;
     // Initialize exccause register to default value (required if current task corrupted)
@@ -271,6 +272,7 @@ inline void esp_core_dump_port_init(panic_info_t *info)
     if (info->pseudo_excause) {
         s_exc_frame->exccause += XCHAL_EXCCAUSE_NUM;
     }
+    s_extra_info.isr_context = isr_context;
 }
 
 /**