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adc: support adc efuse-based calibration on esp32s3
This commit is contained in:
committed by
Armando (Dou Yiwen)
parent
c54caa457e
commit
c45c6f52f1
@@ -55,7 +55,7 @@ void adc_hal_arbiter_config(adc_arbiter_t *config)
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/*---------------------------------------------------------------
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ADC calibration setting
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---------------------------------------------------------------*/
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#if SOC_ADC_HW_CALIBRATION_V1
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#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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void adc_hal_calibration_init(adc_ll_num_t adc_n)
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{
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adc_ll_calibration_init(adc_n);
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@@ -134,6 +134,7 @@ static uint32_t read_cal_channel(adc_ll_num_t adc_n, int channel)
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#define ADC_HAL_CAL_TIMES (10)
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#define ADC_HAL_CAL_OFFSET_RANGE (4096)
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
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uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd)
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{
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if (adc_n == ADC_NUM_2) {
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@@ -191,7 +192,8 @@ uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc
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adc_ll_calibration_finish(adc_n);
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return ret;
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}
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#endif //SOC_ADC_HW_CALIBRATION_V1
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#endif //#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
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#endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
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//This feature is currently supported on ESP32C3, will be supported on other chips soon
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@@ -15,6 +15,8 @@
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#include <stdio.h>
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#include <stdbool.h>
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#include "regi2c_ctrl.h"
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#include "soc/adc_periph.h"
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#include "hal/adc_types.h"
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#include "soc/apb_saradc_struct.h"
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@@ -703,6 +705,18 @@ static inline void adc_ll_disable_sleep_controller(void)
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SENS.sar_meas2_mux.sar2_rtc_force = 0;
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}
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/**
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* @brief Set common calibration configuration. Should be shared with other parts (PWDET).
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*/
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static inline void adc_ll_calibration_init(adc_ll_num_t adc_n)
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{
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if (adc_n == ADC_NUM_1) {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 4);
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} else {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 4);
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}
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}
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/**
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* Configure the registers for ADC calibration. You need to call the ``adc_ll_calibration_finish`` interface to resume after calibration.
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*
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@@ -737,7 +751,15 @@ static inline void adc_ll_calibration_finish(adc_ll_num_t adc_n)
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*/
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static inline void adc_ll_set_calibration_param(adc_ll_num_t adc_n, uint32_t param)
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{
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abort();
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uint8_t msb = param >> 8;
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uint8_t lsb = param & 0xFF;
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if (adc_n == ADC_NUM_1) {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
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} else {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, msb);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, lsb);
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}
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}
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/**
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@@ -1015,6 +1037,22 @@ static inline void adc_ll_set_atten(adc_ll_num_t adc_n, adc_channel_t channel, a
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}
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}
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/**
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* Get the attenuation of a particular channel on ADCn.
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*
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* @param adc_n ADC unit.
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* @param channel ADCn channel number.
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* @return atten The attenuation option.
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*/
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static inline adc_atten_t adc_ll_get_atten(adc_ll_num_t adc_n, adc_channel_t channel)
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{
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if (adc_n == ADC_NUM_1) {
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return (adc_atten_t)((SENS.sar_atten1 >> (channel * 2)) & 0x3);
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} else {
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return (adc_atten_t)((SENS.sar_atten2 >> (channel * 2)) & 0x3);
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}
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}
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static inline uint32_t adc_ll_adc1_read(void)
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{
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//On ESP32S3, valid data width is 12-bit
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@@ -276,7 +276,7 @@ esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw);
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/*---------------------------------------------------------------
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ADC calibration setting
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---------------------------------------------------------------*/
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#if SOC_ADC_HW_CALIBRATION_V1
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#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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// ESP32-S2, C3 and H2 support HW offset calibration.
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/**
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@@ -312,7 +312,7 @@ void adc_hal_set_calibration_param(adc_ll_num_t adc_n, uint32_t param);
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*/
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uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd);
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#endif //SOC_ADC_HW_CALIBRATION_V1
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#endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
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/*---------------------------------------------------------------
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