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Merge branch 'bugfix/efuse_timesettigs_in_burn_op' into 'master'

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efuse: Fixes eFuse timesettings issue on esp32c3

Closes FCS-849

See merge request espressif/esp-idf!16885
This commit is contained in:
Mahavir Jain
2022-01-25 03:44:51 +00:00
parent cf9a7d8509 4ede9aaa26
commit c4ddfc9f06
3 changed files with 38 additions and 26 deletions
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42
components/efuse/esp32c3/esp_efuse_utility.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -51,26 +51,44 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
{(uint32_t) &write_mass_blocks[EFUSE_BLK10][0], (uint32_t) &write_mass_blocks[EFUSE_BLK10][7]},
};
#ifndef CONFIG_EFUSE_VIRTUAL
// Update Efuse timing configuration
static esp_err_t esp_efuse_set_timing(void)
{
// efuse clock is fixed in ESP32-C3, so the ets_efuse_set_timing() function
// takes an argument for compatibility with older ROM functions but it's ignored.
int res = ets_efuse_set_timing(0);
assert(res == 0);
(void)res;
REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x60);
REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x190);
return ESP_OK;
}
static void efuse_read(void)
{
esp_efuse_set_timing();
REG_WRITE(EFUSE_CONF_REG, EFUSE_READ_OP_CODE);
REG_WRITE(EFUSE_CMD_REG, EFUSE_READ_CMD);
while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
/*Due to a hardware error, we have to read READ_CMD again to make sure the efuse clock is normal*/
while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
}
#ifndef CONFIG_EFUSE_VIRTUAL
static void efuse_program(esp_efuse_block_t block)
{
esp_efuse_set_timing();
REG_WRITE(EFUSE_CONF_REG, EFUSE_WRITE_OP_CODE);
REG_WRITE(EFUSE_CMD_REG, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD);
while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_PGM_CMD) != 0) { };
ets_efuse_clear_program_registers();
efuse_read();
}
#endif // ifndef CONFIG_EFUSE_VIRTUAL
// Efuse read operation: copies data from physical efuses to efuse read registers.
void esp_efuse_utility_clear_program_registers(void)
{
ets_efuse_read();
efuse_read();
ets_efuse_clear_program_registers();
}
@@ -104,7 +122,7 @@ void esp_efuse_utility_burn_chip(void)
}
int data_len = (range_write_addr_blocks[num_block].end - range_write_addr_blocks[num_block].start) + sizeof(uint32_t);
memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)range_write_addr_blocks[num_block].start, data_len);
ets_efuse_program(num_block);
efuse_program(num_block);
break;
}
}