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Merge branch 'fix/fix_h4_wrong_spinlock' into 'master'

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fix(esp_system): fix wrong spinlock num on H4

See merge request espressif/esp-idf!39924
This commit is contained in:
Gao Xu
2025-06-24 10:50:29 +08:00
parent a2b98b31a9 e6e898e9de
commit c59b42ca9e
3 changed files with 8 additions and 3 deletions
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2
components/esp_hw_support/ldo/esp_ldo_regulator.c
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@@ -27,7 +27,7 @@ typedef struct ldo_regulator_channel_t {
} flags; } flags;
} ldo_regulator_channel_t; } ldo_regulator_channel_t;
static portMUX_TYPE s_spinlock = portMUX_INITIALIZER_UNLOCKED; static __attribute__((unused)) portMUX_TYPE s_spinlock = portMUX_INITIALIZER_UNLOCKED;
static const uint32_t s_ldo_channel_adjustable_mask = LDO_LL_ADJUSTABLE_CHAN_MASK; // each bit represents if the LDO channel is adjustable in hardware static const uint32_t s_ldo_channel_adjustable_mask = LDO_LL_ADJUSTABLE_CHAN_MASK; // each bit represents if the LDO channel is adjustable in hardware

2
components/esp_hw_support/port/esp32p4/io_mux.c
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@@ -18,7 +18,7 @@
#define RTCIO_RCC_ATOMIC() PERIPH_RCC_ATOMIC() #define RTCIO_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
static portMUX_TYPE s_io_mux_spinlock = portMUX_INITIALIZER_UNLOCKED; static __attribute__((unused)) portMUX_TYPE s_io_mux_spinlock = portMUX_INITIALIZER_UNLOCKED;
static soc_module_clk_t s_io_mux_clk_src = 0; // by default, the clock source is not set explicitly by any consumer (e.g. SDM, Filter) static soc_module_clk_t s_io_mux_clk_src = 0; // by default, the clock source is not set explicitly by any consumer (e.g. SDM, Filter)
#if CONFIG_ULP_COPROC_ENABLED #if CONFIG_ULP_COPROC_ENABLED

7
components/esp_system/include/esp_private/critical_section.h
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@@ -22,7 +22,12 @@
extern "C" { extern "C" {
#endif #endif
#if (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32P4) && !NON_OS_BUILD /**
* In theory, OS_SPINLOCK should only be defined in a multi-core environment, because critical-section-related
* functions there take a lock as a parameter. In practice, since the Xtensa FreeRTOS port layer is the same
* for the ESP32, S3, and S2, the latter also requires a parameter in its critical-section-related functions.
*/
#if (!CONFIG_FREERTOS_UNICORE || CONFIG_IDF_TARGET_ARCH_XTENSA) && !NON_OS_BUILD
/** /**
* This macro also helps users switching between spinlock declarations/definitions for multi-/single core environments * This macro also helps users switching between spinlock declarations/definitions for multi-/single core environments
* if the macros below aren't sufficient. * if the macros below aren't sufficient.