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RISC-V: Fix vectors.S assembly file indentation and macro usage

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The file is now more consistent as the macros have been fixed, more comments
have been added and the indentation is now using spaces only.
This commit is contained in:
Omar Chebib
2021-11-12 15:16:22 +08:00
committed by Alexey Gerenkov
parent 9017ff235b
commit caa5444c93
1 changed files with 151 additions and 146 deletions
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11
components/riscv/vectors.S
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@@ -138,7 +138,7 @@ _vector_table:
.rept (ETS_MAX_INUM - ETS_MEMPROT_ERR_INUM) .rept (ETS_MAX_INUM - ETS_MEMPROT_ERR_INUM)
#else #else
.rept (ETS_MAX_INUM - ETS_CACHEERR_INUM) .rept (ETS_MAX_INUM - ETS_CACHEERR_INUM)
#endif #endif //CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
j _interrupt_handler /* 6 identical entries, all pointing to the interrupt handler */ j _interrupt_handler /* 6 identical entries, all pointing to the interrupt handler */
.endr .endr
@@ -156,9 +156,9 @@ _panic_handler:
/* Same goes for the SP value before trapping */ /* Same goes for the SP value before trapping */
addi t0, sp, RV_STK_FRMSZ /* restore sp with the value when trap happened */ addi t0, sp, RV_STK_FRMSZ /* restore sp with the value when trap happened */
sw t0, RV_STK_SP(sp)
/* Save CSRs */ /* Save CSRs */
sw t0, RV_STK_SP(sp)
csrr t0, mepc csrr t0, mepc
sw t0, RV_STK_MEPC(sp) sw t0, RV_STK_MEPC(sp)
csrr t0, mstatus csrr t0, mstatus
@@ -217,7 +217,8 @@ _return_from_exception:
.global _interrupt_handler .global _interrupt_handler
.type _interrupt_handler, @function .type _interrupt_handler, @function
_interrupt_handler: _interrupt_handler:
/* entry */ /* Start by saving the general purpose registers and the PC value before
* the interrupt happened. */
save_general_regs save_general_regs
save_mepc save_mepc
@@ -236,6 +237,7 @@ _interrupt_handler:
/* It will be saved in current TCB, if needed */ /* It will be saved in current TCB, if needed */
mv a0, sp mv a0, sp
call rtos_int_enter call rtos_int_enter
/* If this is a non-nested interrupt, SP now points to the interrupt stack */
/* Before dispatch c handler, restore interrupt to enable nested intr */ /* Before dispatch c handler, restore interrupt to enable nested intr */
csrr s1, mcause csrr s1, mcause
@@ -258,6 +260,7 @@ _interrupt_handler:
li t0, 0x8 li t0, 0x8
csrrs t0, mstatus, t0 csrrs t0, mstatus, t0
/* MIE set. Nested interrupts can now occur */
#ifdef CONFIG_PM_TRACE #ifdef CONFIG_PM_TRACE
li a0, 0 /* = ESP_PM_TRACE_IDLE */ li a0, 0 /* = ESP_PM_TRACE_IDLE */
@@ -287,6 +290,7 @@ _interrupt_handler:
li t0, 0x8 li t0, 0x8
csrrc t0, mstatus, t0 csrrc t0, mstatus, t0
/* MIE cleared. Nested interrupts are disabled */
/* restore the interrupt threshold level */ /* restore the interrupt threshold level */
la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
@@ -296,6 +300,7 @@ _interrupt_handler:
/* Yield to the next task is needed: */ /* Yield to the next task is needed: */
mv a0, sp mv a0, sp
call rtos_int_exit call rtos_int_exit
/* If this is a non-nested interrupt, context switch called, SP now points to back to task stack. */
/* The next (or current) stack pointer is returned in a0 */ /* The next (or current) stack pointer is returned in a0 */
mv sp, a0 mv sp, a0