From cb5a8342d4cca99dedc3d6cded917c7effe58b75 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Mon, 8 Mar 2021 23:00:07 +0800 Subject: [PATCH] esp_system: revert reset of systimer clk at startup --- components/esp_system/port/soc/esp32s2/clk.c | 1 - 1 file changed, 1 deletion(-) diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index bf8a12a4cb..2f08e42114 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -316,7 +316,6 @@ __attribute__((weak)) void esp_perip_clk_init(void) DPORT_CLEAR_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_8M); DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW); - periph_ll_reset(PERIPH_SYSTIMER_MODULE); /* Enable RNG clock. */ periph_module_enable(PERIPH_RNG_MODULE);