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apm: added low level functions for tee controller

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This commit is contained in:
morris
2023-01-09 11:17:07 +08:00
parent f7fdba7f39
commit cbde82c33f
8 changed files with 144 additions and 10 deletions
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62
components/hal/esp32c6/include/hal/apm_ll.h Normal file
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@@ -0,0 +1,62 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "soc/tee_reg.h"
#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief APM Master ID
*/
typedef enum {
APM_LL_MASTER_HPCORE = 0,
APM_LL_MASTER_LPCORE = 1,
APM_LL_MASTER_REGDMA = 2,
APM_LL_MASTER_SDIOSLV = 3,
APM_LL_MASTER_MODEM = 4,
APM_LL_MASTER_MEM_MONITOR = 5,
APM_LL_MASTER_TRACE = 6,
APM_LL_MASTER_GDMA_SPI2 = 16,
APM_LL_MASTER_GDMA_M2M = 17, // a dummy GDMA trigger, used by M2M copy
APM_LL_MASTER_GDMA_UHCI0 = 18,
APM_LL_MASTER_GDMA_I2S0 = 19,
APM_LL_MASTER_GDMA_AES = 22,
APM_LL_MASTER_GDMA_SHA = 23,
APM_LL_MASTER_GDMA_ADC = 24,
APM_LL_MASTER_GDMA_PARLIO = 25,
} apm_ll_master_id_t;
/**
* @brief APM Secure Mode
*/
typedef enum {
APM_LL_SECURE_MODE_TEE = 0, /* Trusted execution environment mode */
APM_LL_SECURE_MODE_REE0 = 1, /* Rich execution environment mode0 (need to configure APM strategy for this mode) */
APM_LL_SECURE_MODE_REE1 = 2, /* Rich execution environment mode1 (need to configure APM strategy for this mode) */
APM_LL_SECURE_MODE_REE2 = 3, /* Rich execution environment mode2 (need to configure APM strategy for this mode) */
} apm_ll_secure_mode_t;
/**
* @brief Set secure mode
*
* @param master_id APM master ID
* @param mode Secure mode
*/
static inline void apm_ll_set_master_secure_mode(apm_ll_master_id_t master_id, apm_ll_secure_mode_t mode)
{
REG_WRITE(TEE_LL_MODE_CTRL_REG(master_id), mode);
}
#ifdef __cplusplus
}
#endif

62
components/hal/esp32h2/include/hal/apm_ll.h Normal file
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@@ -0,0 +1,62 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "soc/tee_reg.h"
#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief APM Master ID
*/
typedef enum {
APM_LL_MASTER_HPCORE = 0,
APM_LL_MASTER_LPCORE = 1,
APM_LL_MASTER_REGDMA = 2,
APM_LL_MASTER_SDIOSLV = 3,
APM_LL_MASTER_MODEM = 4,
APM_LL_MASTER_MEM_MONITOR = 5,
APM_LL_MASTER_TRACE = 6,
APM_LL_MASTER_GDMA_SPI2 = 16,
APM_LL_MASTER_GDMA_M2M = 17, // a dummy GDMA trigger, used by M2M copy
APM_LL_MASTER_GDMA_UHCI0 = 18,
APM_LL_MASTER_GDMA_I2S0 = 19,
APM_LL_MASTER_GDMA_AES = 22,
APM_LL_MASTER_GDMA_SHA = 23,
APM_LL_MASTER_GDMA_ADC = 24,
APM_LL_MASTER_GDMA_PARLIO = 25,
} apm_ll_master_id_t;
/**
* @brief APM Secure Mode
*/
typedef enum {
APM_LL_SECURE_MODE_TEE = 0, /* Trusted execution environment mode */
APM_LL_SECURE_MODE_REE0 = 1, /* Rich execution environment mode0 (need to configure APM strategy for this mode) */
APM_LL_SECURE_MODE_REE1 = 2, /* Rich execution environment mode1 (need to configure APM strategy for this mode) */
APM_LL_SECURE_MODE_REE2 = 3, /* Rich execution environment mode2 (need to configure APM strategy for this mode) */
} apm_ll_secure_mode_t;
/**
* @brief Set secure mode
*
* @param master_id APM master ID
* @param mode Secure mode
*/
static inline void apm_ll_set_master_secure_mode(apm_ll_master_id_t master_id, apm_ll_secure_mode_t mode)
{
REG_WRITE(TEE_LL_MODE_CTRL_REG(master_id), mode);
}
#ifdef __cplusplus
}
#endif

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@@ -127,6 +127,10 @@ config SOC_BOD_SUPPORTED
bool
default y
config SOC_APM_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y

1
components/soc/esp32c6/include/soc/soc_caps.h
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@@ -60,6 +60,7 @@
#define SOC_FLASH_ENC_SUPPORTED 1
#define SOC_SECURE_BOOT_SUPPORTED 1
#define SOC_BOD_SUPPORTED 1
#define SOC_APM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1

10
components/soc/esp32c6/include/soc/tee_reg.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -446,10 +446,10 @@ extern "C" {
/** TEE_DATE_REG : R/W; bitpos: [27:0]; default: 35672706;
* reg_tee_date
*/
#define TEE_DATE_REG 0x0FFFFFFFU
#define TEE_DATE_REG_M (TEE_DATE_REG_V << TEE_DATE_REG_S)
#define TEE_DATE_REG_V 0x0FFFFFFFU
#define TEE_DATE_REG_S 0
#define TEE_DATE 0x0FFFFFFFU
#define TEE_DATE_M (TEE_DATE_V << TEE_DATE_S)
#define TEE_DATE_V 0x0FFFFFFFU
#define TEE_DATE_S 0
#ifdef __cplusplus
}

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@@ -31,6 +31,10 @@ config SOC_BOD_SUPPORTED
bool
default y
config SOC_APM_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_32M
bool
default y

1
components/soc/esp32h2/include/soc/soc_caps.h
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@@ -57,6 +57,7 @@
// #define SOC_FLASH_ENC_SUPPORTED 1 // TODO: IDF-6282
// #define SOC_SECURE_BOOT_SUPPORTED 1 // TODO: IDF-6281
#define SOC_BOD_SUPPORTED 1
#define SOC_APM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1

10
components/soc/esp32h2/include/soc/tee_reg.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -446,10 +446,10 @@ extern "C" {
/** TEE_DATE_REG : R/W; bitpos: [27:0]; default: 35672706;
* reg_tee_date
*/
#define TEE_DATE_REG 0x0FFFFFFFU
#define TEE_DATE_REG_M (TEE_DATE_REG_V << TEE_DATE_REG_S)
#define TEE_DATE_REG_V 0x0FFFFFFFU
#define TEE_DATE_REG_S 0
#define TEE_DATE 0x0FFFFFFFU
#define TEE_DATE_M (TEE_DATE_V << TEE_DATE_S)
#define TEE_DATE_V 0x0FFFFFFFU
#define TEE_DATE_S 0
#ifdef __cplusplus
}