espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-04 05:04:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

refactor(hal): clean up some hal file dependency on sdkconfig.h

Browse Source
This commit is contained in:
morris
2025-07-16 18:05:06 +08:00
parent 0296c30908
commit ccd092d7dc
35 changed files with 108 additions and 149 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
components/esp_rom/esp32/include/esp32/rom/sha.h
View File

@@ -27,15 +27,14 @@ typedef struct SHAContext {
uint32_t total_input_bits[4]; uint32_t total_input_bits[4];
} SHA_CTX; } SHA_CTX;
enum SHA_TYPE { typedef enum SHA_TYPE {
SHA1 = 0, SHA1 = 0,
SHA2_256, SHA2_256,
SHA2_384, SHA2_384,
SHA2_512, SHA2_512,
SHA_INVALID = -1, SHA_INVALID = -1,
}; } SHA_TYPE;
/* Do not use these function in multi core mode due to /* Do not use these function in multi core mode due to
* inside they have no safe implementation (without DPORT workaround). * inside they have no safe implementation (without DPORT workaround).

15
components/hal/adc_hal.c
View File

@@ -5,13 +5,12 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "hal/adc_hal.h" #include "hal/adc_hal.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "soc/lldesc.h" #include "soc/lldesc.h"
#include "soc/soc_caps.h" #include "soc/soc_caps_full.h"
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
//ADC utilises I2S0 DMA on ESP32 //ADC utilises I2S0 DMA on ESP32
#include "hal/i2s_hal.h" #include "hal/i2s_hal.h"
#include "hal/i2s_types.h" #include "hal/i2s_types.h"
@@ -58,7 +57,7 @@ void adc_hal_digi_init(adc_hal_dma_ctx_t *hal)
adc_ll_digi_set_clk_div(ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT); adc_ll_digi_set_clk_div(ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT);
adc_ll_digi_dma_set_eof_num(hal->eof_num); adc_ll_digi_dma_set_eof_num(hal->eof_num);
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
i2s_ll_rx_set_sample_bit(adc_hal_i2s_dev, SAMPLE_BITS, SAMPLE_BITS); i2s_ll_rx_set_sample_bit(adc_hal_i2s_dev, SAMPLE_BITS, SAMPLE_BITS);
i2s_ll_rx_enable_mono_mode(adc_hal_i2s_dev, 1); i2s_ll_rx_enable_mono_mode(adc_hal_i2s_dev, 1);
i2s_ll_rx_force_enable_fifo_mod(adc_hal_i2s_dev, 1); i2s_ll_rx_force_enable_fifo_mod(adc_hal_i2s_dev, 1);
@@ -91,7 +90,7 @@ void adc_hal_digi_deinit()
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
static adc_ll_digi_convert_mode_t get_convert_mode(adc_digi_convert_mode_t convert_mode) static adc_ll_digi_convert_mode_t get_convert_mode(adc_digi_convert_mode_t convert_mode)
{ {
#if CONFIG_IDF_TARGET_ESP32 || SOC_ADC_DIGI_CONTROLLER_NUM == 1 #if SOC_IS(ESP32) || SOC_ADC_DIGI_CONTROLLER_NUM == 1
return ADC_LL_DIGI_CONV_ONLY_ADC1; return ADC_LL_DIGI_CONV_ONLY_ADC1;
#elif (SOC_ADC_DIGI_CONTROLLER_NUM >= 2) #elif (SOC_ADC_DIGI_CONTROLLER_NUM >= 2)
switch (convert_mode) { switch (convert_mode) {
@@ -118,7 +117,7 @@ static adc_ll_digi_convert_mode_t get_convert_mode(adc_digi_convert_mode_t conve
*/ */
static void adc_hal_digi_sample_freq_config(adc_hal_dma_ctx_t *hal, adc_continuous_clk_src_t clk_src, uint32_t clk_src_freq_hz, uint32_t sample_freq_hz) static void adc_hal_digi_sample_freq_config(adc_hal_dma_ctx_t *hal, adc_continuous_clk_src_t clk_src, uint32_t clk_src_freq_hz, uint32_t sample_freq_hz)
{ {
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
uint32_t interval = clk_src_freq_hz / (ADC_LL_CLKM_DIV_NUM_DEFAULT + ADC_LL_CLKM_DIV_A_DEFAULT / ADC_LL_CLKM_DIV_B_DEFAULT + 1) / 2 / sample_freq_hz; uint32_t interval = clk_src_freq_hz / (ADC_LL_CLKM_DIV_NUM_DEFAULT + ADC_LL_CLKM_DIV_A_DEFAULT / ADC_LL_CLKM_DIV_B_DEFAULT + 1) / 2 / sample_freq_hz;
//set sample interval //set sample interval
adc_ll_digi_set_trigger_interval(interval); adc_ll_digi_set_trigger_interval(interval);
@@ -218,14 +217,14 @@ void adc_hal_digi_dma_link(adc_hal_dma_ctx_t *hal, uint8_t *data_buf)
.dw0.suc_eof = 0, .dw0.suc_eof = 0,
.dw0.owner = 1, .dw0.owner = 1,
.buffer = data_buf, .buffer = data_buf,
.next = &desc[n+1] .next = &desc[n + 1]
}; };
eof_size -= this_len; eof_size -= this_len;
data_buf += this_len; data_buf += this_len;
n++; n++;
} }
} }
desc[n-1].next = desc_head; desc[n - 1].next = desc_head;
} }
adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_dma_ctx_t *hal, const intptr_t eof_desc_addr, uint8_t **buffer, uint32_t *len) adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_dma_ctx_t *hal, const intptr_t eof_desc_addr, uint8_t **buffer, uint32_t *len)

5
components/hal/apm_hal.c
View File

@@ -5,12 +5,13 @@
*/ */
#include <stdbool.h> #include <stdbool.h>
#include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/apm_hal.h" #include "hal/apm_hal.h"
#include "hal/apm_ll.h" #include "hal/apm_ll.h"
#include "hal/log.h" #include "hal/log.h"
#if CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
void apm_hal_hp_peri_access_enable(apm_ll_master_id_t master_id, apm_ll_hp_peri_t hp_peri, void apm_hal_hp_peri_access_enable(apm_ll_master_id_t master_id, apm_ll_hp_peri_t hp_peri,
apm_ll_secure_mode_t sec_mode, bool enable) apm_ll_secure_mode_t sec_mode, bool enable)
{ {
@@ -523,4 +524,4 @@ void apm_hal_enable_ctrl_clk_gating(apm_ctrl_module_t ctrl_mod, bool enable)
} }
} }
#endif //CONFIG_IDF_TARGET_ESP32P4 #endif //SOC_IS(ESP32P4)

6
components/hal/emac_hal.c
View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <string.h> #include <string.h>
#include "sdkconfig.h" #include "soc/soc_caps_full.h"
#include "esp_attr.h" #include "esp_attr.h"
#include "hal/emac_hal.h" #include "hal/emac_hal.h"
#include "hal/emac_ll.h" #include "hal/emac_ll.h"
@@ -29,7 +29,7 @@ void emac_hal_init(emac_hal_context_t *hal)
{ {
hal->dma_regs = &EMAC_DMA; hal->dma_regs = &EMAC_DMA;
hal->mac_regs = &EMAC_MAC; hal->mac_regs = &EMAC_MAC;
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
hal->ext_regs = &EMAC_EXT; hal->ext_regs = &EMAC_EXT;
#else #else
hal->ext_regs = NULL; hal->ext_regs = NULL;
@@ -137,7 +137,7 @@ void emac_hal_init_dma_default(emac_hal_context_t *hal, emac_hal_dma_config_t *h
/* DMAOMR Configuration */ /* DMAOMR Configuration */
/* Enable Dropping of TCP/IP Checksum Error Frames */ /* Enable Dropping of TCP/IP Checksum Error Frames */
emac_ll_drop_tcp_err_frame_enable(hal->dma_regs, true); emac_ll_drop_tcp_err_frame_enable(hal->dma_regs, true);
#if CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
/* Disable Receive Store Forward (Rx FIFO is only 256B) */ /* Disable Receive Store Forward (Rx FIFO is only 256B) */
emac_ll_recv_store_forward_enable(hal->dma_regs, false); emac_ll_recv_store_forward_enable(hal->dma_regs, false);
#else #else

9
components/hal/esp32/efuse_hal.c
View File

@@ -1,15 +1,14 @@
/* /*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#include <sys/param.h> #include <sys/param.h>
#include "soc/soc_caps.h"
#include "hal/efuse_ll.h" #include "hal/efuse_ll.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"
#include "hal/config.h"
#include "soc/syscon_reg.h" #include "soc/syscon_reg.h"
#include "esp_attr.h" #include "esp_attr.h"
@@ -30,11 +29,11 @@ IRAM_ATTR uint32_t efuse_hal_get_major_chip_version(void)
case 3: case 3:
chip_ver = 2; chip_ver = 2;
break; break;
#if CONFIG_IDF_ENV_FPGA #if HAL_CONFIG_EFUSE_ENV_FPGA
case 4: /* Empty efuses, but SYSCON_DATE_REG bit is set */ case 4: /* Empty efuses, but SYSCON_DATE_REG bit is set */
chip_ver = 3; chip_ver = 3;
break; break;
#endif // CONFIG_IDF_ENV_FPGA #endif // HAL_CONFIG_EFUSE_ENV_FPGA
case 7: case 7:
chip_ver = 3; chip_ver = 3;
break; break;

6
components/hal/esp32c2/clk_tree_hal.c
View File

@@ -4,9 +4,9 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#include "soc/clkout_channel.h" #include "soc/clkout_channel.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/config.h"
#include "hal/clk_tree_hal.h" #include "hal/clk_tree_hal.h"
#include "hal/clk_tree_ll.h" #include "hal/clk_tree_ll.h"
#include "hal/gpio_ll.h" #include "hal/gpio_ll.h"
@@ -78,8 +78,8 @@ uint32_t clk_hal_xtal_get_freq_mhz(void)
{ {
uint32_t freq = clk_ll_xtal_load_freq_mhz(); uint32_t freq = clk_ll_xtal_load_freq_mhz();
if (freq == 0) { if (freq == 0) {
HAL_LOGW(CLK_HAL_TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_XTAL_FREQ); HAL_LOGW(CLK_HAL_TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", HAL_CONFIG_XTAL_HINT_FREQ_MHZ);
return CONFIG_XTAL_FREQ; return HAL_CONFIG_XTAL_HINT_FREQ_MHZ;
} }
return freq; return freq;
} }

1
components/hal/esp32c5/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"

1
components/hal/esp32c6/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"

1
components/hal/esp32c61/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"

1
components/hal/esp32h2/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "soc/chip_revision.h" #include "soc/chip_revision.h"
#include "hal/assert.h" #include "hal/assert.h"

1
components/hal/esp32h21/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"

1
components/hal/esp32h4/efuse_hal.c
View File

@@ -5,7 +5,6 @@
*/ */
#include <sys/param.h> #include <sys/param.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"

1
components/hal/esp32p4/efuse_hal.c
View File

@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#include "esp_attr.h" #include "esp_attr.h"
#include <sys/param.h> #include <sys/param.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"

1
components/hal/esp32s2/efuse_hal.c
View File

@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#include <sys/param.h> #include <sys/param.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"

1
components/hal/esp32s3/efuse_hal.c
View File

@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#include <sys/param.h> #include <sys/param.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/assert.h" #include "hal/assert.h"

6
components/hal/include/hal/adc_hal.h
View File

@@ -19,12 +19,12 @@
#include "hal/gdma_ll.h" #include "hal/gdma_ll.h"
#endif #endif
#if CONFIG_IDF_TARGET_ESP32S2 #if SOC_IS(ESP32S2)
//ADC utilises SPI3 DMA on ESP32S2 //ADC utilises SPI3 DMA on ESP32S2
#include "hal/spi_ll.h" #include "hal/spi_ll.h"
#endif #endif
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
//ADC utilises I2S0 DMA on ESP32 //ADC utilises I2S0 DMA on ESP32
#include "hal/i2s_ll.h" #include "hal/i2s_ll.h"
#endif #endif
@@ -33,7 +33,7 @@
extern "C" { extern "C" {
#endif #endif
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
#define ADC_HAL_DMA_I2S_HOST 0 #define ADC_HAL_DMA_I2S_HOST 0
#endif #endif

9
components/hal/include/hal/adc_types.h
View File

@@ -7,7 +7,6 @@
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "soc/clk_tree_defs.h" #include "soc/clk_tree_defs.h"
#include "esp_attr.h" #include "esp_attr.h"
@@ -159,7 +158,7 @@ typedef enum {
/*--------------------------------------------------------------- /*---------------------------------------------------------------
Output Format Output Format
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 #if SOC_IS(ESP32) || SOC_IS(ESP32S2)
/** /**
* @brief ADC digital controller (DMA mode) output data format. * @brief ADC digital controller (DMA mode) output data format.
* Used to analyze the acquired ADC (DMA) data. * Used to analyze the acquired ADC (DMA) data.
@@ -184,7 +183,7 @@ typedef struct {
}; };
} adc_digi_output_data_t; } adc_digi_output_data_t;
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 #elif SOC_IS(ESP32C3) || SOC_IS(ESP32C2)
/** /**
* @brief ADC digital controller (DMA mode) output data format. * @brief ADC digital controller (DMA mode) output data format.
* Used to analyze the acquired ADC (DMA) data. * Used to analyze the acquired ADC (DMA) data.
@@ -204,7 +203,7 @@ typedef struct {
}; };
} adc_digi_output_data_t; } adc_digi_output_data_t;
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 #elif SOC_IS(ESP32S3) || SOC_IS(ESP32P4)
/** /**
* @brief ADC digital controller (DMA mode) output data format. * @brief ADC digital controller (DMA mode) output data format.
* Used to analyze the acquired ADC (DMA) data. * Used to analyze the acquired ADC (DMA) data.
@@ -224,7 +223,7 @@ typedef struct {
}; };
} adc_digi_output_data_t; } adc_digi_output_data_t;
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 #elif SOC_IS(ESP32C6) || SOC_IS(ESP32H2) || SOC_IS(ESP32C5) || SOC_IS(ESP32C61)
/** /**
* @brief ADC digital controller (DMA mode) output data format. * @brief ADC digital controller (DMA mode) output data format.
* Used to analyze the acquired ADC (DMA) data. * Used to analyze the acquired ADC (DMA) data.

6
components/hal/include/hal/apm_hal.h
View File

@@ -16,7 +16,7 @@ extern "C" {
#include "hal/apm_ll.h" #include "hal/apm_ll.h"
#include "hal/apm_types.h" #include "hal/apm_types.h"
#if CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
/** /**
* @brief DMA configurable region configuration data. * @brief DMA configurable region configuration data.
@@ -360,11 +360,11 @@ void apm_hal_enable_reset_event_bypass(bool enable);
*/ */
void apm_hal_enable_ctrl_clk_gating(apm_ctrl_module_t ctrl_mod, bool enable); void apm_hal_enable_ctrl_clk_gating(apm_ctrl_module_t ctrl_mod, bool enable);
#endif //CONFIG_IDF_TARGET_ESP32P4 #endif //SOC_IS(ESP32P4)
#elif SOC_APM_CTRL_FILTER_SUPPORTED //!SOC_APM_SUPPORTED #elif SOC_APM_CTRL_FILTER_SUPPORTED //!SOC_APM_SUPPORTED
#if CONFIG_IDF_TARGET_ESP32H4 #if SOC_IS(ESP32H4)
#include "soc/hp_apm_reg.h" #include "soc/hp_apm_reg.h"
#define apm_hal_enable_ctrl_filter_all(en) \ #define apm_hal_enable_ctrl_filter_all(en) \
REG_WRITE(HP_APM_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0); REG_WRITE(HP_APM_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0);

9
components/hal/include/hal/emac_hal.h
View File

@@ -12,6 +12,7 @@
#include "esp_err.h" #include "esp_err.h"
#include "hal/eth_types.h" #include "hal/eth_types.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@@ -25,7 +26,7 @@ extern "C" {
#define TYPE_SIZE_ERR_MSG(DATATYPE, SIZE) #DATATYPE " should occupy " STR(SIZE) " bytes in memory" #define TYPE_SIZE_ERR_MSG(DATATYPE, SIZE) #DATATYPE " should occupy " STR(SIZE) " bytes in memory"
#define ASSERT_TYPE_SIZE(DATATYPE, SIZE) ESP_STATIC_ASSERT(sizeof(DATATYPE) == SIZE, TYPE_SIZE_ERR_MSG(DATATYPE, SIZE)) #define ASSERT_TYPE_SIZE(DATATYPE, SIZE) ESP_STATIC_ASSERT(sizeof(DATATYPE) == SIZE, TYPE_SIZE_ERR_MSG(DATATYPE, SIZE))
#if CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
// Descriptor must be 64B aligned for ESP32P4 due to cache arrangement // Descriptor must be 64B aligned for ESP32P4 due to cache arrangement
#define EMAC_HAL_DMA_DESC_SIZE (64) #define EMAC_HAL_DMA_DESC_SIZE (64)
#else #else
@@ -191,7 +192,7 @@ ASSERT_TYPE_SIZE(eth_dma_rx_descriptor_t, EMAC_HAL_DMA_DESC_SIZE);
typedef struct emac_mac_dev_s *emac_mac_soc_regs_t; typedef struct emac_mac_dev_s *emac_mac_soc_regs_t;
typedef struct emac_dma_dev_s *emac_dma_soc_regs_t; typedef struct emac_dma_dev_s *emac_dma_soc_regs_t;
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
typedef struct emac_ext_dev_s *emac_ext_soc_regs_t; typedef struct emac_ext_dev_s *emac_ext_soc_regs_t;
#else #else
typedef void *emac_ext_soc_regs_t; typedef void *emac_ext_soc_regs_t;
@@ -236,9 +237,9 @@ void emac_hal_init(emac_hal_context_t *hal);
#define emac_hal_clock_enable_rmii_input(hal) emac_ll_clock_enable_rmii_input((hal)->ext_regs) #define emac_hal_clock_enable_rmii_input(hal) emac_ll_clock_enable_rmii_input((hal)->ext_regs)
#ifdef CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
#define emac_hal_clock_rmii_rx_tx_div(hal, div) emac_ll_clock_rmii_rx_tx_div((hal)->ext_regs, div) #define emac_hal_clock_rmii_rx_tx_div(hal, div) emac_ll_clock_rmii_rx_tx_div((hal)->ext_regs, div)
#endif // CONFIG_IDF_TARGET_ESP32P4 #endif // SOC_IS(ESP32P4)
#define emac_hal_clock_enable_rmii_output(hal) emac_ll_clock_enable_rmii_output((hal)->ext_regs) #define emac_hal_clock_enable_rmii_output(hal) emac_ll_clock_enable_rmii_output((hal)->ext_regs)

4
components/hal/include/hal/modem_clock_hal.h
View File

@@ -9,7 +9,7 @@
#pragma once #pragma once
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "sdkconfig.h"
#if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED #if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED
#include "hal/modem_syscon_ll.h" #include "hal/modem_syscon_ll.h"
#include "hal/modem_lpcon_ll.h" #include "hal/modem_lpcon_ll.h"
@@ -24,7 +24,7 @@ typedef struct {
modem_lpcon_dev_t *lpcon_dev; modem_lpcon_dev_t *lpcon_dev;
} modem_clock_hal_context_t; } modem_clock_hal_context_t;
#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM-92 #if !SOC_IS(ESP32H2) //TODO: PM-92
void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap); void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap);
uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain); uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain);
#endif #endif

11
components/hal/include/hal/mpi_hal.h
View File

@@ -16,8 +16,7 @@
#include <stdint.h> #include <stdint.h>
#include <sys/param.h> #include <sys/param.h>
#include "hal/mpi_types.h" #include "hal/mpi_types.h"
#include "sdkconfig.h" #include "soc/soc_caps.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@@ -32,7 +31,7 @@ extern "C" {
size_t mpi_hal_calc_hardware_words(size_t words); size_t mpi_hal_calc_hardware_words(size_t words);
/** /**
* @brief Clear the MPI power control bit and intitialise the MPI hardware. * @brief Clear the MPI power control bit and initialise the MPI hardware.
* *
*/ */
void mpi_hal_enable_hardware_hw_op(void); void mpi_hal_enable_hardware_hw_op(void);
@@ -91,13 +90,13 @@ void mpi_hal_write_at_offset(mpi_param_t param, int offset, uint32_t value);
void mpi_hal_write_m_prime(uint32_t Mprime); void mpi_hal_write_m_prime(uint32_t Mprime);
/** /**
* @brief Write first word of the parametr Rinv. * @brief Write first word of the parameter Rinv.
* *
* @param rinv Value of first word of rinv. * @param rinv Value of first word of rinv.
*/ */
void mpi_hal_write_rinv(uint32_t rinv); void mpi_hal_write_rinv(uint32_t rinv);
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
/** /**
* @brief Enable/Disable constant time acceleration option. * @brief Enable/Disable constant time acceleration option.
* *
@@ -118,7 +117,7 @@ void mpi_hal_enable_search(bool enable);
* @param position Address to start search. * @param position Address to start search.
*/ */
void mpi_hal_set_search_position(size_t position); void mpi_hal_set_search_position(size_t position);
#endif /* !CONFIG_IDF_TARGET_ESP32 */ #endif /* !SOC_IS(ESP32) */
/** /**
* @brief Begin an MPI operation. * @brief Begin an MPI operation.

3
components/hal/include/hal/pmu_types.h
View File

@@ -8,7 +8,6 @@
#include <stdint.h> #include <stdint.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "sdkconfig.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@@ -36,7 +35,7 @@ typedef enum {
/** /**
* @brief PMU power domain of HP system * @brief PMU power domain of HP system
*/ */
#if CONFIG_IDF_TARGET_ESP32P4 #if SOC_IS(ESP32P4)
typedef enum { typedef enum {
PMU_HP_PD_TOP = 0, /*!< Power domain of digital top */ PMU_HP_PD_TOP = 0, /*!< Power domain of digital top */
PMU_HP_PD_CNNT = 1, /*!< Power domain of high-speed IO peripherals such as USB/SDIO/Ethernet etc.*/ PMU_HP_PD_CNNT = 1, /*!< Power domain of high-speed IO peripherals such as USB/SDIO/Ethernet etc.*/

3
components/hal/include/hal/rtc_hal.h
View File

@@ -9,9 +9,8 @@
#include <stdint.h> #include <stdint.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/gpio_types.h" #include "hal/gpio_types.h"
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if SOC_IS(ESP32) || SOC_IS(ESP32C2) || SOC_IS(ESP32C3) || SOC_IS(ESP32S2) || SOC_IS(ESP32S3)
#include "hal/rtc_cntl_ll.h" #include "hal/rtc_cntl_ll.h"
#endif #endif

8
components/hal/include/hal/sha_types.h
View File

@@ -6,21 +6,13 @@
#pragma once #pragma once
#include "sdkconfig.h"
/* Use enum from rom for backwards compatibility */
#include "rom/sha.h" #include "rom/sha.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Use enum from rom for backwards compatibility */
#if CONFIG_IDF_TARGET_ESP32
typedef enum SHA_TYPE esp_sha_type;
#else
typedef SHA_TYPE esp_sha_type; typedef SHA_TYPE esp_sha_type;
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }

9
components/hal/include/hal/touch_sensor_legacy_types.h
View File

@@ -8,7 +8,6 @@
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include "sdkconfig.h"
#include "esp_attr.h" #include "esp_attr.h"
#include "esp_bit_defs.h" #include "esp_bit_defs.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
@@ -128,7 +127,7 @@ typedef enum {
#define TOUCH_PAD_THRESHOLD_MAX (0xFFFF) /*!< If set touch threshold max value, The touch sensor can't be in touched status */ #define TOUCH_PAD_THRESHOLD_MAX (0xFFFF) /*!< If set touch threshold max value, The touch sensor can't be in touched status */
#endif #endif
#ifdef CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
#define TOUCH_PAD_SLEEP_CYCLE_DEFAULT (0x1000) /*!<The timer frequency is RTC_SLOW_CLK (can be 150k or 32k depending on the options), max value is 0xffff */ #define TOUCH_PAD_SLEEP_CYCLE_DEFAULT (0x1000) /*!<The timer frequency is RTC_SLOW_CLK (can be 150k or 32k depending on the options), max value is 0xffff */
#define TOUCH_PAD_MEASURE_CYCLE_DEFAULT (0x7fff) /*!<The timer frequency is 8Mhz, the max value is 0x7fff */ #define TOUCH_PAD_MEASURE_CYCLE_DEFAULT (0x7fff) /*!<The timer frequency is 8Mhz, the max value is 0x7fff */
@@ -136,9 +135,9 @@ typedef enum {
#define TOUCH_TRIGGER_MODE_DEFAULT (TOUCH_TRIGGER_BELOW) /*!<Interrupts can be triggered if sensor value gets below or above threshold */ #define TOUCH_TRIGGER_MODE_DEFAULT (TOUCH_TRIGGER_BELOW) /*!<Interrupts can be triggered if sensor value gets below or above threshold */
#define TOUCH_TRIGGER_SOURCE_DEFAULT (TOUCH_TRIGGER_SOURCE_SET1) /*!<The wakeup trigger source can be SET1 or both SET1 and SET2 */ #define TOUCH_TRIGGER_SOURCE_DEFAULT (TOUCH_TRIGGER_SOURCE_SET1) /*!<The wakeup trigger source can be SET1 or both SET1 and SET2 */
#endif // CONFIG_IDF_TARGET ESP32 #endif // SOC_IS(ESP32)
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
/** /**
* Excessive total time will slow down the touch response. * Excessive total time will slow down the touch response.
* Too small measurement time will not be sampled enough, resulting in inaccurate measurements. * Too small measurement time will not be sampled enough, resulting in inaccurate measurements.
@@ -301,7 +300,7 @@ typedef struct {
bool en_proximity; /*!<enable proximity function for sleep pad */ bool en_proximity; /*!<enable proximity function for sleep pad */
} touch_pad_sleep_channel_t; } touch_pad_sleep_channel_t;
#endif // !CONFIG_IDF_TARGET_ESP32 #endif // !SOC_IS(ESP32)
#ifdef __cplusplus #ifdef __cplusplus
} }

1
components/hal/include/hal/twai_hal.h
View File

@@ -13,7 +13,6 @@
#include <stddef.h> #include <stddef.h>
#include <stdbool.h> #include <stdbool.h>
#include "sdkconfig.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/twai_types.h" #include "hal/twai_types.h"

9
components/hal/mpi_hal.c
View File

@@ -5,8 +5,7 @@
*/ */
#include "hal/mpi_hal.h" #include "hal/mpi_hal.h"
#include "hal/mpi_ll.h" #include "hal/mpi_ll.h"
#include "sdkconfig.h" #include "soc/soc_caps_full.h"
size_t mpi_hal_calc_hardware_words(size_t words) size_t mpi_hal_calc_hardware_words(size_t words)
{ {
@@ -19,7 +18,7 @@ void mpi_hal_enable_hardware_hw_op(void)
} }
// Note: from enabling RSA clock to here takes about 1.3us // Note: from enabling RSA clock to here takes about 1.3us
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
mpi_ll_disable_interrupt(); mpi_ll_disable_interrupt();
#endif #endif
} }
@@ -70,7 +69,7 @@ void mpi_hal_write_rinv(uint32_t rinv)
} }
// Acceleration options // Acceleration options
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
void mpi_hal_enable_constant_time(bool enable) void mpi_hal_enable_constant_time(bool enable)
{ {
if (enable){ if (enable){
@@ -95,7 +94,7 @@ void mpi_hal_set_search_position(size_t position)
{ {
mpi_ll_set_search_position(position); mpi_ll_set_search_position(position);
} }
#endif /* !CONFIG_IDF_TARGET_ESP32 */ #endif // !SOC_IS(ESP32)
/* Begin an RSA operation. /* Begin an RSA operation.
*/ */

20
components/hal/platform_port/include/hal/config.h
View File

@@ -11,8 +11,28 @@
extern "C" { extern "C" {
#endif #endif
/**
* @brief Enable this to reuse ROM APIs for GPIO operations.
* It will save some code size.
*/
#define HAL_CONFIG_GPIO_USE_ROM_API CONFIG_HAL_GPIO_USE_ROM_IMPL #define HAL_CONFIG_GPIO_USE_ROM_API CONFIG_HAL_GPIO_USE_ROM_IMPL
/**
* @brief Enable this to indicate the target is an FPGA.
*/
#define HAL_CONFIG_EFUSE_ENV_FPGA CONFIG_IDF_ENV_FPGA
/**
* @brief When the hardware fails in measuring the XTAL frequency, use this value as a hint.
*/
#define HAL_CONFIG_XTAL_HINT_FREQ_MHZ CONFIG_XTAL_FREQ
/**
* @brief Enable this to use ROM APIs for SPI Flash operations.
* It will save some code size.
*/
#define HAL_CONFIG_SPI_FLASH_USE_ROM_API CONFIG_SPI_FLASH_ROM_IMPL
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

8
components/hal/sha_hal.c
View File

@@ -6,19 +6,19 @@
// The HAL layer for SHA // The HAL layer for SHA
#include <stdlib.h>
#include <stdio.h>
#include "hal/sha_hal.h" #include "hal/sha_hal.h"
#include "hal/sha_types.h" #include "hal/sha_types.h"
#include "hal/sha_ll.h" #include "hal/sha_ll.h"
#include "soc/soc_caps.h" #include "soc/soc_caps_full.h"
#include <stdlib.h>
#include <stdio.h>
#define SHA1_STATE_LEN_WORDS (160 / 32) #define SHA1_STATE_LEN_WORDS (160 / 32)
#define SHA256_STATE_LEN_WORDS (256 / 32) #define SHA256_STATE_LEN_WORDS (256 / 32)
#define SHA512_STATE_LEN_WORDS (512 / 32) #define SHA512_STATE_LEN_WORDS (512 / 32)
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
/* Return state size (in words) for a given SHA type */ /* Return state size (in words) for a given SHA type */
inline static size_t state_length(esp_sha_type type) inline static size_t state_length(esp_sha_type type)

12
components/hal/spi_flash_encrypt_hal_iram.c
View File

@@ -12,12 +12,12 @@
void spi_flash_encryption_hal_enable(void) void spi_flash_encryption_hal_enable(void)
{ {
spi_flash_encrypt_ll_enable(); spi_flash_encrypt_ll_enable();
#if CONFIG_IDF_TARGET_ESP32S2 #if SOC_IS(ESP32S2)
spi_flash_encrypt_ll_aes_accelerator_enable(); spi_flash_encrypt_ll_aes_accelerator_enable();
#endif //CONFIG_IDF_TARGET_ESP32S2 #endif //SOC_IS(ESP32S2)
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
spi_flash_encrypt_ll_type(FLASH_ENCRYPTION_MANU); spi_flash_encrypt_ll_type(FLASH_ENCRYPTION_MANU);
#endif // !CONFIG_IDF_TARGET_ESP32 #endif // !SOC_IS(ESP32)
} }
void spi_flash_encryption_hal_disable(void) void spi_flash_encryption_hal_disable(void)
@@ -27,9 +27,9 @@ void spi_flash_encryption_hal_disable(void)
void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size) void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size)
{ {
#if !CONFIG_IDF_TARGET_ESP32 #if !SOC_IS(ESP32)
spi_flash_encrypt_ll_buffer_length(size); spi_flash_encrypt_ll_buffer_length(size);
#endif // !CONFIG_IDF_TARGET_ESP32 #endif // !SOC_IS(ESP32)
spi_flash_encrypt_ll_address_save(address); spi_flash_encrypt_ll_address_save(address);
spi_flash_encrypt_ll_plaintext_save(address, buffer, size); spi_flash_encrypt_ll_plaintext_save(address, buffer, size);
spi_flash_encrypt_ll_calculate_start(); spi_flash_encrypt_ll_calculate_start();

2
components/hal/spi_flash_hal.c
View File

@@ -35,7 +35,7 @@ static uint32_t get_flash_clock_divider(const spi_flash_hal_config_t *cfg)
HAL_LOGE(TAG, "Target frequency %dMHz higher than src %dMHz.", cfg_freq_mhz, src_freq_mhz); HAL_LOGE(TAG, "Target frequency %dMHz higher than src %dMHz.", cfg_freq_mhz, src_freq_mhz);
abort(); abort();
} }
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 #if SOC_IS(ESP32) || SOC_IS(ESP32S2) || SOC_IS(ESP32C3)
if (cfg_freq_mhz == 26 || cfg_freq_mhz == 27) { if (cfg_freq_mhz == 26 || cfg_freq_mhz == 27) {
best_div = 3; best_div = 3;
} else } else

12
components/hal/spi_flash_hal_iram.c
View File

@@ -3,9 +3,9 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h" #include "hal/config.h"
#include "hal/spi_flash_hal.h" #include "hal/spi_flash_hal.h"
#include "soc/soc_caps.h"
#if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host); void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host);
@@ -15,7 +15,7 @@ void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host);
#define SPI_FLASH_TSHSL2_SAFE_VAL_NS (30) #define SPI_FLASH_TSHSL2_SAFE_VAL_NS (30)
#endif //SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND #endif //SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
#ifndef CONFIG_SPI_FLASH_ROM_IMPL #if !HAL_CONFIG_SPI_FLASH_USE_ROM_API
#include "spi_flash_hal_common.inc" #include "spi_flash_hal_common.inc"
@@ -88,7 +88,7 @@ esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_inst_t *host, bool wp)
return ESP_OK; return ESP_OK;
} }
#else // defined CONFIG_SPI_FLASH_ROM_IMPL #else
static inline spi_dev_t *get_spi_dev(spi_flash_host_inst_t *host) static inline spi_dev_t *get_spi_dev(spi_flash_host_inst_t *host)
{ {
@@ -101,7 +101,7 @@ static inline int get_host_id(spi_flash_host_inst_t* host)
return spi_flash_ll_hw_get_id(dev); return spi_flash_ll_hw_get_id(dev);
} }
#endif // !CONFIG_SPI_FLASH_ROM_IMPL #endif // !HAL_CONFIG_SPI_FLASH_USE_ROM_API
uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host) uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host)
{ {
@@ -115,7 +115,7 @@ uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host)
// Not clear if this is necessary, or only necessary if // Not clear if this is necessary, or only necessary if
// chip->spi == SPI1. But probably doesn't hurt... // chip->spi == SPI1. But probably doesn't hurt...
if ((void*) dev == spi_flash_ll_get_hw(SPI1_HOST)) { if ((void*) dev == spi_flash_ll_get_hw(SPI1_HOST)) {
#if CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
status &= spi_flash_ll_host_idle(&SPI0); status &= spi_flash_ll_host_idle(&SPI0);
#endif #endif
} }

6
components/hal/usb_dwc_hal.c
View File

@@ -8,7 +8,7 @@
#include <stdint.h> #include <stdint.h>
#include <string.h> // For memset() #include <string.h> // For memset()
#include <stdlib.h> // For abort() #include <stdlib.h> // For abort()
#include "sdkconfig.h" #include "soc/soc_caps_full.h"
#include "soc/chip_revision.h" #include "soc/chip_revision.h"
#include "soc/usb_periph.h" #include "soc/usb_periph.h"
#include "hal/usb_dwc_hal.h" #include "hal/usb_dwc_hal.h"
@@ -87,7 +87,7 @@ static void set_defaults(usb_dwc_hal_context_t *hal)
//GAHBCFG register //GAHBCFG register
usb_dwc_ll_gahbcfg_en_dma_mode(hal->dev); usb_dwc_ll_gahbcfg_en_dma_mode(hal->dev);
int hbstlen = 0; //Use AHB burst SINGLE by default int hbstlen = 0; //Use AHB burst SINGLE by default
#if CONFIG_IDF_TARGET_ESP32S2 && CONFIG_ESP32S2_REV_MIN_FULL < 100 #if SOC_IS(ESP32S2)
/* /*
Hardware errata workaround for the ESP32-S2 ECO0 (see ESP32-S2 Errata Document section 4.0 for full details). Hardware errata workaround for the ESP32-S2 ECO0 (see ESP32-S2 Errata Document section 4.0 for full details).
@@ -105,7 +105,7 @@ static void set_defaults(usb_dwc_hal_context_t *hal)
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 100)) { if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 100)) {
hbstlen = 1; //Set AHB burst to INCR to workaround hardware errata hbstlen = 1; //Set AHB burst to INCR to workaround hardware errata
} }
#endif //CONFIG_IDF_TARGET_ESP32S2 && CONFIG_ESP32S2_REV_MIN_FULL < 100 #endif // SOC_IS(ESP32S2)
usb_dwc_ll_gahbcfg_set_hbstlen(hal->dev, hbstlen); //Set AHB burst mode usb_dwc_ll_gahbcfg_set_hbstlen(hal->dev, hbstlen); //Set AHB burst mode
//GUSBCFG register //GUSBCFG register
usb_dwc_ll_gusbcfg_dis_hnp_cap(hal->dev); //Disable HNP usb_dwc_ll_gusbcfg_dis_hnp_cap(hal->dev); //Disable HNP

7
components/hal/wdt_hal_iram.c
View File

@@ -8,6 +8,7 @@
#include <stdbool.h> #include <stdbool.h>
#include "hal/wdt_types.h" #include "hal/wdt_types.h"
#include "hal/wdt_hal.h" #include "hal/wdt_hal.h"
#include "soc/soc_caps_full.h"
/* ---------------------------- Init and Config ----------------------------- */ /* ---------------------------- Init and Config ----------------------------- */
@@ -18,7 +19,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
if (wdt_inst == WDT_MWDT0) { if (wdt_inst == WDT_MWDT0) {
hal->mwdt_dev = &TIMERG0; hal->mwdt_dev = &TIMERG0;
} }
#if SOC_TIMER_GROUPS >= 2 #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
else if (wdt_inst == WDT_MWDT1) { else if (wdt_inst == WDT_MWDT1) {
hal->mwdt_dev = &TIMERG1; hal->mwdt_dev = &TIMERG1;
} }
@@ -37,7 +38,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE1); rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE1);
rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE2); rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE2);
rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE3); rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE3);
#ifdef CONFIG_IDF_TARGET_ESP32 #if SOC_IS(ESP32)
//Enable or disable level interrupt. Edge interrupt is always disabled. //Enable or disable level interrupt. Edge interrupt is always disabled.
rwdt_ll_set_edge_intr(hal->rwdt_dev, false); rwdt_ll_set_edge_intr(hal->rwdt_dev, false);
rwdt_ll_set_level_intr(hal->rwdt_dev, enable_intr); rwdt_ll_set_level_intr(hal->rwdt_dev, enable_intr);
@@ -67,7 +68,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
mwdt_ll_disable_stage(hal->mwdt_dev, 1); mwdt_ll_disable_stage(hal->mwdt_dev, 1);
mwdt_ll_disable_stage(hal->mwdt_dev, 2); mwdt_ll_disable_stage(hal->mwdt_dev, 2);
mwdt_ll_disable_stage(hal->mwdt_dev, 3); mwdt_ll_disable_stage(hal->mwdt_dev, 3);
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if SOC_IS(ESP32) || SOC_IS(ESP32S2) || SOC_IS(ESP32S3)
//Enable or disable level interrupt. Edge interrupt is always disabled. //Enable or disable level interrupt. Edge interrupt is always disabled.
mwdt_ll_set_edge_intr(hal->mwdt_dev, false); mwdt_ll_set_edge_intr(hal->mwdt_dev, false);
mwdt_ll_set_level_intr(hal->mwdt_dev, enable_intr); mwdt_ll_set_level_intr(hal->mwdt_dev, enable_intr);

37
tools/ci/sg_rules/no_kconfig_in_hal_component.yml
View File

@@ -11,37 +11,17 @@ ignores:
- "components/hal/platform_port/**/*" - "components/hal/platform_port/**/*"
- "components/hal/test_apps/**/*" - "components/hal/test_apps/**/*"
# the following files should be refactored to remove Kconfig macros # the following files should be refactored to remove Kconfig macros
- "components/hal/adc_hal.c"
- "components/hal/adc_oneshot_hal.c" - "components/hal/adc_oneshot_hal.c"
- "components/hal/apm_hal.c"
- "components/hal/cache_hal.c" - "components/hal/cache_hal.c"
- "components/hal/ecdsa_hal.c" - "components/hal/ecdsa_hal.c"
- "components/hal/emac_hal.c"
- "components/hal/mmu_hal.c" - "components/hal/mmu_hal.c"
- "components/hal/sha_hal.c"
- "components/hal/spi_flash_encrypt_hal_iram.c"
- "components/hal/spi_flash_hal_iram.c"
- "components/hal/spi_flash_hal.c" - "components/hal/spi_flash_hal.c"
- "components/hal/twai_hal_sja1000.c" - "components/hal/twai_hal_sja1000.c"
- "components/hal/usb_dwc_hal.c"
- "components/hal/wdt_hal_iram.c"
- "components/hal/esp32/efuse_hal.c"
- "components/hal/esp32/gpio_hal_workaround.c" - "components/hal/esp32/gpio_hal_workaround.c"
- "components/hal/esp32/include/hal/twai_ll.h" - "components/hal/esp32/include/hal/twai_ll.h"
- "components/hal/esp32/include/hal/uart_ll.h" - "components/hal/esp32/include/hal/uart_ll.h"
- "components/hal/esp32c2/clk_tree_hal.c"
- "components/hal/*/efuse_hal.c"
- "components/hal/include/hal/adc_types.h"
- "components/hal/include/hal/adc_hal.h"
- "components/hal/include/hal/rtc_hal.h"
- "components/hal/include/hal/apm_hal.h"
- "components/hal/include/hal/ecdsa_hal.h" - "components/hal/include/hal/ecdsa_hal.h"
- "components/hal/include/hal/emac_hal.h"
- "components/hal/include/hal/gpio_hal.h" - "components/hal/include/hal/gpio_hal.h"
- "components/hal/include/hal/mmu_hal.h"
- "components/hal/include/hal/pmu_types.h"
- "components/hal/include/hal/sha_types.h"
- "components/hal/include/hal/touch_sensor_legacy_types.h"
- "components/hal/include/hal/twai_types_deprecated.h" - "components/hal/include/hal/twai_types_deprecated.h"
rule: rule:
any: any:
@@ -73,28 +53,11 @@ ignores:
- "components/hal/platform_port/**/*" - "components/hal/platform_port/**/*"
- "components/hal/test_apps/**/*" - "components/hal/test_apps/**/*"
# the following files should be refactored to remove sdkconfig.h # the following files should be refactored to remove sdkconfig.h
- "components/hal/adc_hal.c"
- "components/hal/adc_oneshot_hal.c" - "components/hal/adc_oneshot_hal.c"
- "components/hal/cache_hal.c" - "components/hal/cache_hal.c"
- "components/hal/emac_hal.c"
- "components/hal/mmu_hal.c" - "components/hal/mmu_hal.c"
- "components/hal/mpi_hal.c"
- "components/hal/spi_flash_hal_iram.c"
- "components/hal/twai_hal_sja1000.c" - "components/hal/twai_hal_sja1000.c"
- "components/hal/usb_dwc_hal.c"
- "components/hal/efuse_hal.c"
- "components/hal/esp32/include/hal/twai_ll.h"
- "components/hal/esp32c2/clk_tree_hal.c"
- "components/hal/*/efuse_hal.c"
- "components/hal/include/hal/adc_types.h"
- "components/hal/include/hal/ecdsa_hal.h" - "components/hal/include/hal/ecdsa_hal.h"
- "components/hal/include/hal/modem_clock_hal.h"
- "components/hal/include/hal/mpi_hal.h"
- "components/hal/include/hal/pmu_types.h"
- "components/hal/include/hal/rtc_hal.h"
- "components/hal/include/hal/sha_types.h"
- "components/hal/include/hal/touch_sensor_legacy_types.h"
- "components/hal/include/hal/twai_hal.h"
- "components/hal/include/hal/twai_types_deprecated.h" - "components/hal/include/hal/twai_types_deprecated.h"
rule: rule:
kind: preproc_include kind: preproc_include