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Merge branch 'bugfix/fix_rtc_clock_freq_value_macro_v4.3' into 'release/v4.3'

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rtc_clk: Fix wrong RC_SLOW clock frequency value on ESP32C3 (backport v4.3)

See merge request espressif/esp-idf!19934
This commit is contained in:
Jiang Jiang Jian
2022-09-08 10:41:05 +08:00
parent 5b81524e63 3ce98867a0
commit cfdc0b9fce
1 changed files with 7 additions and 4 deletions
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11
components/soc/esp32c3/include/soc/rtc.h
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@@ -49,7 +49,10 @@ extern "C" {
#define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12) #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12)
#define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10)
#define RTC_SLOW_CLK_FREQ_90K 90000 // On esp32c3, RC_SLOW_CLK has a freq of ~136kHz
// `90K` does not mean the actual freq, it only indicates the clock source is RC_SLOW_CLK.
// Macro name `RTC_SLOW_CLK_FREQ_90K` is unchanged for compatibility reason
#define RTC_SLOW_CLK_FREQ_90K 136000
#define RTC_SLOW_CLK_FREQ_8MD256 (RTC_FAST_CLK_FREQ_APPROX / 256) #define RTC_SLOW_CLK_FREQ_8MD256 (RTC_FAST_CLK_FREQ_APPROX / 256)
#define RTC_SLOW_CLK_FREQ_32K 32768 #define RTC_SLOW_CLK_FREQ_32K 32768
@@ -173,7 +176,7 @@ typedef struct rtc_cpu_freq_config_s {
* @brief RTC SLOW_CLK frequency values * @brief RTC SLOW_CLK frequency values
*/ */
typedef enum { typedef enum {
RTC_SLOW_FREQ_RTC = 0, //!< Internal 150 kHz RC oscillator RTC_SLOW_FREQ_RTC = 0, //!< Internal 136 kHz RC oscillator
RTC_SLOW_FREQ_32K_XTAL = 1, //!< External 32 kHz XTAL RTC_SLOW_FREQ_32K_XTAL = 1, //!< External 32 kHz XTAL
RTC_SLOW_FREQ_8MD256 = 2, //!< Internal 8 MHz RC oscillator, divided by 256 RTC_SLOW_FREQ_8MD256 = 2, //!< Internal 8 MHz RC oscillator, divided by 256
} rtc_slow_freq_t; } rtc_slow_freq_t;
@@ -213,7 +216,7 @@ typedef struct {
rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set
uint32_t clk_rtc_clk_div : 8; uint32_t clk_rtc_clk_div : 8;
uint32_t clk_8m_clk_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency) uint32_t clk_8m_clk_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency)
uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value leads to lower frequency) uint32_t slow_clk_dcap : 8; //!< RTC 136k clock adjustment parameter (higher value leads to lower frequency)
uint32_t clk_8m_dfreq : 8; //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency) uint32_t clk_8m_dfreq : 8; //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency)
} rtc_clk_config_t; } rtc_clk_config_t;
@@ -394,7 +397,7 @@ rtc_slow_freq_t rtc_clk_slow_freq_get(void);
/** /**
* @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz * @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz
* *
* - if RTC_SLOW_FREQ_RTC is selected, returns ~150000 * - if RTC_SLOW_FREQ_RTC is selected, returns 136000
* - if RTC_SLOW_FREQ_32K_XTAL is selected, returns 32768 * - if RTC_SLOW_FREQ_32K_XTAL is selected, returns 32768
* - if RTC_SLOW_FREQ_8MD256 is selected, returns ~33000 * - if RTC_SLOW_FREQ_8MD256 is selected, returns ~33000
* *