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Merge branch 'feature/p4_add_3bit_for_wafer_major' into 'master'

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feat(efuse): Adds 3-bit field for wafer major version in ESP32-P4

See merge request espressif/esp-idf!39562
This commit is contained in:
Konstantin Kondrashov
2025-06-13 15:06:20 +08:00
parent d38621e95a 3b0f4e4083
commit d099224758
6 changed files with 60 additions and 38 deletions
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38
components/efuse/esp32p4/esp_efuse_table.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -9,7 +9,7 @@
#include <assert.h> #include <assert.h>
#include "esp_efuse_table.h" #include "esp_efuse_table.h"
// md5_digest_table c56ed98dde7a08c8f70d57a01faba96a // md5_digest_table 665d4d3a1354653f8e46869d49df1a2f
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -247,8 +247,8 @@ static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR, {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR,
}; };
static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MAJOR[] = { static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MAJOR_LO[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR, {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR_LO,
}; };
static const esp_efuse_desc_t WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = { static const esp_efuse_desc_t WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = {
@@ -287,6 +287,10 @@ static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
{EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2, {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
}; };
static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MAJOR_HI[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR_HI,
};
static const esp_efuse_desc_t WR_DIS_LDO_VO1_DREF[] = { static const esp_efuse_desc_t WR_DIS_LDO_VO1_DREF[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of LDO_VO1_DREF, {EFUSE_BLK0, 20, 1}, // [] wr_dis of LDO_VO1_DREF,
}; };
@@ -892,8 +896,8 @@ static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
{EFUSE_BLK1, 64, 4}, // [] Minor chip version, {EFUSE_BLK1, 64, 4}, // [] Minor chip version,
}; };
static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = { static const esp_efuse_desc_t WAFER_VERSION_MAJOR_LO[] = {
{EFUSE_BLK1, 68, 2}, // [] Major chip version, {EFUSE_BLK1, 68, 2}, // [] Major chip version (lower 2 bits),
}; };
static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = { static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
@@ -928,6 +932,10 @@ static const esp_efuse_desc_t PKG_VERSION[] = {
{EFUSE_BLK1, 84, 3}, // [] Package version, {EFUSE_BLK1, 84, 3}, // [] Package version,
}; };
static const esp_efuse_desc_t WAFER_VERSION_MAJOR_HI[] = {
{EFUSE_BLK1, 87, 1}, // [] Major chip version (MSB),
};
static const esp_efuse_desc_t LDO_VO1_DREF[] = { static const esp_efuse_desc_t LDO_VO1_DREF[] = {
{EFUSE_BLK1, 88, 4}, // [] Output VO1 parameter, {EFUSE_BLK1, 88, 4}, // [] Output VO1 parameter,
}; };
@@ -1446,8 +1454,8 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[] = { const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR_LO[] = {
&WR_DIS_WAFER_VERSION_MAJOR[0], // [] wr_dis of WAFER_VERSION_MAJOR &WR_DIS_WAFER_VERSION_MAJOR_LO[0], // [] wr_dis of WAFER_VERSION_MAJOR_LO
NULL NULL
}; };
@@ -1496,6 +1504,11 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR_HI[] = {
&WR_DIS_WAFER_VERSION_MAJOR_HI[0], // [] wr_dis of WAFER_VERSION_MAJOR_HI
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_DREF[] = { const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_DREF[] = {
&WR_DIS_LDO_VO1_DREF[0], // [] wr_dis of LDO_VO1_DREF &WR_DIS_LDO_VO1_DREF[0], // [] wr_dis of LDO_VO1_DREF
NULL NULL
@@ -2251,8 +2264,8 @@ const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = { const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR_LO[] = {
&WAFER_VERSION_MAJOR[0], // [] Major chip version &WAFER_VERSION_MAJOR_LO[0], // [] Major chip version (lower 2 bits)
NULL NULL
}; };
@@ -2296,6 +2309,11 @@ const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR_HI[] = {
&WAFER_VERSION_MAJOR_HI[0], // [] Major chip version (MSB)
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_DREF[] = { const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_DREF[] = {
&LDO_VO1_DREF[0], // [] Output VO1 parameter &LDO_VO1_DREF[0], // [] Output VO1 parameter
NULL NULL

8
components/efuse/esp32p4/esp_efuse_table.csv
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@@ -9,7 +9,7 @@
# this will generate new source files, next rebuild all the sources. # this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! # # !!!!!!!!!!! #
# This file was generated by regtools.py based on the efuses.yaml file with the version: 73787d3f5ae45b80abca925a7562120b # This file was generated by regtools.py based on the efuses.yaml file with the version: f7765f0ac3faf4b54f8c1f064307522c
WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
@@ -69,7 +69,7 @@ WR_DIS.KM_HUK_GEN_STATE, EFUSE_BLK0, 19, 1, [] wr_dis
WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1 WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1
WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR
WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR WR_DIS.WAFER_VERSION_MAJOR_LO, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR_LO
WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR
@@ -79,6 +79,7 @@ WR_DIS.TEMP, EFUSE_BLK0, 20, 1, [] wr_dis
WR_DIS.PSRAM_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VENDOR WR_DIS.PSRAM_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VENDOR
WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION
WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2 WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
WR_DIS.WAFER_VERSION_MAJOR_HI, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR_HI
WR_DIS.LDO_VO1_DREF, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO1_DREF WR_DIS.LDO_VO1_DREF, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO1_DREF
WR_DIS.LDO_VO2_DREF, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO2_DREF WR_DIS.LDO_VO2_DREF, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO2_DREF
WR_DIS.LDO_VO1_MUL, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO1_MUL WR_DIS.LDO_VO1_MUL, EFUSE_BLK0, 20, 1, [] wr_dis of LDO_VO1_MUL
@@ -234,7 +235,7 @@ MAC, EFUSE_BLK1, 40, 8, [MAC_FACT
, EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address , EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address
, EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address , EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address
WAFER_VERSION_MINOR, EFUSE_BLK1, 64, 4, [] Minor chip version WAFER_VERSION_MINOR, EFUSE_BLK1, 64, 4, [] Minor chip version
WAFER_VERSION_MAJOR, EFUSE_BLK1, 68, 2, [] Major chip version WAFER_VERSION_MAJOR_LO, EFUSE_BLK1, 68, 2, [] Major chip version (lower 2 bits)
DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK1, 70, 1, [] Disables check of wafer version major DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK1, 70, 1, [] Disables check of wafer version major
DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK1, 71, 1, [] Disables check of blk version major DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK1, 71, 1, [] Disables check of blk version major
BLK_VERSION_MINOR, EFUSE_BLK1, 72, 3, [] BLK_VERSION_MINOR of BLOCK2 BLK_VERSION_MINOR, EFUSE_BLK1, 72, 3, [] BLK_VERSION_MINOR of BLOCK2
@@ -243,6 +244,7 @@ PSRAM_CAP, EFUSE_BLK1, 77, 3, [] PSRAM
TEMP, EFUSE_BLK1, 80, 2, [] Operating temperature of the ESP chip TEMP, EFUSE_BLK1, 80, 2, [] Operating temperature of the ESP chip
PSRAM_VENDOR, EFUSE_BLK1, 82, 2, [] PSRAM vendor PSRAM_VENDOR, EFUSE_BLK1, 82, 2, [] PSRAM vendor
PKG_VERSION, EFUSE_BLK1, 84, 3, [] Package version PKG_VERSION, EFUSE_BLK1, 84, 3, [] Package version
WAFER_VERSION_MAJOR_HI, EFUSE_BLK1, 87, 1, [] Major chip version (MSB)
LDO_VO1_DREF, EFUSE_BLK1, 88, 4, [] Output VO1 parameter LDO_VO1_DREF, EFUSE_BLK1, 88, 4, [] Output VO1 parameter
LDO_VO2_DREF, EFUSE_BLK1, 92, 4, [] Output VO2 parameter LDO_VO2_DREF, EFUSE_BLK1, 92, 4, [] Output VO2 parameter
LDO_VO1_MUL, EFUSE_BLK1, 96, 3, [] Output VO1 parameter LDO_VO1_MUL, EFUSE_BLK1, 96, 3, [] Output VO1 parameter
Can't render this file because it contains an unexpected character in line 8 and column 53.

10
components/efuse/esp32p4/include/esp_efuse_table.h
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -10,7 +10,7 @@ extern "C" {
#include "esp_efuse.h" #include "esp_efuse.h"
// md5_digest_table c56ed98dde7a08c8f70d57a01faba96a // md5_digest_table 665d4d3a1354653f8e46869d49df1a2f
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -82,7 +82,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[];
#define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC #define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR_LO[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_BLK_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_BLK_VERSION_MAJOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[];
@@ -92,6 +92,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PSRAM_VENDOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PSRAM_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR_HI[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_DREF[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_DREF[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO2_DREF[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO2_DREF[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_MUL[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LDO_VO1_MUL[];
@@ -266,7 +267,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_SWD[];
extern const esp_efuse_desc_t* ESP_EFUSE_MAC[]; extern const esp_efuse_desc_t* ESP_EFUSE_MAC[];
#define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC #define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC
extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR_LO[];
extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[];
@@ -275,6 +276,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_PSRAM_CAP[];
extern const esp_efuse_desc_t* ESP_EFUSE_TEMP[]; extern const esp_efuse_desc_t* ESP_EFUSE_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VENDOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[]; extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR_HI[];
extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_DREF[]; extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_DREF[];
extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO2_DREF[]; extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO2_DREF[];
extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_MUL[]; extern const esp_efuse_desc_t* ESP_EFUSE_LDO_VO1_MUL[];

2
components/hal/esp32p4/include/hal/efuse_ll.h
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@@ -58,7 +58,7 @@ __attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en
// use efuse_hal_get_major_chip_version() to get major chip version // use efuse_hal_get_major_chip_version() to get major chip version
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void) __attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void)
{ {
return EFUSE.rd_mac_sys_2.wafer_version_major; return (EFUSE.rd_mac_sys_2.wafer_version_major_hi << 2) | EFUSE.rd_mac_sys_2.wafer_version_major_lo;
} }
// use efuse_hal_get_minor_chip_version() to get minor chip version // use efuse_hal_get_minor_chip_version() to get minor chip version

26
components/soc/esp32p4/register/soc/efuse_reg.h
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@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -754,13 +754,13 @@ extern "C" {
#define EFUSE_WAFER_VERSION_MINOR_M (EFUSE_WAFER_VERSION_MINOR_V << EFUSE_WAFER_VERSION_MINOR_S) #define EFUSE_WAFER_VERSION_MINOR_M (EFUSE_WAFER_VERSION_MINOR_V << EFUSE_WAFER_VERSION_MINOR_S)
#define EFUSE_WAFER_VERSION_MINOR_V 0x0000000FU #define EFUSE_WAFER_VERSION_MINOR_V 0x0000000FU
#define EFUSE_WAFER_VERSION_MINOR_S 0 #define EFUSE_WAFER_VERSION_MINOR_S 0
/** EFUSE_WAFER_VERSION_MAJOR : R; bitpos: [5:4]; default: 0; /** EFUSE_WAFER_VERSION_MAJOR_LO : R; bitpos: [5:4]; default: 0;
* Major chip version * Major chip version (lower 2 bits)
*/ */
#define EFUSE_WAFER_VERSION_MAJOR 0x00000003U #define EFUSE_WAFER_VERSION_MAJOR_LO 0x00000003U
#define EFUSE_WAFER_VERSION_MAJOR_M (EFUSE_WAFER_VERSION_MAJOR_V << EFUSE_WAFER_VERSION_MAJOR_S) #define EFUSE_WAFER_VERSION_MAJOR_LO_M (EFUSE_WAFER_VERSION_MAJOR_LO_V << EFUSE_WAFER_VERSION_MAJOR_LO_S)
#define EFUSE_WAFER_VERSION_MAJOR_V 0x00000003U #define EFUSE_WAFER_VERSION_MAJOR_LO_V 0x00000003U
#define EFUSE_WAFER_VERSION_MAJOR_S 4 #define EFUSE_WAFER_VERSION_MAJOR_LO_S 4
/** EFUSE_DISABLE_WAFER_VERSION_MAJOR : R; bitpos: [6]; default: 0; /** EFUSE_DISABLE_WAFER_VERSION_MAJOR : R; bitpos: [6]; default: 0;
* Disables check of wafer version major * Disables check of wafer version major
*/ */
@@ -817,13 +817,13 @@ extern "C" {
#define EFUSE_PKG_VERSION_M (EFUSE_PKG_VERSION_V << EFUSE_PKG_VERSION_S) #define EFUSE_PKG_VERSION_M (EFUSE_PKG_VERSION_V << EFUSE_PKG_VERSION_S)
#define EFUSE_PKG_VERSION_V 0x00000007U #define EFUSE_PKG_VERSION_V 0x00000007U
#define EFUSE_PKG_VERSION_S 20 #define EFUSE_PKG_VERSION_S 20
/** EFUSE_RESERVED_1_87 : R; bitpos: [23]; default: 0; /** EFUSE_WAFER_VERSION_MAJOR_HI : R; bitpos: [23]; default: 0;
* reserved * Major chip version (MSB)
*/ */
#define EFUSE_RESERVED_1_87 (BIT(23)) #define EFUSE_WAFER_VERSION_MAJOR_HI (BIT(23))
#define EFUSE_RESERVED_1_87_M (EFUSE_RESERVED_1_87_V << EFUSE_RESERVED_1_87_S) #define EFUSE_WAFER_VERSION_MAJOR_HI_M (EFUSE_WAFER_VERSION_MAJOR_HI_V << EFUSE_WAFER_VERSION_MAJOR_HI_S)
#define EFUSE_RESERVED_1_87_V 0x00000001U #define EFUSE_WAFER_VERSION_MAJOR_HI_V 0x00000001U
#define EFUSE_RESERVED_1_87_S 23 #define EFUSE_WAFER_VERSION_MAJOR_HI_S 23
/** EFUSE_LDO_VO1_DREF : R; bitpos: [27:24]; default: 0; /** EFUSE_LDO_VO1_DREF : R; bitpos: [27:24]; default: 0;
* Output VO1 parameter * Output VO1 parameter
*/ */

14
components/soc/esp32p4/register/soc/efuse_struct.h
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@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -571,10 +571,10 @@ typedef union {
* Minor chip version * Minor chip version
*/ */
uint32_t wafer_version_minor:4; uint32_t wafer_version_minor:4;
/** wafer_version_major : R; bitpos: [5:4]; default: 0; /** wafer_version_major_lo : R; bitpos: [5:4]; default: 0;
* Major chip version * Major chip version (lower 2 bits)
*/ */
uint32_t wafer_version_major:2; uint32_t wafer_version_major_lo:2;
/** disable_wafer_version_major : R; bitpos: [6]; default: 0; /** disable_wafer_version_major : R; bitpos: [6]; default: 0;
* Disables check of wafer version major * Disables check of wafer version major
*/ */
@@ -607,10 +607,10 @@ typedef union {
* Package version * Package version
*/ */
uint32_t pkg_version:3; uint32_t pkg_version:3;
/** reserved_1_87 : R; bitpos: [23]; default: 0; /** wafer_version_major_hi : R; bitpos: [23]; default: 0;
* reserved * Major chip version (MSB)
*/ */
uint32_t reserved_1_87:1; uint32_t wafer_version_major_hi:1;
/** ldo_vo1_dref : R; bitpos: [27:24]; default: 0; /** ldo_vo1_dref : R; bitpos: [27:24]; default: 0;
* Output VO1 parameter * Output VO1 parameter
*/ */