diff --git a/components/soc/esp32c5/register/soc/ledc_reg.h b/components/soc/esp32c5/register/soc/ledc_reg.h index 6c9a0dea95..3806b8aa14 100644 --- a/components/soc/esp32c5/register/soc/ledc_reg.h +++ b/components/soc/esp32c5/register/soc/ledc_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -1731,38 +1731,38 @@ extern "C" { #define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S) #define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U #define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19 -/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0; +/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME0_CMP_EN (BIT(20)) -#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S) -#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME0_CMP_EN_S 20 -/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0; +#define LEDC_EVT_TIMER0_CMP_EN (BIT(20)) +#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S) +#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER0_CMP_EN_S 20 +/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME1_CMP_EN (BIT(21)) -#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S) -#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME1_CMP_EN_S 21 -/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0; +#define LEDC_EVT_TIMER1_CMP_EN (BIT(21)) +#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S) +#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER1_CMP_EN_S 21 +/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME2_CMP_EN (BIT(22)) -#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S) -#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME2_CMP_EN_S 22 -/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0; +#define LEDC_EVT_TIMER2_CMP_EN (BIT(22)) +#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S) +#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER2_CMP_EN_S 22 +/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME3_CMP_EN (BIT(23)) -#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S) -#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME3_CMP_EN_S 23 +#define LEDC_EVT_TIMER3_CMP_EN (BIT(23)) +#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S) +#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER3_CMP_EN_S 23 /** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0: * Disable\\1: Enable diff --git a/components/soc/esp32c5/register/soc/ledc_struct.h b/components/soc/esp32c5/register/soc/ledc_struct.h index a3eb2cbb0a..c101f1e073 100644 --- a/components/soc/esp32c5/register/soc/ledc_struct.h +++ b/components/soc/esp32c5/register/soc/ledc_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -249,26 +249,26 @@ typedef union { * Disable\\1: Enable */ uint32_t evt_time_ovf_timer3_en:1; - /** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0; + /** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time0_cmp_en:1; - /** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0; + uint32_t evt_timer0_cmp_en:1; + /** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time1_cmp_en:1; - /** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0; + uint32_t evt_timer1_cmp_en:1; + /** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time2_cmp_en:1; - /** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0; + uint32_t evt_timer2_cmp_en:1; + /** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time3_cmp_en:1; + uint32_t evt_timer3_cmp_en:1; /** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0: * Disable\\1: Enable diff --git a/components/soc/esp32c61/register/soc/ledc_reg.h b/components/soc/esp32c61/register/soc/ledc_reg.h index 6c9a0dea95..3806b8aa14 100644 --- a/components/soc/esp32c61/register/soc/ledc_reg.h +++ b/components/soc/esp32c61/register/soc/ledc_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -1731,38 +1731,38 @@ extern "C" { #define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S) #define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U #define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19 -/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0; +/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME0_CMP_EN (BIT(20)) -#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S) -#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME0_CMP_EN_S 20 -/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0; +#define LEDC_EVT_TIMER0_CMP_EN (BIT(20)) +#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S) +#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER0_CMP_EN_S 20 +/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME1_CMP_EN (BIT(21)) -#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S) -#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME1_CMP_EN_S 21 -/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0; +#define LEDC_EVT_TIMER1_CMP_EN (BIT(21)) +#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S) +#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER1_CMP_EN_S 21 +/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME2_CMP_EN (BIT(22)) -#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S) -#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME2_CMP_EN_S 22 -/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0; +#define LEDC_EVT_TIMER2_CMP_EN (BIT(22)) +#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S) +#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER2_CMP_EN_S 22 +/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME3_CMP_EN (BIT(23)) -#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S) -#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME3_CMP_EN_S 23 +#define LEDC_EVT_TIMER3_CMP_EN (BIT(23)) +#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S) +#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER3_CMP_EN_S 23 /** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0: * Disable\\1: Enable diff --git a/components/soc/esp32c61/register/soc/ledc_struct.h b/components/soc/esp32c61/register/soc/ledc_struct.h index c464bf1b91..9e667df288 100644 --- a/components/soc/esp32c61/register/soc/ledc_struct.h +++ b/components/soc/esp32c61/register/soc/ledc_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -249,26 +249,26 @@ typedef union { * Disable\\1: Enable */ uint32_t evt_time_ovf_timer3_en:1; - /** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0; + /** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time0_cmp_en:1; - /** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0; + uint32_t evt_timer0_cmp_en:1; + /** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time1_cmp_en:1; - /** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0; + uint32_t evt_timer1_cmp_en:1; + /** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time2_cmp_en:1; - /** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0; + uint32_t evt_timer2_cmp_en:1; + /** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1: * Enable */ - uint32_t evt_time3_cmp_en:1; + uint32_t evt_timer3_cmp_en:1; /** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0: * Disable\\1: Enable diff --git a/components/soc/esp32h21/register/soc/ledc_reg.h b/components/soc/esp32h21/register/soc/ledc_reg.h index a4f79cc8ea..adeebedec9 100644 --- a/components/soc/esp32h21/register/soc/ledc_reg.h +++ b/components/soc/esp32h21/register/soc/ledc_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -2135,34 +2135,34 @@ extern "C" { #define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S) #define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U #define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19 -/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0; +/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0; * Ledc timer0 compare event enable register, write 1 to enable this event. */ -#define LEDC_EVT_TIME0_CMP_EN (BIT(20)) -#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S) -#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME0_CMP_EN_S 20 -/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0; +#define LEDC_EVT_TIMER0_CMP_EN (BIT(20)) +#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S) +#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER0_CMP_EN_S 20 +/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0; * Ledc timer1 compare event enable register, write 1 to enable this event. */ -#define LEDC_EVT_TIME1_CMP_EN (BIT(21)) -#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S) -#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME1_CMP_EN_S 21 -/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0; +#define LEDC_EVT_TIMER1_CMP_EN (BIT(21)) +#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S) +#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER1_CMP_EN_S 21 +/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0; * Ledc timer2 compare event enable register, write 1 to enable this event. */ -#define LEDC_EVT_TIME2_CMP_EN (BIT(22)) -#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S) -#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME2_CMP_EN_S 22 -/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0; +#define LEDC_EVT_TIMER2_CMP_EN (BIT(22)) +#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S) +#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER2_CMP_EN_S 22 +/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0; * Ledc timer3 compare event enable register, write 1 to enable this event. */ -#define LEDC_EVT_TIME3_CMP_EN (BIT(23)) -#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S) -#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME3_CMP_EN_S 23 +#define LEDC_EVT_TIMER3_CMP_EN (BIT(23)) +#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S) +#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER3_CMP_EN_S 23 /** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0; * Ledc ch0 duty scale update task enable register, write 1 to enable this task. */ diff --git a/components/soc/esp32h21/register/soc/ledc_struct.h b/components/soc/esp32h21/register/soc/ledc_struct.h index 8cee1920d8..60d7229989 100644 --- a/components/soc/esp32h21/register/soc/ledc_struct.h +++ b/components/soc/esp32h21/register/soc/ledc_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -144,22 +144,22 @@ typedef union { * Ledc timer3 overflow event enable register, write 1 to enable this event. */ uint32_t evt_time_ovf_timer3_en:1; - /** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0; + /** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0; * Ledc timer0 compare event enable register, write 1 to enable this event. */ - uint32_t evt_time0_cmp_en:1; - /** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0; + uint32_t evt_timer0_cmp_en:1; + /** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0; * Ledc timer1 compare event enable register, write 1 to enable this event. */ - uint32_t evt_time1_cmp_en:1; - /** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0; + uint32_t evt_timer1_cmp_en:1; + /** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0; * Ledc timer2 compare event enable register, write 1 to enable this event. */ - uint32_t evt_time2_cmp_en:1; - /** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0; + uint32_t evt_timer2_cmp_en:1; + /** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0; * Ledc timer3 compare event enable register, write 1 to enable this event. */ - uint32_t evt_time3_cmp_en:1; + uint32_t evt_timer3_cmp_en:1; /** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0; * Ledc ch0 duty scale update task enable register, write 1 to enable this task. */ diff --git a/components/soc/esp32h4/register/soc/ledc_reg.h b/components/soc/esp32h4/register/soc/ledc_reg.h index ef28aa01c0..05993e8751 100644 --- a/components/soc/esp32h4/register/soc/ledc_reg.h +++ b/components/soc/esp32h4/register/soc/ledc_reg.h @@ -2219,42 +2219,42 @@ extern "C" { #define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S) #define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U #define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19 -/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0; +/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event. * 0: Disable * 1: Enable */ -#define LEDC_EVT_TIME0_CMP_EN (BIT(20)) -#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S) -#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME0_CMP_EN_S 20 -/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0; +#define LEDC_EVT_TIMER0_CMP_EN (BIT(20)) +#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S) +#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER0_CMP_EN_S 20 +/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event. * 0: Disable * 1: Enable */ -#define LEDC_EVT_TIME1_CMP_EN (BIT(21)) -#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S) -#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME1_CMP_EN_S 21 -/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0; +#define LEDC_EVT_TIMER1_CMP_EN (BIT(21)) +#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S) +#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER1_CMP_EN_S 21 +/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event. * 0: Disable * 1: Enable */ -#define LEDC_EVT_TIME2_CMP_EN (BIT(22)) -#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S) -#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME2_CMP_EN_S 22 -/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0; +#define LEDC_EVT_TIMER2_CMP_EN (BIT(22)) +#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S) +#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER2_CMP_EN_S 22 +/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event. * 0: Disable * 1: Enable */ -#define LEDC_EVT_TIME3_CMP_EN (BIT(23)) -#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S) -#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME3_CMP_EN_S 23 +#define LEDC_EVT_TIMER3_CMP_EN (BIT(23)) +#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S) +#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER3_CMP_EN_S 23 /** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task. * 0: Disable diff --git a/components/soc/esp32h4/register/soc/ledc_struct.h b/components/soc/esp32h4/register/soc/ledc_struct.h index e95bad9969..137be624ef 100644 --- a/components/soc/esp32h4/register/soc/ledc_struct.h +++ b/components/soc/esp32h4/register/soc/ledc_struct.h @@ -298,30 +298,30 @@ typedef union { * 1: Enable */ uint32_t evt_time_ovf_timer3_en:1; - /** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0; + /** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event. * 0: Disable * 1: Enable */ - uint32_t evt_time0_cmp_en:1; - /** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0; + uint32_t evt_timer0_cmp_en:1; + /** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event. * 0: Disable * 1: Enable */ - uint32_t evt_time1_cmp_en:1; - /** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0; + uint32_t evt_timer1_cmp_en:1; + /** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event. * 0: Disable * 1: Enable */ - uint32_t evt_time2_cmp_en:1; - /** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0; + uint32_t evt_timer2_cmp_en:1; + /** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event. * 0: Disable * 1: Enable */ - uint32_t evt_time3_cmp_en:1; + uint32_t evt_timer3_cmp_en:1; /** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task. * 0: Disable diff --git a/components/soc/esp32p4/register/soc/ledc_reg.h b/components/soc/esp32p4/register/soc/ledc_reg.h index bd9d80ad45..f55ddf989d 100644 --- a/components/soc/esp32p4/register/soc/ledc_reg.h +++ b/components/soc/esp32p4/register/soc/ledc_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -2163,38 +2163,38 @@ extern "C" { #define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S) #define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U #define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19 -/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0; +/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the ledc_timer0_cmp event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME0_CMP_EN (BIT(20)) -#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S) -#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME0_CMP_EN_S 20 -/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0; +#define LEDC_EVT_TIMER0_CMP_EN (BIT(20)) +#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S) +#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER0_CMP_EN_S 20 +/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the ledc_timer1_cmp event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME1_CMP_EN (BIT(21)) -#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S) -#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME1_CMP_EN_S 21 -/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0; +#define LEDC_EVT_TIMER1_CMP_EN (BIT(21)) +#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S) +#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER1_CMP_EN_S 21 +/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the ledc_timer2_cmp event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME2_CMP_EN (BIT(22)) -#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S) -#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME2_CMP_EN_S 22 -/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0; +#define LEDC_EVT_TIMER2_CMP_EN (BIT(22)) +#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S) +#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER2_CMP_EN_S 22 +/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the ledc_timer3_cmp event.\\0: Disable\\1: * Enable */ -#define LEDC_EVT_TIME3_CMP_EN (BIT(23)) -#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S) -#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U -#define LEDC_EVT_TIME3_CMP_EN_S 23 +#define LEDC_EVT_TIMER3_CMP_EN (BIT(23)) +#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S) +#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U +#define LEDC_EVT_TIMER3_CMP_EN_S 23 /** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the ledc_ch0_duty_scale_update task.\\0: * Disable\\1: Enable diff --git a/components/soc/esp32p4/register/soc/ledc_struct.h b/components/soc/esp32p4/register/soc/ledc_struct.h index 6f28cf3821..df2c5df873 100644 --- a/components/soc/esp32p4/register/soc/ledc_struct.h +++ b/components/soc/esp32p4/register/soc/ledc_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -703,26 +703,26 @@ typedef union { * Enable */ uint32_t evt_time_ovf_timer3_en:1; - /** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0; + /** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0; * Configures whether or not to enable the ledc_timer0_cmp event.\\0: Disable\\1: * Enable */ - uint32_t evt_time0_cmp_en:1; - /** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0; + uint32_t evt_timer0_cmp_en:1; + /** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0; * Configures whether or not to enable the ledc_timer1_cmp event.\\0: Disable\\1: * Enable */ - uint32_t evt_time1_cmp_en:1; - /** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0; + uint32_t evt_timer1_cmp_en:1; + /** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0; * Configures whether or not to enable the ledc_timer2_cmp event.\\0: Disable\\1: * Enable */ - uint32_t evt_time2_cmp_en:1; - /** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0; + uint32_t evt_timer2_cmp_en:1; + /** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0; * Configures whether or not to enable the ledc_timer3_cmp event.\\0: Disable\\1: * Enable */ - uint32_t evt_time3_cmp_en:1; + uint32_t evt_timer3_cmp_en:1; /** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0; * Configures whether or not to enable the ledc_ch0_duty_scale_update task.\\0: * Disable\\1: Enable diff --git a/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c b/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c index 0dbd6ab9d9..3502dca847 100644 --- a/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c +++ b/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -264,7 +264,7 @@ static void parse_rmc(esp_gps_t *esp_gps) } break; case 7: /* Process ground speed in unit m/s */ - esp_gps->parent.speed = strtof(esp_gps->item_str, NULL) * 1.852; + esp_gps->parent.speed = strtof(esp_gps->item_str, NULL) * 0.514444; break; case 8: /* Process true course over ground */ esp_gps->parent.cog = strtof(esp_gps->item_str, NULL); @@ -338,7 +338,7 @@ static void parse_vtg(esp_gps_t *esp_gps) esp_gps->parent.variation = strtof(esp_gps->item_str, NULL); break; case 5:/* Process ground speed in unit m/s */ - esp_gps->parent.speed = strtof(esp_gps->item_str, NULL) * 1.852;//knots to m/s + esp_gps->parent.speed = strtof(esp_gps->item_str, NULL) * 0.514444;//knots to m/s break; case 7:/* Process ground speed in unit m/s */ esp_gps->parent.speed = strtof(esp_gps->item_str, NULL) / 3.6;//km/h to m/s @@ -702,7 +702,7 @@ nmea_parser_handle_t nmea_parser_init(const nmea_parser_config_t *config) .task_name = NULL }; if (esp_event_loop_create(&loop_args, &esp_gps->event_loop_hdl) != ESP_OK) { - ESP_LOGE(GPS_TAG, "create event loop faild"); + ESP_LOGE(GPS_TAG, "create event loop failed"); goto err_eloop; } /* Create NMEA Parser task */ diff --git a/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c b/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c index bc7f138477..b8b57ec021 100644 --- a/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c +++ b/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c @@ -94,6 +94,7 @@ static void echo_task(void *arg) // Allocate buffers for UART uint8_t* data = (uint8_t*) malloc(BUF_SIZE); + assert(data); ESP_LOGI(TAG, "UART start receive loop.\r"); echo_send(uart_num, "Start RS485 UART test.\r\n", 24); diff --git a/examples/peripherals/uart/uart_events/main/uart_events_example_main.c b/examples/peripherals/uart/uart_events/main/uart_events_example_main.c index 19f8726a03..eefa9c7021 100644 --- a/examples/peripherals/uart/uart_events/main/uart_events_example_main.c +++ b/examples/peripherals/uart/uart_events/main/uart_events_example_main.c @@ -41,6 +41,7 @@ static void uart_event_task(void *pvParameters) uart_event_t event; size_t buffered_size; uint8_t* dtmp = (uint8_t*) malloc(RD_BUF_SIZE); + assert(dtmp); for (;;) { //Waiting for UART event. if (xQueueReceive(uart0_queue, (void *)&event, (TickType_t)portMAX_DELAY)) {