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fix(esp_hw_support): fix mspi clock freq changed after lightsleep

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This commit is contained in:
wuzhenghui
2024-12-12 11:02:52 +08:00
parent d0a157e723
commit d1475b5d72
3 changed files with 31 additions and 15 deletions
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13
components/esp_hw_support/sleep_modes.c
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@ -56,12 +56,17 @@
#include "hal/cache_hal.h" #include "hal/cache_hal.h"
#include "hal/cache_ll.h" #include "hal/cache_ll.h"
#include "hal/clk_tree_ll.h"
#include "hal/wdt_hal.h" #include "hal/wdt_hal.h"
#include "hal/uart_hal.h" #include "hal/uart_hal.h"
#if SOC_TOUCH_SENSOR_SUPPORTED #if SOC_TOUCH_SENSOR_SUPPORTED
#include "hal/touch_sensor_hal.h" #include "hal/touch_sensor_hal.h"
#endif #endif
#if __has_include("hal/mspi_timing_tuning_ll.h")
#include "hal/mspi_timing_tuning_ll.h"
#endif
#include "sdkconfig.h" #include "sdkconfig.h"
#include "esp_rom_uart.h" #include "esp_rom_uart.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
@ -72,7 +77,9 @@
#include "esp_private/esp_clk.h" #include "esp_private/esp_clk.h"
#include "esp_private/esp_task_wdt.h" #include "esp_private/esp_task_wdt.h"
#include "esp_private/sar_periph_ctrl.h" #include "esp_private/sar_periph_ctrl.h"
#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED
#include "esp_private/mspi_timing_tuning.h" #include "esp_private/mspi_timing_tuning.h"
#endif
#ifdef CONFIG_IDF_TARGET_ESP32 #ifdef CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/cache.h" #include "esp32/rom/cache.h"
@ -788,8 +795,10 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
} }
#endif #endif
#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED
// Will switch to XTAL turn down MSPI speed // Will switch to XTAL turn down MSPI speed
mspi_timing_change_speed_mode_cache_safe(true); mspi_timing_change_speed_mode_cache_safe(true);
#endif
#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
if (!deep_sleep && (pd_flags & PMU_SLEEP_PD_TOP)) { if (!deep_sleep && (pd_flags & PMU_SLEEP_PD_TOP)) {
@ -1071,8 +1080,8 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
misc_modules_wake_prepare(pd_flags); misc_modules_wake_prepare(pd_flags);
} }
#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING #if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED
if (cpu_freq_config.source == SOC_CPU_CLK_SRC_PLL) { if (cpu_freq_config.source_freq_mhz > clk_ll_xtal_load_freq_mhz()) {
// Turn up MSPI speed if switch to PLL // Turn up MSPI speed if switch to PLL
mspi_timing_change_speed_mode_cache_safe(false); mspi_timing_change_speed_mode_cache_safe(false);
} }

31
components/esp_pm/pm_impl.c
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@ -22,8 +22,14 @@
#include "esp_private/periph_ctrl.h" #include "esp_private/periph_ctrl.h"
#include "soc/rtc.h" #include "soc/rtc.h"
#include "hal/clk_tree_ll.h"
#include "hal/uart_ll.h" #include "hal/uart_ll.h"
#include "hal/uart_types.h" #include "hal/uart_types.h"
#if __has_include("hal/mspi_timing_tuning_ll.h")
#include "hal/mspi_timing_tuning_ll.h"
#endif
#include "driver/gpio.h" #include "driver/gpio.h"
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
@ -33,10 +39,6 @@
#include "xtensa/core-macros.h" #include "xtensa/core-macros.h"
#endif #endif
#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING
#include "esp_private/mspi_timing_tuning.h"
#endif
#include "esp_private/pm_impl.h" #include "esp_private/pm_impl.h"
#include "esp_private/pm_trace.h" #include "esp_private/pm_trace.h"
#include "esp_private/esp_timer_private.h" #include "esp_private/esp_timer_private.h"
@ -45,6 +47,9 @@
#include "esp_private/sleep_gpio.h" #include "esp_private/sleep_gpio.h"
#include "esp_private/sleep_modem.h" #include "esp_private/sleep_modem.h"
#include "esp_private/uart_share_hw_ctrl.h" #include "esp_private/uart_share_hw_ctrl.h"
#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED
#include "esp_private/mspi_timing_tuning.h"
#endif
#include "esp_sleep.h" #include "esp_sleep.h"
#include "esp_memory_utils.h" #include "esp_memory_utils.h"
@ -663,16 +668,16 @@ static void IRAM_ATTR do_switch(pm_mode_t new_mode)
if (switch_down) { if (switch_down) {
on_freq_update(old_ticks_per_us, new_ticks_per_us); on_freq_update(old_ticks_per_us, new_ticks_per_us);
} }
#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING #if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED
if (new_config.source == SOC_CPU_CLK_SRC_PLL) { if (new_config.source_freq_mhz > clk_ll_xtal_load_freq_mhz()) {
rtc_clk_cpu_freq_set_config_fast(&new_config); rtc_clk_cpu_freq_set_config_fast(&new_config);
mspi_timing_change_speed_mode_cache_safe(false); mspi_timing_change_speed_mode_cache_safe(false);
} else { } else {
mspi_timing_change_speed_mode_cache_safe(true); mspi_timing_change_speed_mode_cache_safe(true);
rtc_clk_cpu_freq_set_config_fast(&new_config); rtc_clk_cpu_freq_set_config_fast(&new_config);
} }
#else #else
rtc_clk_cpu_freq_set_config_fast(&new_config); rtc_clk_cpu_freq_set_config_fast(&new_config);
#endif #endif
if (!switch_down) { if (!switch_down) {
on_freq_update(old_ticks_per_us, new_ticks_per_us); on_freq_update(old_ticks_per_us, new_ticks_per_us);

2
components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h
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@ -37,6 +37,8 @@ extern "C" {
#define MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT 80 #define MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT 80
#define MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED 1
typedef enum { typedef enum {
MSPI_TIMING_LL_FLASH_OPI_MODE = BIT(0), MSPI_TIMING_LL_FLASH_OPI_MODE = BIT(0),
MSPI_TIMING_LL_FLASH_QIO_MODE = BIT(1), MSPI_TIMING_LL_FLASH_QIO_MODE = BIT(1),