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https://github.com/espressif/esp-idf.git
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feat(ble): support for putting ble code into flash on ESP32-H2
(cherry picked from commit 5a9acdc379
)
Co-authored-by: zwl <zhaoweiliang@espressif.com>
This commit is contained in:
@@ -698,3 +698,11 @@ config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
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Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
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Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
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This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
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This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
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If disabled, only basic checks are applied, improving compatibility.
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If disabled, only basic checks are applied, improving compatibility.
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config BT_CTRL_RUN_IN_FLASH_ONLY
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bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
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default n
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help
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Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
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Because the code is moved to the flash, the execution speed of the code is reduced.
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To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).
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@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@@ -125,6 +125,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
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extern void r_ble_rtc_wake_up_state_clr(void);
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extern void r_ble_rtc_wake_up_state_clr(void);
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extern int os_msys_init(void);
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extern int os_msys_init(void);
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extern void os_msys_deinit(void);
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extern void os_msys_deinit(void);
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#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
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extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
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extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
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#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
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extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
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extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
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extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
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@@ -495,8 +499,11 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
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void *arg, void **ret_handle_in)
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void *arg, void **ret_handle_in)
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{
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{
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int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
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#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
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arg, (intr_handle_t *)ret_handle_in);
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int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
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#else
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int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
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#endif
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return rc;
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return rc;
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}
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}
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@@ -1020,7 +1027,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
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#if CONFIG_SW_COEXIST_ENABLE
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#if CONFIG_SW_COEXIST_ENABLE
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coex_enable();
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coex_enable();
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#endif // CONFIG_SW_COEXIST_ENABLE
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#endif // CONFIG_SW_COEXIST_ENABLE
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#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
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r_ble_ll_scan_start_time_init_compensation(500);
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r_priv_sdk_config_insert_proc_time_set(500);
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#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
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if (r_ble_controller_enable(mode) != 0) {
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if (r_ble_controller_enable(mode) != 0) {
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ret = ESP_FAIL;
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ret = ESP_FAIL;
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goto error;
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goto error;
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