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https://github.com/espressif/esp-idf.git
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fix(freertos): Incorrect assert in FreeRTOS port layer when not in ISR context
This commit fixes an issue where in the FreeRTOS port layer would cause the portASSERT_IF_IN_ISR() assert check to fail even when the system is not in an interrupt context.
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@@ -113,6 +113,13 @@ typedef spinlock_t portMUX_TYPE; /**< Spi
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BaseType_t xPortCheckIfInISR(void);
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/**
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* @brief Assert if in ISR context
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*
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* - Asserts on xPortCheckIfInISR() internally
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*/
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void vPortAssertIfInISR(void);
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// ------------------ Critical Sections --------------------
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#if ( configNUMBER_OF_CORES > 1 )
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@@ -187,6 +194,15 @@ void vPortTCBPreDeleteHook( void *pxTCB );
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask(1)
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#define portRESTORE_INTERRUPTS(x) vPortClearInterruptMask(x)
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/**
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* @brief Assert if in ISR context
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*
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* TODO: Enable once ISR safe version of vTaskEnter/ExitCritical() is implemented
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* for single-core SMP FreeRTOS Kernel. (IDF-10540)
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*/
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// #define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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// ------------------ Critical Sections --------------------
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#if ( configNUMBER_OF_CORES > 1 )
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@@ -168,6 +168,12 @@ BaseType_t xPortCheckIfInISR(void)
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return uxInterruptNesting;
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}
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void vPortAssertIfInISR(void)
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{
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/* Assert if the interrupt nesting count is > 0 */
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configASSERT(xPortCheckIfInISR() == 0);
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}
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// ------------------ Critical Sections --------------------
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#if ( configNUMBER_OF_CORES > 1 )
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@@ -373,7 +379,7 @@ FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackTLS(UBaseType_t uxStackPointer, u
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
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{
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__asm__ volatile(".cfi_undefined ra"); // tell to debugger that it's outermost (inital) frame
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__asm__ volatile(".cfi_undefined ra"); // tell to debugger that it's outermost (initial) frame
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extern void __attribute__((noreturn)) panic_abort(const char *details);
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static char DRAM_ATTR msg[80] = "FreeRTOS: FreeRTOS Task \"\0";
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pxCode(pvParameters);
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@@ -440,7 +446,7 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
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HIGH ADDRESS
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|---------------------------| <- pxTopOfStack on entry
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| TLS Variables |
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| ------------------------- | <- Start of useable stack
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| ------------------------- | <- Start of usable stack
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| Starting stack frame |
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| ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
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| | |
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@@ -95,6 +95,13 @@ typedef spinlock_t portMUX_TYPE; /**< Spi
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BaseType_t xPortCheckIfInISR(void);
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/**
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* @brief Assert if in ISR context
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*
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* - Asserts on xPortCheckIfInISR() internally
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*/
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void vPortAssertIfInISR(void);
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// ------------------ Critical Sections --------------------
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UBaseType_t uxPortEnterCriticalFromISR( void );
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@@ -161,6 +168,14 @@ void vPortTCBPreDeleteHook( void *pxTCB );
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#define portSET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK()
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#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
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/**
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* @brief Assert if in ISR context
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*
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* TODO: Enable once ISR safe version of vTaskEnter/ExitCritical() is implemented
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* for single-core SMP FreeRTOS Kernel. (IDF-10540)
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*/
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// #define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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/*
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Note: XTOS_RESTORE_INTLEVEL() will overwrite entire PS register on XEA2. So we need to set the value of the INTLEVEL field ourselves
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*/
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@@ -139,7 +139,7 @@ BaseType_t xPortEnterCriticalTimeout(portMUX_TYPE *lock, BaseType_t timeout)
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void vPortExitCriticalIDF(portMUX_TYPE *lock)
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{
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/* This function may be called in a nested manner. Therefore, we only need
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* to reenable interrupts if this is the last call to exit the critical. We
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* to re-enable interrupts if this is the last call to exit the critical. We
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* can use the nesting count to determine whether this is the last exit call.
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*/
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spinlock_release(lock);
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@@ -204,6 +204,12 @@ BaseType_t xPortCheckIfInISR(void)
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return ret;
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}
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void vPortAssertIfInISR(void)
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{
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/* Assert if the interrupt nesting count is > 0 */
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configASSERT(xPortCheckIfInISR() == 0);
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}
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// ------------------ Critical Sections --------------------
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#if ( configNUMBER_OF_CORES > 1 )
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@@ -614,7 +620,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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| Coproc Save Area | (CPSA MUST BE FIRST)
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| ------------------------- |
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| TLS Variables |
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| ------------------------- | <- Start of useable stack
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| ------------------------- | <- Start of usable stack
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| Starting stack frame |
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| ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
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| | |
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