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Merge branch 'esp32p4/add_hmac_ds_support' into 'master'
esp32p4/add hmac ds support Closes IDF-7543 and IDF-6518 See merge request espressif/esp-idf!25148
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@@ -48,6 +48,9 @@
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#include "esp32h2/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32P4
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#include "esp32p4/rom/digital_signature.h"
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#endif
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struct esp_ds_context {
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const ets_ds_data_t *data;
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@@ -27,7 +27,7 @@
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#if defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32S2)
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#define JTAG_STATUS_BIT ESP_EFUSE_HARD_DIS_JTAG
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#else
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/* For ESP32C3, ESP32C6, ESP32H2 */
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/* For ESP32C3, ESP32C6, ESP32H2, ESP32P4 */
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#define JTAG_STATUS_BIT ESP_EFUSE_DIS_PAD_JTAG
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#endif
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static const char *TAG = "esp_hmac";
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -34,6 +34,11 @@
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#include "esp32h2/rom/digital_signature.h"
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#include "esp32h2/rom/aes.h"
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#include "esp32h2/rom/sha.h"
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#elif CONFIG_IDF_TARGET_ESP32P4
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#include "esp32p4/rom/efuse.h"
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#include "esp32p4/rom/digital_signature.h"
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#include "esp32p4/rom/aes.h"
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#include "esp32p4/rom/sha.h"
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#endif
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#include "esp_ds.h"
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@@ -375,7 +380,7 @@ TEST_CASE("Digital Signature Blocking Operation (FPGA only)", "[hw_crypto] [ds]"
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ds_r = esp_ds_finish_sign(signature, esp_ds_ctx);
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TEST_ASSERT_EQUAL(ESP_OK, ds_r);
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#elif CONFIG_IDF_TARGET_ESP32C3
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#else
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esp_err_t ds_r = esp_ds_sign(test_messages[0],
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&ds_data,
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t->hmac_key_idx + 1,
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+4
-3
@@ -1,5 +1,5 @@
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#!/usr/bin/env python3
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# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: Apache-2.0
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import argparse
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@@ -16,12 +16,13 @@ from cryptography.hazmat.primitives.asymmetric.rsa import _modinv as modinv # t
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from cryptography.hazmat.primitives.ciphers import Cipher, algorithms, modes
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from cryptography.utils import int_to_bytes
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supported_targets = {'esp32s2', 'esp32c3', 'esp32s3', 'esp32c6', 'esp32h2'}
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supported_targets = {'esp32s2', 'esp32c3', 'esp32s3', 'esp32c6', 'esp32h2', 'esp32p4'}
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supported_key_size = {'esp32s2':[4096, 3072, 2048, 1024],
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'esp32c3':[3072, 2048, 1024],
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'esp32s3':[4096, 3072, 2048, 1024],
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'esp32c6':[3072, 2048, 1024],
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'esp32h2':[3072, 2048, 1024]}
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'esp32h2':[3072, 2048, 1024],
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'esp32p4':[4096, 3072, 2048, 1024]}
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NUM_HMAC_KEYS = 3
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NUM_MESSAGES = 10
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+7
-2
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -34,6 +34,11 @@
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#include "esp32h2/rom/digital_signature.h"
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#include "esp32h2/rom/aes.h"
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#include "esp32h2/rom/sha.h"
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#elif CONFIG_IDF_TARGET_ESP32P4
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#include "esp32p4/rom/efuse.h"
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#include "esp32p4/rom/digital_signature.h"
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#include "esp32p4/rom/aes.h"
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#include "esp32p4/rom/sha.h"
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#endif
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#include "esp_ds.h"
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@@ -375,7 +380,7 @@ TEST_CASE("Digital Signature Blocking Operation (FPGA only)", "[hw_crypto] [ds]"
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ds_r = esp_ds_finish_sign(signature, esp_ds_ctx);
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TEST_ASSERT_EQUAL(ESP_OK, ds_r);
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#elif CONFIG_IDF_TARGET_ESP32C3
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#else
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esp_err_t ds_r = esp_ds_sign(test_messages[0],
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&ds_data,
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t->hmac_key_idx + 1,
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