diff --git a/components/esp_eth/include/esp_eth_driver.h b/components/esp_eth/include/esp_eth_driver.h
index f6f358f015..068a911dfb 100644
--- a/components/esp_eth/include/esp_eth_driver.h
+++ b/components/esp_eth/include/esp_eth_driver.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -121,6 +121,15 @@ typedef struct {
     esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
 } esp_eth_config_t;
 
+/**
+ * @brief Data structure to Read/Write PHY register via ioctl API
+ *
+ */
+typedef struct {
+    uint32_t reg_addr;              /*!< PHY register address */
+    uint32_t *reg_value_p;          /*!< Pointer to a memory where the register value is read/written */
+} esp_eth_phy_reg_rw_data_t;
+
 /**
 * @brief Command list for ioctl API
 *
@@ -139,6 +148,8 @@ typedef enum {
     ETH_CMD_G_DUPLEX_MODE,            /*!< Get Duplex mode */
     ETH_CMD_S_DUPLEX_MODE,            /*!< Set Duplex mode */
     ETH_CMD_S_PHY_LOOPBACK,           /*!< Set PHY loopback */
+    ETH_CMD_READ_PHY_REG,             /*!< Read PHY register */
+    ETH_CMD_WRITE_PHY_REG,            /*!< Write PHY register */
 
     ETH_CMD_CUSTOM_MAC_CMDS = 0x0FFF, // Offset for start of MAC custom commands
     ETH_CMD_CUSTOM_PHY_CMDS = 0x1FFF, // Offset for start of PHY custom commands
diff --git a/components/esp_eth/include/esp_eth_phy_802_3.h b/components/esp_eth/include/esp_eth_phy_802_3.h
index 9b808044c8..5eabdba53d 100644
--- a/components/esp_eth/include/esp_eth_phy_802_3.h
+++ b/components/esp_eth/include/esp_eth_phy_802_3.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,6 +28,144 @@ typedef struct {
     int reset_gpio_num;             /*!< Reset GPIO number, -1 means no hardware reset */
 } phy_802_3_t;
 
+/**
+ * @brief Set Ethernet mediator
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param eth Ethernet mediator pointer
+ * @return
+ *      - ESP_OK: Ethermet mediator set successfuly
+ *      - ESP_ERR_INVALID_ARG: if @c eth is @c NULL
+ */
+esp_err_t esp_eth_phy_802_3_set_mediator(phy_802_3_t *phy_802_3, esp_eth_mediator_t *eth);
+
+/**
+ * @brief Reset PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY reset successfuly
+ *      - ESP_FAIL: reset Ethernet PHY failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_reset(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Control autonegotiation mode of Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param cmd autonegotiation command enumeration
+ * @param[out] autonego_en_stat autonegotiation enabled flag
+ * @return
+ *      - ESP_OK: Ethernet PHY autonegotiation configured successfuly
+ *      - ESP_FAIL: Ethernet PHY autonegotiation configuration fail because some error occured
+ *      - ESP_ERR_INVALID_ARG: invalid value of @c cmd
+ */
+esp_err_t esp_eth_phy_802_3_autonego_ctrl(phy_802_3_t *phy_802_3, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat);
+
+/**
+ * @brief Power control of Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param enable set true to power ON Ethernet PHY; set false to power OFF Ethernet PHY
+ * @return
+ *      - ESP_OK: Ethernet PHY power down mode set successfuly
+ *      - ESP_FAIL: Ethernet PHY power up or power down failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_pwrctl(phy_802_3_t *phy_802_3, bool enable);
+
+/**
+ * @brief Set Ethernet PHY address
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param addr new PHY address
+ * @return
+ *      - ESP_OK: Ethernet PHY address set
+ */
+esp_err_t esp_eth_phy_802_3_set_addr(phy_802_3_t *phy_802_3, uint32_t addr);
+
+/**
+ * @brief Get Ethernet PHY address
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param[out] addr Ethernet PHY address
+ * @return
+ *      - ESP_OK: Ethernet PHY address read successfuly
+ *      - ESP_ERR_INVALID_ARG: @c addr pointer is @c NULL
+ */
+esp_err_t esp_eth_phy_802_3_get_addr(phy_802_3_t *phy_802_3, uint32_t *addr);
+
+/**
+ * @brief Advertise pause function ability
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param ability enable or disable pause ability
+ * @return
+ *      - ESP_OK: pause ability set successfuly
+ *      - ESP_FAIL: Advertise pause function ability failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_advertise_pause_ability(phy_802_3_t *phy_802_3, uint32_t ability);
+
+/**
+ * @brief Set Ethernet PHY loopback mode
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param enable set true to enable loopback; set false to disable loopback
+ * @return
+ *      - ESP_OK: Ethernet PHY loopback mode set successfuly
+ *      - ESP_FAIL: Ethernet PHY loopback configuration failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_loopback(phy_802_3_t *phy_802_3, bool enable);
+
+/**
+ * @brief Set Ethernet PHY speed
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param speed new speed of Ethernet PHY link
+ * @return
+ *      - ESP_OK: Ethernet PHY speed set successfuly
+ *      - ESP_FAIL: Set Ethernet PHY speed failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_set_speed(phy_802_3_t *phy_802_3, eth_speed_t speed);
+
+/**
+ * @brief Set Ethernet PHY duplex mode
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @param duplex new duplex mode for Ethernet PHY link
+ * @return
+ *      - ESP_OK: Ethernet PHY duplex mode set successfuly
+ *      - ESP_ERR_INVALID_STATE: unable to set duplex mode to Half if loopback is enabled
+ *      - ESP_FAIL: Set Ethernet PHY duplex mode failed because some error occured
+ */
+esp_err_t esp_eth_phy_802_3_set_duplex(phy_802_3_t *phy_802_3, eth_duplex_t duplex);
+
+/**
+ * @brief Initialize Ethernet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY initialized successfuly
+ */
+esp_err_t esp_eth_phy_802_3_init(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Power off Eternet PHY
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethernet PHY powered off successfuly
+ */
+esp_err_t esp_eth_phy_802_3_deinit(phy_802_3_t *phy_802_3);
+
+/**
+ * @brief Delete Ethernet PHY infostructure
+ *
+ * @param phy_802_3 IEEE 802.3 PHY object infostructure
+ * @return
+ *      - ESP_OK: Ethrnet PHY infostructure deleted
+ */
+esp_err_t esp_eth_phy_802_3_del(phy_802_3_t *phy_802_3);
+
 /**
  * @brief Performs hardware reset with specific reset pin assertion time
  *
@@ -116,7 +254,10 @@ esp_err_t esp_eth_phy_802_3_read_manufac_info(phy_802_3_t *phy_802_3, uint8_t *m
  * @return phy_802_3_t*
  *      - address to parent IEEE 802.3 PHY object infostructure
  */
-phy_802_3_t *esp_eth_phy_into_phy_802_3(esp_eth_phy_t *phy);
+inline __attribute__((always_inline)) phy_802_3_t *esp_eth_phy_into_phy_802_3(esp_eth_phy_t *phy)
+{
+    return __containerof(phy, phy_802_3_t, parent);
+}
 
 /**
  * @brief Initializes configuration of parent IEEE 802.3 PHY object infostructure
diff --git a/components/esp_eth/include/eth_phy_802_3_regs.h b/components/esp_eth/include/eth_phy_802_3_regs.h
index d953ea09d0..bdecddf0c4 100644
--- a/components/esp_eth/include/eth_phy_802_3_regs.h
+++ b/components/esp_eth/include/eth_phy_802_3_regs.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/esp_eth/src/esp_eth.c b/components/esp_eth/src/esp_eth.c
index 90cc8a229f..53f2888ace 100644
--- a/components/esp_eth/src/esp_eth.c
+++ b/components/esp_eth/src/esp_eth.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -466,7 +466,26 @@ esp_err_t esp_eth_ioctl(esp_eth_handle_t hdl, esp_eth_io_cmd_t cmd, void *data)
     case ETH_CMD_S_PHY_LOOPBACK:
         ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "can't set loopback to null");
         ESP_GOTO_ON_ERROR(phy->loopback(phy, *(bool *)data), err, TAG, "configuration of phy loopback mode failed");
-
+        break;
+    case ETH_CMD_READ_PHY_REG: {
+            uint32_t phy_addr;
+            ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "invalid register read/write info");
+            esp_eth_phy_reg_rw_data_t *phy_r_data = (esp_eth_phy_reg_rw_data_t *)data;
+            ESP_GOTO_ON_FALSE(phy_r_data->reg_value_p, ESP_ERR_INVALID_ARG, err, TAG, "can't read registers to null");
+            ESP_GOTO_ON_ERROR(phy->get_addr(phy, &phy_addr), err, TAG, "get phy address failed");
+            ESP_GOTO_ON_ERROR(eth_driver->mediator.phy_reg_read(&eth_driver->mediator,
+                            phy_addr, phy_r_data->reg_addr, phy_r_data->reg_value_p), err, TAG, "failed to read PHY register");
+        }
+        break;
+    case ETH_CMD_WRITE_PHY_REG: {
+            uint32_t phy_addr;
+            ESP_GOTO_ON_FALSE(data, ESP_ERR_INVALID_ARG, err, TAG, "invalid register read/write info");
+            esp_eth_phy_reg_rw_data_t *phy_w_data = (esp_eth_phy_reg_rw_data_t *)data;
+            ESP_GOTO_ON_FALSE(phy_w_data->reg_value_p, ESP_ERR_INVALID_ARG, err, TAG, "can't write registers from null");
+            ESP_GOTO_ON_ERROR(phy->get_addr(phy, &phy_addr), err, TAG, "get phy address failed");
+            ESP_GOTO_ON_ERROR(eth_driver->mediator.phy_reg_write(&eth_driver->mediator,
+                            phy_addr, phy_w_data->reg_addr, *(phy_w_data->reg_value_p)), err, TAG, "failed to write PHY register");
+        }
         break;
     default:
         if (phy->custom_ioctl != NULL && cmd >= ETH_CMD_CUSTOM_PHY_CMDS) {
diff --git a/components/esp_eth/src/esp_eth_mac_esp.c b/components/esp_eth/src/esp_eth_mac_esp.c
index a1dd3c157f..e9d20d1ef0 100644
--- a/components/esp_eth/src/esp_eth_mac_esp.c
+++ b/components/esp_eth/src/esp_eth_mac_esp.c
@@ -628,7 +628,6 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_esp32_emac_config_t *esp32_config
     emac->smi_mdio_gpio_num = esp32_config->smi_mdio_gpio_num;
     emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
     emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
-    emac->use_apll = false;
     emac->parent.set_mediator = emac_esp32_set_mediator;
     emac->parent.init = emac_esp32_init;
     emac->parent.deinit = emac_esp32_deinit;
diff --git a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
index b6aea4df90..f19600a59e 100644
--- a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
+++ b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: MIT
  *
- * SPDX-FileContributor: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2021-2023 Espressif Systems (Shanghai) CO LTD
  */
 
 #include <string.h>
@@ -226,7 +226,7 @@ static esp_err_t init_set_defaults(emac_ksz8851snl_t *emac)
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDTTR, RXDTTR_INIT_VALUE), err, TAG, "RXDTTR write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDBCTR, RXDBCTR_INIT_VALUE), err, TAG, "RXDBCTR write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR1,
-                                       RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME), err, TAG, "RXCR1 write failed");
+                                       RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXMAFMA | RXCR1_RXAE), err, TAG, "RXCR1 write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR2,
                                        (4 << RXCR2_SRDBL_SHIFT) | RXCR2_IUFFP | RXCR2_RXIUFCEZ | RXCR2_UDPLFE | RXCR2_RXICMPFCC), err, TAG, "RXCR2 write failed");
     ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXQCR, RXQCR_RXFCTE | RXQCR_ADRFE), err, TAG, "RXQCR write failed");
@@ -599,13 +599,13 @@ static esp_err_t emac_ksz8851_set_promiscuous(esp_eth_mac_t *mac, bool enable)
     if (enable) {
         // NOTE(v.chistyakov): set promiscuous mode
         ESP_LOGD(TAG, "setting promiscuous mode");
-        rxcr1 |= RXCR1_RXINVF | RXCR1_RXAE;
+        rxcr1 |= RXCR1_RXAE | RXCR1_RXINVF;
         rxcr1 &= ~(RXCR1_RXPAFMA | RXCR1_RXMAFMA);
     } else {
         // NOTE(v.chistyakov): set hash perfect (default)
-        ESP_LOGD(TAG, "setting hash perfect mode");
-        rxcr1 |= RXCR1_RXPAFMA;
-        rxcr1 &= ~(RXCR1_RXINVF | RXCR1_RXAE | RXCR1_RXMAFMA);
+        ESP_LOGD(TAG, "setting perfect with multicast passed");
+        rxcr1 |= RXCR1_RXAE| RXCR1_RXPAFMA | RXCR1_RXMAFMA;
+        rxcr1 &= ~RXCR1_RXINVF;
     }
     ESP_GOTO_ON_ERROR(ksz8851_write_reg(emac, KSZ8851_RXCR1, rxcr1), err, TAG, "RXCR1 write failed");
 err:
diff --git a/components/esp_eth/src/esp_eth_phy_802_3.c b/components/esp_eth/src/esp_eth_phy_802_3.c
index b9725ae337..d8db761433 100644
--- a/components/esp_eth/src/esp_eth_phy_802_3.c
+++ b/components/esp_eth/src/esp_eth_phy_802_3.c
@@ -16,12 +16,98 @@
 #include "esp_rom_sys.h"
 #include "esp_eth_phy_802_3.h"
 
+// Default reset assertion time is selected to be 100us as it is most commonly used value among PHY chips.
+#define PHY_RESET_ASSERTION_TIME_US 100
+
 static const char *TAG = "eth_phy_802_3";
 
-static esp_err_t eth_phy_802_3_set_mediator(esp_eth_phy_t *phy, esp_eth_mediator_t *eth)
+static esp_err_t set_mediator(esp_eth_phy_t *phy, esp_eth_mediator_t *eth)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_set_mediator(phy_802_3, eth);
+}
+
+static esp_err_t reset(esp_eth_phy_t *phy)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_reset(phy_802_3);
+}
+
+static esp_err_t reset_hw_default(esp_eth_phy_t *phy)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_reset_hw(phy_802_3, PHY_RESET_ASSERTION_TIME_US);
+}
+
+static esp_err_t autonego_ctrl(esp_eth_phy_t *phy, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_autonego_ctrl(phy_802_3, cmd, autonego_en_stat);
+}
+
+static esp_err_t pwrctl(esp_eth_phy_t *phy, bool enable)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_pwrctl(phy_802_3, enable);
+}
+
+static esp_err_t set_addr(esp_eth_phy_t *phy, uint32_t addr)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_set_addr(phy_802_3, addr);
+}
+
+static esp_err_t get_addr(esp_eth_phy_t *phy, uint32_t *addr)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_get_addr(phy_802_3, addr);
+}
+
+static esp_err_t advertise_pause_ability(esp_eth_phy_t *phy, uint32_t ability)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_advertise_pause_ability(phy_802_3, ability);
+}
+
+static esp_err_t loopback(esp_eth_phy_t *phy, bool enable)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_loopback(phy_802_3, enable);
+}
+
+static esp_err_t set_speed(esp_eth_phy_t *phy, eth_speed_t speed)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_set_speed(phy_802_3, speed);
+}
+
+static esp_err_t set_duplex(esp_eth_phy_t *phy, eth_duplex_t duplex)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_set_duplex(phy_802_3, duplex);
+}
+
+static esp_err_t init(esp_eth_phy_t *phy)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_init(phy_802_3);
+}
+
+static esp_err_t deinit(esp_eth_phy_t *phy)
+{
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    return esp_eth_phy_802_3_deinit(phy_802_3);
+}
+
+static esp_err_t del(esp_eth_phy_t *phy)
+{
+    free(phy);
+    return ESP_OK;
+}
+
+esp_err_t esp_eth_phy_802_3_set_mediator(phy_802_3_t *phy_802_3, esp_eth_mediator_t *eth)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     ESP_GOTO_ON_FALSE(eth, ESP_ERR_INVALID_ARG, err, TAG, "mediator can't be null");
     phy_802_3->eth = eth;
     return ESP_OK;
@@ -29,10 +115,9 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_reset(esp_eth_phy_t *phy)
+esp_err_t esp_eth_phy_802_3_reset(phy_802_3_t *phy_802_3)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     phy_802_3->link_status = ETH_LINK_DOWN;
     esp_eth_mediator_t *eth = phy_802_3->eth;
     bmcr_reg_t bmcr = {.reset = 1};
@@ -62,16 +147,14 @@ err:
  * @return
  *         - ESP_OK on success
  */
-static esp_err_t eth_phy_802_3_reset_hw_default(esp_eth_phy_t *phy)
+esp_err_t esp_eth_phy_802_3_reset_hw_default(phy_802_3_t *phy_802_3)
 {
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
-    return esp_eth_phy_802_3_reset_hw(phy_802_3, 100);
+    return esp_eth_phy_802_3_reset_hw(phy_802_3, PHY_RESET_ASSERTION_TIME_US);
 }
 
-static esp_err_t eth_phy_802_3_autonego_ctrl(esp_eth_phy_t *phy, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
+esp_err_t esp_eth_phy_802_3_autonego_ctrl(phy_802_3_t *phy_802_3, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
 
     bmcr_reg_t bmcr;
@@ -131,10 +214,9 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_pwrctl(esp_eth_phy_t *phy, bool enable)
+esp_err_t esp_eth_phy_802_3_pwrctl(phy_802_3_t *phy_802_3, bool enable)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
     bmcr_reg_t bmcr;
     ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
@@ -166,17 +248,15 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_set_addr(esp_eth_phy_t *phy, uint32_t addr)
+esp_err_t esp_eth_phy_802_3_set_addr(phy_802_3_t *phy_802_3, uint32_t addr)
 {
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     phy_802_3->addr = addr;
     return ESP_OK;
 }
 
-static esp_err_t eth_phy_802_3_get_addr(esp_eth_phy_t *phy, uint32_t *addr)
+esp_err_t esp_eth_phy_802_3_get_addr(phy_802_3_t *phy_802_3, uint32_t *addr)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     ESP_GOTO_ON_FALSE(addr, ESP_ERR_INVALID_ARG, err, TAG, "addr can't be null");
     *addr = phy_802_3->addr;
     return ESP_OK;
@@ -184,10 +264,9 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_advertise_pause_ability(esp_eth_phy_t *phy, uint32_t ability)
+esp_err_t esp_eth_phy_802_3_advertise_pause_ability(phy_802_3_t *phy_802_3, uint32_t ability)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
     /* Set PAUSE function ability */
     anar_reg_t anar;
@@ -205,10 +284,9 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_loopback(esp_eth_phy_t *phy, bool enable)
+esp_err_t esp_eth_phy_802_3_loopback(phy_802_3_t *phy_802_3, bool enable)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
     /* Set Loopback function */
     bmcr_reg_t bmcr;
@@ -222,12 +300,12 @@ static esp_err_t eth_phy_802_3_loopback(esp_eth_phy_t *phy, bool enable)
     return ESP_OK;
 err:
     return ret;
+
 }
 
-static esp_err_t eth_phy_802_3_set_speed(esp_eth_phy_t *phy, eth_speed_t speed)
+esp_err_t esp_eth_phy_802_3_set_speed(phy_802_3_t *phy_802_3, eth_speed_t speed)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
 
     /* Since the link is going to be reconfigured, consider it down to be status updated once the driver re-started */
@@ -244,10 +322,9 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_set_duplex(esp_eth_phy_t *phy, eth_duplex_t duplex)
+esp_err_t esp_eth_phy_802_3_set_duplex(phy_802_3_t *phy_802_3, eth_duplex_t duplex)
 {
     esp_err_t ret = ESP_OK;
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     esp_eth_mediator_t *eth = phy_802_3->eth;
 
     /* Since the link is going to be reconfigured, consider it down to be status updated once the driver re-started */
@@ -256,6 +333,9 @@ static esp_err_t eth_phy_802_3_set_duplex(esp_eth_phy_t *phy, eth_duplex_t duple
     /* Set duplex mode */
     bmcr_reg_t bmcr;
     ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+    if (bmcr.en_loopback) {
+        ESP_GOTO_ON_FALSE(duplex == ETH_DUPLEX_FULL, ESP_ERR_INVALID_STATE, err, TAG, "Duplex mode must be FULL for loopback operation");
+    }
     bmcr.duplex_mode = duplex;
     ESP_GOTO_ON_ERROR(eth->phy_reg_write(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, bmcr.val), err, TAG, "write BMCR failed");
 
@@ -264,21 +344,19 @@ err:
     return ret;
 }
 
-static esp_err_t eth_phy_802_3_init(esp_eth_phy_t *phy)
+esp_err_t esp_eth_phy_802_3_init(phy_802_3_t *phy_802_3)
 {
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     return esp_eth_phy_802_3_basic_phy_init(phy_802_3);
 }
 
-static esp_err_t eth_phy_802_3_deinit(esp_eth_phy_t *phy)
+esp_err_t esp_eth_phy_802_3_deinit(phy_802_3_t *phy_802_3)
 {
-    phy_802_3_t *phy_802_3 = __containerof(phy, phy_802_3_t, parent);
     return esp_eth_phy_802_3_basic_phy_deinit(phy_802_3);
 }
 
-static esp_err_t eth_phy_802_3_del(esp_eth_phy_t *phy)
+esp_err_t esp_eth_phy_802_3_del(phy_802_3_t *phy_802_3)
 {
-    free(phy);
+    free(phy_802_3);
     return ESP_OK;
 }
 
@@ -302,16 +380,18 @@ esp_err_t esp_eth_phy_802_3_detect_phy_addr(esp_eth_mediator_t *eth, int *detect
     }
     int addr_try = 0;
     uint32_t reg_value = 0;
-    for (; addr_try < 16; addr_try++) {
-        eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
-        if (reg_value != 0xFFFF && reg_value != 0x00) {
-            *detected_addr = addr_try;
-            break;
+    for (int i = 0; i < 3; i++){
+        for (addr_try = 0; addr_try < 32; addr_try++) {
+            eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
+            if (reg_value != 0xFFFF && reg_value != 0x00) {
+                *detected_addr = addr_try;
+                break;
+            }
+        }
+        if (addr_try < 32) {
+            ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
+            return ESP_OK;
         }
-    }
-    if (addr_try < 16) {
-        ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
-        return ESP_OK;
     }
     ESP_LOGE(TAG, "No PHY device detected");
     return ESP_ERR_NOT_FOUND;
@@ -326,9 +406,9 @@ esp_err_t esp_eth_phy_802_3_basic_phy_init(phy_802_3_t *phy_802_3)
         ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_detect_phy_addr(phy_802_3->eth, &phy_802_3->addr), err, TAG, "Detect PHY address failed");
     }
     /* Power on Ethernet PHY */
-    ESP_GOTO_ON_ERROR(eth_phy_802_3_pwrctl(&phy_802_3->parent, true), err, TAG, "power control failed");
+    ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_pwrctl(phy_802_3, true), err, TAG, "power control failed");
     /* Reset Ethernet PHY */
-    ESP_GOTO_ON_ERROR(eth_phy_802_3_reset(&phy_802_3->parent), err, TAG, "reset failed");
+    ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_reset(phy_802_3), err, TAG, "reset failed");
 
     return ESP_OK;
 err:
@@ -339,7 +419,7 @@ esp_err_t esp_eth_phy_802_3_basic_phy_deinit(phy_802_3_t *phy_802_3)
 {
     esp_err_t ret = ESP_OK;
     /* Power off Ethernet PHY */
-    ESP_GOTO_ON_ERROR(eth_phy_802_3_pwrctl(&phy_802_3->parent, false), err, TAG, "power control failed");
+    ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_pwrctl(phy_802_3, false), err, TAG, "power control failed");
     return ESP_OK;
 err:
     return ret;
@@ -385,11 +465,6 @@ err:
     return ret;
 }
 
-phy_802_3_t *esp_eth_phy_into_phy_802_3(esp_eth_phy_t *phy)
-{
-    return __containerof(phy, phy_802_3_t, parent);
-}
-
 esp_err_t esp_eth_phy_802_3_obj_config_init(phy_802_3_t *phy_802_3, const eth_phy_config_t *config)
 {
     esp_err_t ret = ESP_OK;
@@ -402,20 +477,20 @@ esp_err_t esp_eth_phy_802_3_obj_config_init(phy_802_3_t *phy_802_3, const eth_ph
     phy_802_3->reset_gpio_num = config->reset_gpio_num;
     phy_802_3->autonego_timeout_ms = config->autonego_timeout_ms;
 
-    phy_802_3->parent.reset = eth_phy_802_3_reset;
-    phy_802_3->parent.reset_hw = eth_phy_802_3_reset_hw_default;
-    phy_802_3->parent.init = eth_phy_802_3_init;
-    phy_802_3->parent.deinit = eth_phy_802_3_deinit;
-    phy_802_3->parent.set_mediator = eth_phy_802_3_set_mediator;
-    phy_802_3->parent.autonego_ctrl = eth_phy_802_3_autonego_ctrl;
-    phy_802_3->parent.pwrctl = eth_phy_802_3_pwrctl;
-    phy_802_3->parent.get_addr = eth_phy_802_3_get_addr;
-    phy_802_3->parent.set_addr = eth_phy_802_3_set_addr;
-    phy_802_3->parent.advertise_pause_ability = eth_phy_802_3_advertise_pause_ability;
-    phy_802_3->parent.loopback = eth_phy_802_3_loopback;
-    phy_802_3->parent.set_speed = eth_phy_802_3_set_speed;
-    phy_802_3->parent.set_duplex = eth_phy_802_3_set_duplex;
-    phy_802_3->parent.del = eth_phy_802_3_del;
+    phy_802_3->parent.reset = reset;
+    phy_802_3->parent.reset_hw = reset_hw_default;
+    phy_802_3->parent.init = init;
+    phy_802_3->parent.deinit = deinit;
+    phy_802_3->parent.set_mediator = set_mediator;
+    phy_802_3->parent.autonego_ctrl = autonego_ctrl;
+    phy_802_3->parent.pwrctl = pwrctl;
+    phy_802_3->parent.get_addr = get_addr;
+    phy_802_3->parent.set_addr = set_addr;
+    phy_802_3->parent.advertise_pause_ability = advertise_pause_ability;
+    phy_802_3->parent.loopback = loopback;
+    phy_802_3->parent.set_speed = set_speed;
+    phy_802_3->parent.set_duplex = set_duplex;
+    phy_802_3->parent.del = del;
     phy_802_3->parent.get_link = NULL;
     phy_802_3->parent.custom_ioctl = NULL;
 
diff --git a/components/esp_eth/src/esp_eth_phy_dm9051.c b/components/esp_eth/src/esp_eth_phy_dm9051.c
index 3f711854e8..6db49f8fad 100644
--- a/components/esp_eth/src/esp_eth_phy_dm9051.c
+++ b/components/esp_eth/src/esp_eth_phy_dm9051.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -59,6 +59,29 @@ typedef union {
 } dscsr_reg_t;
 #define ETH_PHY_DSCSR_REG_ADDR (0x11)
 
+typedef union {
+    struct {
+        uint32_t pd_value : 1; /* 1 in this bit indicates power down */
+        uint32_t reserved1 : 1; /* Reserved */
+        uint32_t monsel0 : 1; /* Vendor monitor select  */
+        uint32_t monsel1 : 1; /* Vendor monitor select  */
+        uint32_t mdix_down : 1; /* Set 1 to disable HP Auto-MDIX */
+        uint32_t mdix_fix : 1; /* When mdix_down = 1, MDIX_CNTL value depend on the register value. */
+        uint32_t autoneg_lpbk : 1; /* Set 1 to enable autonegotioation loopback */
+        uint32_t mdxi_cntl : 1; /* Polarity of MDI/MDIX value */
+        uint32_t reserved2 : 1; /* Reserved */
+        uint32_t nway_pwr : 1; /* Set 1 to enable power savings during autonegotiation period */
+        uint32_t tx10m_pwr : 1; /* Set 1 to enable transmit power savings in 10BASE-T mode */
+        uint32_t preamblex : 1; /* When tx10m_pwr is set, the 10BASE-T transmit preamble count is reduced */
+        uint32_t force_fef : 1; /* Vendor test select control */
+        uint32_t force_txsd : 1; /* Set 1 to force SD signal OK in 100M */
+        uint32_t tstse0 : 1; /* Vendor test select control */
+        uint32_t tstse1 : 1; /* Vendor test select control */
+    };
+    uint32_t val;
+} scr_reg_t;
+#define ETH_PHY_SCR_REG_ADDR 0x14
+
 typedef struct {
     phy_802_3_t phy_802_3;
 } phy_dm9051_t;
@@ -72,7 +95,7 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
     eth_duplex_t duplex = ETH_DUPLEX_HALF;
     uint32_t peer_pause_ability = false;
     bmsr_reg_t bmsr;
-    dscsr_reg_t dscsr;
+    bmcr_reg_t bmcr;
     anlpar_reg_t anlpar;
     // BMSR is a latch low register
     // after power up, the first latched value must be 0, which means down
@@ -85,17 +108,9 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
     if (dm9051->phy_802_3.link_status != link) {
         /* when link up, read negotiation result */
         if (link == ETH_LINK_UP) {
-            ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_DSCSR_REG_ADDR, &(dscsr.val)), err, TAG, "read DSCSR failed");
-            if (dscsr.fdx100 || dscsr.hdx100) {
-                speed = ETH_SPEED_100M;
-            } else {
-                speed = ETH_SPEED_10M;
-            }
-            if (dscsr.fdx100 || dscsr.fdx10) {
-                duplex = ETH_DUPLEX_FULL;
-            } else {
-                duplex = ETH_DUPLEX_HALF;
-            }
+            ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+            speed = bmcr.speed_select == 1 ? ETH_SPEED_100M : ETH_SPEED_10M;
+            duplex = bmcr.duplex_mode == 1 ? ETH_DUPLEX_FULL : ETH_DUPLEX_HALF;
             ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_SPEED, (void *)speed), err, TAG, "change speed failed");
             ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_DUPLEX, (void *)duplex), err, TAG, "change duplex failed");
             /* if we're in duplex mode, and peer has the flow control ability */
@@ -174,18 +189,63 @@ err:
     return ret;
 }
 
+static esp_err_t dm9051_loopback(esp_eth_phy_t *phy, bool enable)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+    /* Set Loopback function */
+    // Enable Auto-negotiation loopback in Speficic control register
+    bmcr_reg_t bmcr;
+    scr_reg_t scr;
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_SCR_REG_ADDR, &(scr.val)), err, TAG, "read SCR failed");
+    if (enable) {
+        bmcr.en_loopback = 1;
+        scr.autoneg_lpbk = 1;
+    } else {
+        bmcr.en_loopback = 0;
+        scr.autoneg_lpbk = 0;
+    }
+    ESP_GOTO_ON_ERROR(eth->phy_reg_write(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, bmcr.val), err, TAG, "write BMCR failed");
+    ESP_GOTO_ON_ERROR(eth->phy_reg_write(eth, phy_802_3->addr, ETH_PHY_SCR_REG_ADDR, scr.val), err, TAG, "write SCR failed");
+    return ESP_OK;
+err:
+    return ret;
+}
+
+static esp_err_t dm9051_set_speed(esp_eth_phy_t *phy, eth_speed_t speed)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+
+    /* Check if loopback is enabled, and if so, can it work with proposed speed or not */
+    bmcr_reg_t bmcr;
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+    if (bmcr.en_loopback) {
+        ESP_GOTO_ON_FALSE(speed == ETH_SPEED_100M, ESP_ERR_INVALID_STATE, err, TAG, "Speed must be 100M for loopback operation");
+    }
+
+    return esp_eth_phy_802_3_set_speed(phy_802_3, speed);
+err:
+    return ret;
+}
+
 esp_eth_phy_t *esp_eth_phy_new_dm9051(const eth_phy_config_t *config)
 {
     esp_eth_phy_t *ret = NULL;
     phy_dm9051_t *dm9051 = calloc(1, sizeof(phy_dm9051_t));
     ESP_GOTO_ON_FALSE(dm9051, NULL, err, TAG, "calloc dm9051 failed");
     ESP_GOTO_ON_FALSE(esp_eth_phy_802_3_obj_config_init(&dm9051->phy_802_3, config) == ESP_OK,
-                        NULL, err, TAG, "configuration initialization of PHY 802.3 failed");
+                      NULL, err, TAG, "configuration initialization of PHY 802.3 failed");
 
     // redefine functions which need to be customized for sake of dm9051
     dm9051->phy_802_3.parent.init = dm9051_init;
     dm9051->phy_802_3.parent.reset = dm9051_reset;
     dm9051->phy_802_3.parent.get_link = dm9051_get_link;
+    dm9051->phy_802_3.parent.loopback = dm9051_loopback;
+    dm9051->phy_802_3.parent.set_speed = dm9051_set_speed;
 
     return &dm9051->phy_802_3.parent;
 err:
diff --git a/components/esp_eth/src/esp_eth_phy_dp83848.c b/components/esp_eth/src/esp_eth_phy_dp83848.c
index e494a2221c..fc771b072f 100644
--- a/components/esp_eth/src/esp_eth_phy_dp83848.c
+++ b/components/esp_eth/src/esp_eth_phy_dp83848.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -123,6 +123,33 @@ err:
     return ret;
 }
 
+static esp_err_t dp83848_autonego_ctrl(esp_eth_phy_t *phy, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+    if (cmd == ESP_ETH_PHY_AUTONEGO_EN) {
+        bmcr_reg_t bmcr;
+        ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+        ESP_GOTO_ON_FALSE(bmcr.en_loopback == 0, ESP_ERR_INVALID_STATE, err, TAG, "Autonegotiation can't be enabled while in loopback operation");
+    }
+    return esp_eth_phy_802_3_autonego_ctrl(phy_802_3, cmd, autonego_en_stat);
+err:
+    return ret;
+}
+
+static esp_err_t dp83848_loopback(esp_eth_phy_t *phy, bool enable)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    bool auto_nego_en = true;
+    ESP_GOTO_ON_ERROR(dp83848_autonego_ctrl(phy, ESP_ETH_PHY_AUTONEGO_G_STAT, &auto_nego_en), err, TAG, "get status of autonegotiation failed");
+    ESP_GOTO_ON_FALSE(!(auto_nego_en && enable), ESP_ERR_INVALID_STATE, err, TAG, "Unable to set loopback while autonegotiation is enabled. Disable it to use loopback");
+    return esp_eth_phy_802_3_loopback(phy_802_3, enable);
+err:
+    return ret;
+}
+
 static esp_err_t dp83848_init(esp_eth_phy_t *phy)
 {
     esp_err_t ret = ESP_OK;
@@ -154,6 +181,8 @@ esp_eth_phy_t *esp_eth_phy_new_dp83848(const eth_phy_config_t *config)
     // redefine functions which need to be customized for sake of dp83848
     dp83848->phy_802_3.parent.init = dp83848_init;
     dp83848->phy_802_3.parent.get_link = dp83848_get_link;
+    dp83848->phy_802_3.parent.autonego_ctrl = dp83848_autonego_ctrl;
+    dp83848->phy_802_3.parent.loopback = dp83848_loopback;
 
     return &dp83848->phy_802_3.parent;
 err:
diff --git a/components/esp_eth/src/esp_eth_phy_ksz80xx.c b/components/esp_eth/src/esp_eth_phy_ksz80xx.c
index 62ca742d14..2102acdf88 100644
--- a/components/esp_eth/src/esp_eth_phy_ksz80xx.c
+++ b/components/esp_eth/src/esp_eth_phy_ksz80xx.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -177,6 +177,25 @@ err:
     return ret;
 }
 
+static esp_err_t ksz80xx_set_speed(esp_eth_phy_t *phy, eth_speed_t speed)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+
+    /* Check if loopback is enabled, and if so, can it work with proposed speed or not */
+    bmcr_reg_t bmcr;
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+    if (bmcr.en_loopback) {
+        ESP_GOTO_ON_FALSE(speed == ETH_SPEED_100M, ESP_ERR_INVALID_STATE, err, TAG, "Speed must be 100M for loopback operation");
+    }
+
+    return esp_eth_phy_802_3_set_speed(phy_802_3, speed);
+err:
+    return ret;
+}
+
+
 esp_eth_phy_t *esp_eth_phy_new_ksz80xx(const eth_phy_config_t *config)
 {
     esp_eth_phy_t *ret = NULL;
@@ -188,6 +207,7 @@ esp_eth_phy_t *esp_eth_phy_new_ksz80xx(const eth_phy_config_t *config)
     // redefine functions which need to be customized for sake of ksz80xx
     ksz80xx->phy_802_3.parent.init = ksz80xx_init;
     ksz80xx->phy_802_3.parent.get_link = ksz80xx_get_link;
+    ksz80xx->phy_802_3.parent.set_speed = ksz80xx_set_speed;
 
     return &ksz80xx->phy_802_3.parent;
 err:
diff --git a/components/esp_eth/src/esp_eth_phy_ksz8851snl.c b/components/esp_eth/src/esp_eth_phy_ksz8851snl.c
index 52446d9b21..3739b63a0b 100644
--- a/components/esp_eth/src/esp_eth_phy_ksz8851snl.c
+++ b/components/esp_eth/src/esp_eth_phy_ksz8851snl.c
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: MIT
  *
- * SPDX-FileContributor: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2021-2023 Espressif Systems (Shanghai) CO LTD
  */
 #include <stdlib.h>
 #include "esp_check.h"
@@ -317,7 +317,12 @@ static esp_err_t phy_ksz8851_set_duplex(esp_eth_phy_t *phy, eth_duplex_t duplex)
 
     /* Set duplex mode */
     uint32_t control;
+    uint32_t mbcr;
     ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, ksz8851->addr, KSZ8851_P1CR, &control), err, TAG, "P1CR read failed");
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, ksz8851->addr, KSZ8851_P1MBCR, &mbcr), err, TAG, "P1MBCR read failed");
+    if (mbcr & P1MBCR_LOCAL_LOOPBACK) {
+        ESP_GOTO_ON_FALSE(duplex == ETH_DUPLEX_FULL, ESP_ERR_INVALID_STATE, err, TAG, "Duplex mode must be FULL for loopback operation");
+    }
     if (duplex == ETH_DUPLEX_FULL) {
         control |= P1CR_FORCE_DUPLEX;
     } else {
diff --git a/components/esp_eth/src/esp_eth_phy_lan87xx.c b/components/esp_eth/src/esp_eth_phy_lan87xx.c
index 031265b384..b63242d660 100644
--- a/components/esp_eth/src/esp_eth_phy_lan87xx.c
+++ b/components/esp_eth/src/esp_eth_phy_lan87xx.c
@@ -1,11 +1,13 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <string.h>
 #include <stdlib.h>
 #include <sys/cdefs.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
 #include "esp_log.h"
 #include "esp_check.h"
 #include "esp_eth_phy_802_3.h"
@@ -217,12 +219,20 @@ static esp_err_t lan87xx_update_link_duplex_speed(phy_lan87xx_t *lan87xx)
     eth_speed_t speed = ETH_SPEED_10M;
     eth_duplex_t duplex = ETH_DUPLEX_HALF;
     bmsr_reg_t bmsr;
+    bmcr_reg_t bmcr;
     pscsr_reg_t pscsr;
     uint32_t peer_pause_ability = false;
     anlpar_reg_t anlpar;
     ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_ANLPAR_REG_ADDR, &(anlpar.val)), err, TAG, "read ANLPAR failed");
     ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMSR_REG_ADDR, &(bmsr.val)), err, TAG, "read BMSR failed");
-    eth_link_t link = bmsr.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
+    ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+    /* link status is forced up because LAN87xx reports link down when loopback is enabled and cable is unplugged */
+    eth_link_t link;
+    if(bmcr.en_loopback) {
+        link = ETH_LINK_UP;
+    } else {
+        link = bmsr.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
+    }
     /* check if link status changed */
     if (lan87xx->phy_802_3.link_status != link) {
         /* when link up, read negotiation result */
@@ -282,6 +292,45 @@ static esp_err_t lan87xx_reset_hw(esp_eth_phy_t *phy)
     /* It was observed that assert nRST signal on LAN87xx needs to be a little longer than the minimum specified in datasheet */
     return esp_eth_phy_802_3_reset_hw(esp_eth_phy_into_phy_802_3(phy), 150);
 }
+static esp_err_t lan87xx_autonego_ctrl(esp_eth_phy_t *phy, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+    if (cmd == ESP_ETH_PHY_AUTONEGO_EN) {
+        bmcr_reg_t bmcr;
+        ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+        ESP_GOTO_ON_FALSE(bmcr.en_loopback == 0, ESP_ERR_INVALID_STATE, err, TAG, "Autonegotiation can't be enabled while in loopback operation");
+    }
+    return esp_eth_phy_802_3_autonego_ctrl(phy_802_3, cmd, autonego_en_stat);
+err:
+    return ret;
+}
+
+static esp_err_t lan87xx_loopback(esp_eth_phy_t *phy, bool enable)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    bool auto_nego_en;
+    ESP_GOTO_ON_ERROR(lan87xx_autonego_ctrl(phy, ESP_ETH_PHY_AUTONEGO_G_STAT, &auto_nego_en), err, TAG, "get status of autonegotiation failed");
+    ESP_GOTO_ON_FALSE(!(auto_nego_en && enable), ESP_ERR_INVALID_STATE, err, TAG, "Unable to set loopback while autonegotiation is enabled. Disable it to use loopback");
+    return esp_eth_phy_802_3_loopback(phy_802_3, enable);
+err:
+    return ret;
+}
+
+static esp_err_t lan87xx_set_speed(esp_eth_phy_t *phy, eth_speed_t speed)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+
+    /* It was observed that a delay needs to be introduced after setting speed and prior driver's start.
+    Otherwise, the very first read of PHY registers is not valid data (0xFFFF's). */
+    ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_set_speed(phy_802_3, speed), err, TAG, "set speed failed");
+    vTaskDelay(pdMS_TO_TICKS(10));
+err:
+    return ret;
+}
 
 static esp_err_t lan87xx_init(esp_eth_phy_t *phy)
 {
@@ -323,6 +372,9 @@ esp_eth_phy_t *esp_eth_phy_new_lan87xx(const eth_phy_config_t *config)
     lan87xx->phy_802_3.parent.reset_hw = lan87xx_reset_hw;
     lan87xx->phy_802_3.parent.init = lan87xx_init;
     lan87xx->phy_802_3.parent.get_link = lan87xx_get_link;
+    lan87xx->phy_802_3.parent.autonego_ctrl = lan87xx_autonego_ctrl;
+    lan87xx->phy_802_3.parent.loopback = lan87xx_loopback;
+    lan87xx->phy_802_3.parent.set_speed = lan87xx_set_speed;
 
     return &lan87xx->phy_802_3.parent;
 err:
diff --git a/components/esp_eth/src/esp_eth_phy_rtl8201.c b/components/esp_eth/src/esp_eth_phy_rtl8201.c
index 2cc42753ba..1464fc6acf 100644
--- a/components/esp_eth/src/esp_eth_phy_rtl8201.c
+++ b/components/esp_eth/src/esp_eth_phy_rtl8201.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -117,6 +117,33 @@ err:
     return ret;
 }
 
+static esp_err_t rtl8201_autonego_ctrl(esp_eth_phy_t *phy, eth_phy_autoneg_cmd_t cmd, bool *autonego_en_stat)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    esp_eth_mediator_t *eth = phy_802_3->eth;
+    if (cmd == ESP_ETH_PHY_AUTONEGO_EN) {
+        bmcr_reg_t bmcr;
+        ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, phy_802_3->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
+        ESP_GOTO_ON_FALSE(bmcr.en_loopback == 0, ESP_ERR_INVALID_STATE, err, TAG, "Autonegotiation can't be enabled while in loopback operation");
+    }
+    return esp_eth_phy_802_3_autonego_ctrl(phy_802_3, cmd, autonego_en_stat);
+err:
+    return ret;
+}
+
+static esp_err_t rtl8201_loopback(esp_eth_phy_t *phy, bool enable)
+{
+    esp_err_t ret = ESP_OK;
+    phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);
+    bool auto_nego_en;
+    ESP_GOTO_ON_ERROR(rtl8201_autonego_ctrl(phy, ESP_ETH_PHY_AUTONEGO_G_STAT, &auto_nego_en), err, TAG, "get status of autonegotiation failed");
+    ESP_GOTO_ON_FALSE(!(auto_nego_en && enable), ESP_ERR_INVALID_STATE, err, TAG, "Unable to set loopback while autonegotiation is enabled. Disable it to use loopback");
+    return esp_eth_phy_802_3_loopback(phy_802_3, enable);
+err:
+    return ret;
+}
+
 static esp_err_t rtl8201_init(esp_eth_phy_t *phy)
 {
     esp_err_t ret = ESP_OK;
@@ -148,6 +175,8 @@ esp_eth_phy_t *esp_eth_phy_new_rtl8201(const eth_phy_config_t *config)
     // redefine functions which need to be customized for sake of RTL8201
     rtl8201->phy_802_3.parent.init = rtl8201_init;
     rtl8201->phy_802_3.parent.get_link = rtl8201_get_link;
+    rtl8201->phy_802_3.parent.autonego_ctrl = rtl8201_autonego_ctrl;
+    rtl8201->phy_802_3.parent.loopback = rtl8201_loopback;
 
     return &rtl8201->phy_802_3.parent;
 err:
diff --git a/components/esp_eth/test/test_emac.c b/components/esp_eth/test/test_emac.c
index 72364fb0ae..67b49af5b3 100644
--- a/components/esp_eth/test/test_emac.c
+++ b/components/esp_eth/test/test_emac.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */
@@ -148,12 +148,6 @@ TEST_CASE("esp32 ethernet speed/duplex/autonegotiation", "[ethernet][test_env=UT
     esp_eth_handle_t eth_handle = NULL;
     TEST_ESP_OK(esp_eth_driver_install(&eth_config, &eth_handle));
 
-    // Set PHY to loopback mode so we do not have to take care about link configuration of the other node.
-    // The reason behind is improbable, however, if the other node was configured to e.g. 100 Mbps and we
-    // tried to change the speed at ESP node to 10 Mbps, we could get into trouble to establish a link.
-    bool loopback_en = true;
-    esp_eth_ioctl(eth_handle, ETH_CMD_S_PHY_LOOPBACK, &loopback_en);
-
     // this test only test layer2, so don't need to register input callback (i.e. esp_eth_update_input_path)
     TEST_ESP_OK(esp_eth_start(eth_handle));
     // wait for connection start