mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-02 12:14:32 +02:00
System: fix RTCFAST section alignment
This bugfix contains 3 fixes: 1. .rtc_dummy section is removed (not needed for C3) 2. .rtc_text section is padded with 16B for possible CPU prefetch 3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirements
This commit is contained in:
@@ -10,25 +10,19 @@ SECTIONS
|
|||||||
.rtc.text :
|
.rtc.text :
|
||||||
{
|
{
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
|
_rtc_fast_start = ABSOLUTE(.);
|
||||||
|
|
||||||
mapping[rtc_text]
|
mapping[rtc_text]
|
||||||
|
|
||||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||||
|
|
||||||
|
/* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
|
||||||
|
. += 16;
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
_rtc_text_end = ABSOLUTE(.);
|
_rtc_text_end = ABSOLUTE(.);
|
||||||
} > rtc_iram_seg
|
} > rtc_iram_seg
|
||||||
|
|
||||||
/**
|
|
||||||
* This section is required to skip rtc.text area because rtc_iram_seg and
|
|
||||||
* rtc_data_seg are reflect the same address space on different buses.
|
|
||||||
*/
|
|
||||||
.rtc.dummy :
|
|
||||||
{
|
|
||||||
_rtc_dummy_start = ABSOLUTE(.);
|
|
||||||
_rtc_fast_start = ABSOLUTE(.);
|
|
||||||
. = SIZEOF(.rtc.text);
|
|
||||||
_rtc_dummy_end = ABSOLUTE(.);
|
|
||||||
} > rtc_data_seg
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* This section located in RTC FAST Memory area.
|
* This section located in RTC FAST Memory area.
|
||||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||||
@@ -392,11 +386,11 @@ SECTIONS
|
|||||||
/* Marks the end of IRAM code segment */
|
/* Marks the end of IRAM code segment */
|
||||||
.iram0.text_end (NOLOAD) :
|
.iram0.text_end (NOLOAD) :
|
||||||
{
|
{
|
||||||
|
/* iram_end_test section exists for use by memprot unit tests only */
|
||||||
|
*(.iram_end_test)
|
||||||
/* C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
|
/* C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
|
||||||
. += 16;
|
. += 16;
|
||||||
. = ALIGN (0x200);
|
. = ALIGN (0x200);
|
||||||
/* iram_end_test section exists for use by memprot unit tests only */
|
|
||||||
*(.iram_end_test)
|
|
||||||
_iram_text_end = ABSOLUTE(.);
|
_iram_text_end = ABSOLUTE(.);
|
||||||
} > iram0_0_seg
|
} > iram0_0_seg
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user