diff --git a/components/esp_hw_support/port/esp32/include/soc/rtc.h b/components/esp_hw_support/port/esp32/include/soc/rtc.h index 61ef2373ef..d7a7664b9a 100644 --- a/components/esp_hw_support/port/esp32/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32/include/soc/rtc.h @@ -481,6 +481,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief sleep configuration for rtc_sleep_init function */ diff --git a/components/esp_hw_support/port/esp32/rtc_time.c b/components/esp_hw_support/port/esp32/rtc_time.c index 447c109ec8..03695fc93c 100644 --- a/components/esp_hw_support/port/esp32/rtc_time.c +++ b/components/esp_hw_support/port/esp32/rtc_time.c @@ -191,6 +191,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h index 3eb96b63ba..e9565b8eee 100644 --- a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h @@ -508,6 +508,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/esp_hw_support/port/esp32c2/rtc_time.c b/components/esp_hw_support/port/esp32c2/rtc_time.c index 5c7470dad4..d724df17a1 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_time.c +++ b/components/esp_hw_support/port/esp32c2/rtc_time.c @@ -191,6 +191,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h index 3c993df6bd..14006d624d 100644 --- a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h @@ -536,6 +536,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/esp_hw_support/port/esp32c3/rtc_time.c b/components/esp_hw_support/port/esp32c3/rtc_time.c index bf1aa97259..783aa93ffb 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_time.c +++ b/components/esp_hw_support/port/esp32c3/rtc_time.c @@ -194,6 +194,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c5/include/soc/rtc.h b/components/esp_hw_support/port/esp32c5/include/soc/rtc.h index 59f9503e04..937c09b560 100644 --- a/components/esp_hw_support/port/esp32c5/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c5/include/soc/rtc.h @@ -416,6 +416,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/port/esp32c5/rtc_time.c b/components/esp_hw_support/port/esp32c5/rtc_time.c index 4dedda4a85..cb1b4ee6be 100644 --- a/components/esp_hw_support/port/esp32c5/rtc_time.c +++ b/components/esp_hw_support/port/esp32c5/rtc_time.c @@ -196,6 +196,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h index 287e7982ac..50a239a13c 100644 --- a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h @@ -447,6 +447,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- // **WARNING**: The following are only for backwards compatibility. diff --git a/components/esp_hw_support/port/esp32c6/rtc_time.c b/components/esp_hw_support/port/esp32c6/rtc_time.c index ccd94fc1dd..5eefebca88 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_time.c +++ b/components/esp_hw_support/port/esp32c6/rtc_time.c @@ -271,6 +271,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c61/include/soc/rtc.h b/components/esp_hw_support/port/esp32c61/include/soc/rtc.h index ae37654021..72d5c0033a 100644 --- a/components/esp_hw_support/port/esp32c61/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c61/include/soc/rtc.h @@ -416,6 +416,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/port/esp32c61/rtc_time.c b/components/esp_hw_support/port/esp32c61/rtc_time.c index ddc592e4e5..4181353442 100644 --- a/components/esp_hw_support/port/esp32c61/rtc_time.c +++ b/components/esp_hw_support/port/esp32c61/rtc_time.c @@ -196,6 +196,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h index 3b60cd056a..b69c031147 100644 --- a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h @@ -445,6 +445,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- // **WARNING**: The following are only for backwards compatibility. // Please use the declarations in soc/clk_tree_defs.h instead. diff --git a/components/esp_hw_support/port/esp32h2/rtc_time.c b/components/esp_hw_support/port/esp32h2/rtc_time.c index 49cc0c5956..47836cb3d8 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_time.c +++ b/components/esp_hw_support/port/esp32h2/rtc_time.c @@ -271,6 +271,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32p4/include/soc/rtc.h b/components/esp_hw_support/port/esp32p4/include/soc/rtc.h index 43acaa253f..7c627a03bd 100644 --- a/components/esp_hw_support/port/esp32p4/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32p4/include/soc/rtc.h @@ -460,6 +460,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Enable or disable APLL * diff --git a/components/esp_hw_support/port/esp32p4/rtc_time.c b/components/esp_hw_support/port/esp32p4/rtc_time.c index 6aa564e6ff..f9da6db541 100644 --- a/components/esp_hw_support/port/esp32p4/rtc_time.c +++ b/components/esp_hw_support/port/esp32p4/rtc_time.c @@ -222,6 +222,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h index 208f059011..8777d43b0e 100644 --- a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h @@ -569,6 +569,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/esp_hw_support/port/esp32s2/rtc_time.c b/components/esp_hw_support/port/esp32s2/rtc_time.c index 76df279092..39e59e56a1 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_time.c +++ b/components/esp_hw_support/port/esp32s2/rtc_time.c @@ -259,6 +259,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h index 4dd9cab7e7..1f4f84da80 100644 --- a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h @@ -547,6 +547,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power up flags for rtc_sleep_pd function */ diff --git a/components/esp_hw_support/port/esp32s3/rtc_time.c b/components/esp_hw_support/port/esp32s3/rtc_time.c index 834676a880..4b78096c5c 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_time.c +++ b/components/esp_hw_support/port/esp32s3/rtc_time.c @@ -193,6 +193,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void)