diff --git a/Kconfig b/Kconfig index b2a207e3b6..2c06a31572 100644 --- a/Kconfig +++ b/Kconfig @@ -24,22 +24,22 @@ mainmenu "Espressif IoT Development Framework Configuration" bool default "y" if IDF_TARGET="esp32" - config IDF_TARGET_ESP32S2BETA + config IDF_TARGET_ESP32S2 bool - default "y" if IDF_TARGET="esp32s2beta" + default "y" if IDF_TARGET="esp32s2" select FREERTOS_UNICORE config IDF_FIRMWARE_CHIP_ID hex default 0x0000 if IDF_TARGET_ESP32 - default 0x0002 if IDF_TARGET_ESP32S2BETA + default 0x0002 if IDF_TARGET_ESP32S2 default 0xFFFF menu "SDK tool configuration" config SDK_TOOLPREFIX string "Compiler toolchain path/prefix" default "xtensa-esp32-elf-" if IDF_TARGET_ESP32 - default "xtensa-esp32s2-elf-" if IDF_TARGET_ESP32S2BETA + default "xtensa-esp32s2-elf-" if IDF_TARGET_ESP32S2 help The prefix/path that is used to call the toolchain. The default setting assumes a crosstool-ng gcc setup that is in your PATH. diff --git a/components/app_trace/app_trace.c b/components/app_trace/app_trace.c index 37878924f5..cf75dcfd8f 100644 --- a/components/app_trace/app_trace.c +++ b/components/app_trace/app_trace.c @@ -158,7 +158,7 @@ #include #include "soc/soc.h" #include "soc/dport_reg.h" -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #include "soc/sensitive_reg.h" #endif #include "eri.h" @@ -210,7 +210,7 @@ const static char *TAG = "esp_apptrace"; #define TRACEMEM_MUX_BLK0_ONLY 1 #define TRACEMEM_MUX_BLK1_ONLY 2 #define TRACEMEM_MUX_PROBLK1_APPBLK0 3 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define TRACEMEM_MUX_BLK0_NUM 19 #define TRACEMEM_MUX_BLK1_NUM 20 #define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4)) @@ -244,7 +244,7 @@ static volatile uint8_t *s_trax_blocks[] = { (volatile uint8_t *) 0x3FFFC000, (volatile uint8_t *) 0x3FFF8000 }; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 static volatile uint8_t *s_trax_blocks[] = { (volatile uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM), (volatile uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM) @@ -435,7 +435,7 @@ static inline void esp_apptrace_trax_select_memory_block(int block_num) // select memory block to be exposed to the TRAX module (accessed by host) #if CONFIG_IDF_TARGET_ESP32 DPORT_WRITE_PERI_REG(DPORT_TRACEMEM_MUX_MODE_REG, block_num ? TRACEMEM_MUX_BLK0_ONLY : TRACEMEM_MUX_BLK1_ONLY); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 DPORT_WRITE_PERI_REG(DPORT_PMS_OCCUPY_3_REG, block_num ? BIT(TRACEMEM_MUX_BLK0_NUM-4) : BIT(TRACEMEM_MUX_BLK1_NUM-4)); #endif } diff --git a/components/app_trace/app_trace_util.c b/components/app_trace/app_trace_util.c index a23d906a2f..d7ad98497b 100644 --- a/components/app_trace/app_trace_util.c +++ b/components/app_trace/app_trace_util.c @@ -18,8 +18,8 @@ #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif /////////////////////////////////////////////////////////////////////////////// diff --git a/components/app_trace/gcov/gcov_rtio.c b/components/app_trace/gcov/gcov_rtio.c index 72c194be4a..109a1a6922 100644 --- a/components/app_trace/gcov/gcov_rtio.c +++ b/components/app_trace/gcov/gcov_rtio.c @@ -26,8 +26,8 @@ #include "hal/timer_ll.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/libc_stubs.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/libc_stubs.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/libc_stubs.h" #endif #if CONFIG_APPTRACE_GCOV_ENABLE diff --git a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c index 20614e3320..93e299400f 100644 --- a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c +++ b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c @@ -66,9 +66,9 @@ Revision: $Rev: 3734 $ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/clk.h" #endif #include "esp_app_trace.h" #include "esp_app_trace_util.h" @@ -78,9 +78,9 @@ Revision: $Rev: 3734 $ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/clk.h" #endif @@ -140,7 +140,7 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI; // CCOUNT is incremented at CPU frequency #if CONFIG_IDF_TARGET_ESP32 #define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000) -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000) #endif #endif // TS_USE_CCOUNT diff --git a/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c b/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c index 604ac67c9e..744c06a776 100644 --- a/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c +++ b/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c @@ -20,8 +20,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #include "esp_app_trace.h" diff --git a/components/app_update/test/test_switch_ota.c b/components/app_update/test/test_switch_ota.c index af87f6e7fb..7f37dc3b34 100644 --- a/components/app_update/test/test_switch_ota.c +++ b/components/app_update/test/test_switch_ota.c @@ -10,9 +10,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/rtc.h" #endif #include "freertos/FreeRTOS.h" diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild index 9c8b9ae6b6..df75c8e80c 100644 --- a/components/bootloader/Kconfig.projbuild +++ b/components/bootloader/Kconfig.projbuild @@ -206,11 +206,11 @@ menu "Bootloader config" depends on BOOTLOADER_APP_ANTI_ROLLBACK range 1 32 if IDF_TARGET_ESP32 default 32 if IDF_TARGET_ESP32 - range 1 16 if IDF_TARGET_ESP32S2BETA - default 16 if IDF_TARGET_ESP32S2BETA + range 1 16 if IDF_TARGET_ESP32S2 + default 16 if IDF_TARGET_ESP32S2 help The size of the efuse secure version field. - Its length is limited to 32 bits for ESP32 and 16 bits for ESP32S2BETA. + Its length is limited to 32 bits for ESP32 and 16 bits for ESP32-S2. This determines how many times the security version can be increased. config BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE @@ -468,7 +468,7 @@ menu "Security features" choice SECURE_FLASH_ENCRYPTION_KEYSIZE bool "Size of generated AES-XTS key" default SECURE_FLASH_ENCRYPTION_AES128 - depends on IDF_TARGET_ESP32S2BETA && SECURE_FLASH_ENC_ENABLED + depends on IDF_TARGET_ESP32S2 && SECURE_FLASH_ENC_ENABLED help Size of generated AES-XTS key. diff --git a/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld similarity index 100% rename from components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld rename to components/bootloader/subproject/main/ld/esp32s2/bootloader.ld diff --git a/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.rom.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld similarity index 100% rename from components/bootloader/subproject/main/ld/esp32s2beta/bootloader.rom.ld rename to components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld diff --git a/components/bootloader_support/CMakeLists.txt b/components/bootloader_support/CMakeLists.txt index 6c896e43b4..a207084d00 100644 --- a/components/bootloader_support/CMakeLists.txt +++ b/components/bootloader_support/CMakeLists.txt @@ -12,7 +12,7 @@ set(srcs ) if(IDF_TARGET STREQUAL "esp32") - # Not supported on ESP32S2Beta yet + # Not supported on ESP32S2 yet list(APPEND srcs "src/flash_encrypt.c") endif() diff --git a/components/bootloader_support/component.mk b/components/bootloader_support/component.mk index 18c560abd7..538cacfa79 100644 --- a/components/bootloader_support/component.mk +++ b/components/bootloader_support/component.mk @@ -19,8 +19,8 @@ ifndef IS_BOOTLOADER_BUILD COMPONENT_OBJEXCLUDE := src/bootloader_init.o endif -COMPONENT_OBJEXCLUDE += src/bootloader_flash_config_esp32s2beta.o \ - src/bootloader_efuse_esp32s2beta.o +COMPONENT_OBJEXCLUDE += src/bootloader_flash_config_esp32s2.o \ + src/bootloader_efuse_esp32s2.o # # Secure boot signing key support diff --git a/components/bootloader_support/include/bootloader_common.h b/components/bootloader_support/include/bootloader_common.h index 3b2caf469f..e444271eae 100644 --- a/components/bootloader_support/include/bootloader_common.h +++ b/components/bootloader_support/include/bootloader_common.h @@ -19,8 +19,8 @@ // RESET_REASON is declared in rom/rtc.h #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/rtc.h" #endif #ifdef __cplusplus diff --git a/components/bootloader_support/include/esp_flash_encrypt.h b/components/bootloader_support/include/esp_flash_encrypt.h index 10a0b71356..5002371766 100644 --- a/components/bootloader_support/include/esp_flash_encrypt.h +++ b/components/bootloader_support/include/esp_flash_encrypt.h @@ -52,7 +52,7 @@ static inline /** @cond */ IRAM_ATTR /** @endcond */ bool esp_flash_encryption_e uint32_t flash_crypt_cnt; #if CONFIG_IDF_TARGET_ESP32 flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT); #endif /* __builtin_parity is in flash, so we calculate parity inline */ diff --git a/components/bootloader_support/include/esp_secure_boot.h b/components/bootloader_support/include/esp_secure_boot.h index c7c8583350..389b19b51e 100644 --- a/components/bootloader_support/include/esp_secure_boot.h +++ b/components/bootloader_support/include/esp_secure_boot.h @@ -18,8 +18,8 @@ #include "soc/efuse_periph.h" #include "sdkconfig.h" -#if CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/efuse.h" +#if CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/efuse.h" #endif #ifdef CONFIG_SECURE_BOOT_ENABLED @@ -48,7 +48,7 @@ static inline bool esp_secure_boot_enabled(void) { #if CONFIG_IDF_TARGET_ESP32 return REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_ABS_DONE_0; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 return ets_efuse_secure_boot_enabled(); #endif } diff --git a/components/bootloader_support/src/bootloader_clock.c b/components/bootloader_support/src/bootloader_clock.c index 9e156e583e..40630a7f77 100644 --- a/components/bootloader_support/src/bootloader_clock.c +++ b/components/bootloader_support/src/bootloader_clock.c @@ -21,9 +21,9 @@ #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/uart.h" #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/rtc.h" #endif void bootloader_clock_configure(void) @@ -55,7 +55,7 @@ void bootloader_clock_configure(void) #if CONFIG_IDF_TARGET_ESP32 clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ; clk_cfg.cpu_freq_mhz = cpu_freq_mhz; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 clk_cfg.xtal_freq = RTC_XTAL_FREQ_40M; clk_cfg.cpu_freq = RTC_CPU_FREQ_80M; #endif diff --git a/components/bootloader_support/src/bootloader_common.c b/components/bootloader_support/src/bootloader_common.c index a87e301aea..951cc51f68 100644 --- a/components/bootloader_support/src/bootloader_common.c +++ b/components/bootloader_support/src/bootloader_common.c @@ -21,11 +21,11 @@ #include "esp32/rom/spi_flash.h" #include "esp32/rom/crc.h" #include "esp32/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/crc.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/crc.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/gpio.h" #endif #include "esp_flash_partitions.h" #include "bootloader_flash.h" diff --git a/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c b/components/bootloader_support/src/bootloader_efuse_esp32s2.c similarity index 94% rename from components/bootloader_support/src/bootloader_efuse_esp32s2beta.c rename to components/bootloader_support/src/bootloader_efuse_esp32s2.c index 6c2c3a9b64..26500e47f6 100644 --- a/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c +++ b/components/bootloader_support/src/bootloader_efuse_esp32s2.c @@ -18,6 +18,6 @@ uint8_t bootloader_common_get_chip_revision(void) { - /* No other revisions for ESP32-S2beta */ + /* No other revisions for ESP32-S2 */ return 0; } diff --git a/components/bootloader_support/src/bootloader_flash.c b/components/bootloader_support/src/bootloader_flash.c index 249b466945..02fc3e752b 100644 --- a/components/bootloader_support/src/bootloader_flash.c +++ b/components/bootloader_support/src/bootloader_flash.c @@ -17,8 +17,8 @@ #include #include /* including in bootloader for error values */ #include -#if CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" +#if CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" #endif #ifndef BOOTLOADER_BUILD @@ -72,7 +72,7 @@ esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool if (write_encrypted) { #if CONFIG_IDF_TARGET_ESP32 return spi_flash_write_encrypted(dest_addr, src, size); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 return SPI_Encrypt_Write(dest_addr, src, size); #endif } else { @@ -96,9 +96,9 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size) #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" #include "esp32/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/cache.h" #include "soc/cache_memory.h" #endif static const char *TAG = "bootloader_flash"; @@ -111,7 +111,7 @@ static const char *TAG = "bootloader_flash"; #define MMU_SIZE (0x320000) #define MMU_BLOCK50_VADDR (MMU_BLOCK0_VADDR + MMU_SIZE) #define FLASH_READ_VADDR MMU_BLOCK50_VADDR -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 /* Use first 63 blocks in MMU for bootloader_mmap, 63th block for bootloader_flash_read */ @@ -153,7 +153,7 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size) #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Disable(0); Cache_Flush(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uint32_t autoload = Cache_Suspend_ICache(); Cache_Invalidate_ICache_All(); #endif @@ -161,21 +161,21 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size) src_addr & MMU_FLASH_MASK, count, size, src_addr, src_addr_aligned ); #if CONFIG_IDF_TARGET_ESP32 int e = cache_flash_mmu_set(0, 0, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0); #endif if (e != 0) { ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e); #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif return NULL; } #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif @@ -192,7 +192,7 @@ void bootloader_munmap(const void *mapping) Cache_Read_Disable(0); Cache_Flush(0); mmu_init(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 //TODO, save the autoload value. Cache_Suspend_ICache(); Cache_Invalidate_ICache_All(); @@ -222,13 +222,13 @@ static esp_err_t bootloader_flash_read_no_decrypt(size_t src_addr, void *dest, s #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Disable(0); Cache_Flush(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uint32_t autoload = Cache_Suspend_ICache(); #endif esp_rom_spiflash_result_t r = esp_rom_spiflash_read(src_addr, dest, size); #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif @@ -248,21 +248,21 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Disable(0); Cache_Flush(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uint32_t autoload = Cache_Suspend_ICache(); Cache_Invalidate_ICache_All(); #endif ESP_LOGD(TAG, "mmu set block paddr=0x%08x (was 0x%08x)", map_at, current_read_mapping); #if CONFIG_IDF_TARGET_ESP32 int e = cache_flash_mmu_set(0, 0, FLASH_READ_VADDR, map_at, 64, 1); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0); #endif if (e != 0) { ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e); #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif return ESP_FAIL; @@ -270,7 +270,7 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest current_read_mapping = map_at; #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif } @@ -327,7 +327,7 @@ esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool if (write_encrypted) { #if CONFIG_IDF_TARGET_ESP32 return spi_to_esp_err(esp_rom_spiflash_write_encrypted(dest_addr, src, size)); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // TODO: use the same ROM AP here return spi_to_esp_err(SPI_Encrypt_Write(dest_addr, src, size)); #endif diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c similarity index 96% rename from components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c rename to components/bootloader_support/src/bootloader_flash_config_esp32s2.c index 32d8906612..89e948aedb 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c @@ -17,9 +17,9 @@ #include "sdkconfig.h" #include "esp_err.h" #include "esp_log.h" -#include "esp32s2beta/rom/gpio.h" -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/efuse.h" +#include "esp32s2/rom/gpio.h" +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/efuse.h" #include "soc/gpio_periph.h" #include "soc/efuse_reg.h" #include "soc/spi_reg.h" diff --git a/components/bootloader_support/src/bootloader_random.c b/components/bootloader_support/src/bootloader_random.c index 4b9fdcb99d..fe2c7e6c10 100644 --- a/components/bootloader_support/src/bootloader_random.c +++ b/components/bootloader_support/src/bootloader_random.c @@ -22,7 +22,7 @@ #include "soc/i2s_periph.h" #include "esp_log.h" #include "soc/io_mux_reg.h" -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #include "soc/apb_saradc_reg.h" #endif @@ -62,7 +62,7 @@ void bootloader_fill_random(void *buffer, size_t length) random ^= REG_READ(WDEV_RND_REG); RSR(CCOUNT, now); } while (now - start < 80 * 32 * 2); /* extra factor of 2 is precautionary */ -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // ToDo: Get random from register random = 12345678; #endif @@ -101,7 +101,7 @@ void bootloader_random_enable(void) #endif // BOOTLOADER_BUILD CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_FORCE_START_TOP); CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_START_TOP); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 /* Disable IO1 digital function for random function. */ PIN_INPUT_DISABLE(PERIPHS_IO_MUX_GPIO1_U); PIN_PULLDWN_DIS(PERIPHS_IO_MUX_GPIO1_U); @@ -126,7 +126,7 @@ void bootloader_random_enable(void) SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S); SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE); SET_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 WRITE_PERI_REG(APB_SARADC_SAR2_PATT_TAB1_REG, 0xADADADAD); WRITE_PERI_REG(APB_SARADC_SAR2_PATT_TAB2_REG, 0xADADADAD); WRITE_PERI_REG(APB_SARADC_SAR2_PATT_TAB3_REG, 0xADADADAD); @@ -145,7 +145,7 @@ void bootloader_random_enable(void) CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_SAR_SEL); SET_PERI_REG_BITS(I2S_SAMPLE_RATE_CONF_REG(0), I2S_RX_BCK_DIV_NUM, 20, I2S_RX_BCK_DIV_NUM_S); SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_TO_I2S); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 SET_PERI_REG_BITS(APB_SARADC_CTRL_REG, APB_SARADC_SAR_CLK_DIV, 4, APB_SARADC_SAR_CLK_DIV_S); SET_PERI_REG_BITS(APB_SARADC_FSM_REG, APB_SARADC_RSTB_WAIT, 8, APB_SARADC_RSTB_WAIT_S); /* was 1 */ SET_PERI_REG_BITS(APB_SARADC_CTRL_REG, APB_SARADC_WORK_MODE, 0, APB_SARADC_WORK_MODE_S); @@ -184,7 +184,7 @@ void bootloader_random_disable(void) #if CONFIG_IDF_TARGET_ESP32 CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE); CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE); #endif @@ -194,7 +194,7 @@ void bootloader_random_disable(void) CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX | SYSCON_SARADC_SAR_SEL | SYSCON_SARADC_DATA_TO_I2S); SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 CLEAR_PERI_REG_MASK(SENS_SAR_MEAS2_CTRL1_REG, SENS_SAR2_EN_TEST); CLEAR_PERI_REG_MASK(APB_SARADC_CTRL_REG, APB_SARADC_SAR_SEL | APB_SARADC_DATA_TO_I2S); SET_PERI_REG_BITS(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c index 88b675cb08..2b8c1497a4 100644 --- a/components/bootloader_support/src/bootloader_utility.c +++ b/components/bootloader_support/src/bootloader_utility.c @@ -29,16 +29,16 @@ #include "esp32/rom/uart.h" #include "esp32/rom/gpio.h" #include "esp32/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/efuse.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/crc.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/gpio.h" -#include "esp32s2beta/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/efuse.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/crc.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/gpio.h" +#include "esp32s2/rom/secure_boot.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #else @@ -679,7 +679,7 @@ static void set_cache_and_start_app( #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Disable(0); Cache_Flush(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uint32_t autoload = Cache_Suspend_ICache(); Cache_Invalidate_ICache_All(); #endif @@ -691,7 +691,7 @@ static void set_cache_and_start_app( for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) { DPORT_PRO_FLASH_MMU_TABLE[i] = DPORT_FLASH_MMU_TABLE_INVALID_VAL; } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 for (int i = 0; i < FLASH_MMU_TABLE_SIZE; i++) { FLASH_MMU_TABLE[i] = MMU_TABLE_INVALID_VAL; } @@ -702,7 +702,7 @@ static void set_cache_and_start_app( drom_addr & MMU_FLASH_MASK, drom_load_addr_aligned, drom_size, drom_page_count); #if CONFIG_IDF_TARGET_ESP32 rc = cache_flash_mmu_set(0, 0, drom_load_addr_aligned, drom_addr & MMU_FLASH_MASK, 64, drom_page_count); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 rc = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count, 0); #endif ESP_LOGV(TAG, "rc=%d", rc); @@ -716,7 +716,7 @@ static void set_cache_and_start_app( irom_addr & MMU_FLASH_MASK, irom_load_addr_aligned, irom_size, irom_page_count); #if CONFIG_IDF_TARGET_ESP32 rc = cache_flash_mmu_set(0, 0, irom_load_addr_aligned, irom_addr & MMU_FLASH_MASK, 64, irom_page_count); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uint32_t iram1_used = 0; if (irom_load_addr + irom_size > IRAM1_ADDRESS_LOW) { iram1_used = 1; @@ -740,12 +740,12 @@ static void set_cache_and_start_app( (DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) | (DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 | DPORT_APP_CACHE_MASK_DRAM1 ); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 REG_CLR_BIT( EXTMEM_PRO_ICACHE_CTRL1_REG, (EXTMEM_PRO_ICACHE_MASK_IRAM0) | (EXTMEM_PRO_ICACHE_MASK_IRAM1 & 0) | EXTMEM_PRO_ICACHE_MASK_DROM0 ); #endif #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Enable(0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(autoload); #endif // Application will need to do Cache_Flush(1) and Cache_Read_Enable(1) diff --git a/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c similarity index 97% rename from components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c rename to components/bootloader_support/src/esp32s2/bootloader_esp32s2.c index e0fa0ceb68..6ad4a675c2 100644 --- a/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c +++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c @@ -17,19 +17,19 @@ #include "soc/efuse_reg.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" -#include "esp32s2beta/rom/efuse.h" -#include "esp32s2beta/rom/gpio.h" -#include "esp32s2beta/rom/spi_flash.h" +#include "esp32s2/rom/efuse.h" +#include "esp32s2/rom/gpio.h" +#include "esp32s2/rom/spi_flash.h" #include "bootloader_init.h" #include "bootloader_clock.h" #include "bootloader_flash_config.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/uart.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/uart.h" #include "esp_attr.h" #include "esp_log.h" #include "esp_image_format.h" @@ -54,7 +54,7 @@ void bootloader_configure_spi_pins(int drv) uint8_t hd_gpio_num = SPI_HD_GPIO_NUM; uint8_t wp_gpio_num = SPI_WP_GPIO_NUM; if (spiconfig == 0) { - + } else { clk_gpio_num = spiconfig & 0x3f; q_gpio_num = (spiconfig >> 6) & 0x3f; diff --git a/components/bootloader_support/src/esp32s2beta/bootloader_sha.c b/components/bootloader_support/src/esp32s2/bootloader_sha.c similarity index 97% rename from components/bootloader_support/src/esp32s2beta/bootloader_sha.c rename to components/bootloader_support/src/esp32s2/bootloader_sha.c index bb6b97396d..e7dc5b0edc 100644 --- a/components/bootloader_support/src/esp32s2beta/bootloader_sha.c +++ b/components/bootloader_support/src/esp32s2/bootloader_sha.c @@ -17,7 +17,7 @@ #include #include -#include "esp32s2beta/rom/sha.h" +#include "esp32s2/rom/sha.h" static SHA_CTX ctx; diff --git a/components/bootloader_support/src/esp32s2beta/flash_encrypt.c b/components/bootloader_support/src/esp32s2/flash_encrypt.c similarity index 99% rename from components/bootloader_support/src/esp32s2beta/flash_encrypt.c rename to components/bootloader_support/src/esp32s2/flash_encrypt.c index 5afa4b7e6d..3e6309105a 100644 --- a/components/bootloader_support/src/esp32s2beta/flash_encrypt.c +++ b/components/bootloader_support/src/esp32s2/flash_encrypt.c @@ -22,9 +22,9 @@ #include "esp_flash_partitions.h" #include "esp_secure_boot.h" #include "esp_log.h" -#include "esp32s2beta/rom/secure_boot.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/efuse.h" +#include "esp32s2/rom/secure_boot.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/efuse.h" static const char *TAG = "flash_encrypt"; diff --git a/components/bootloader_support/src/esp32s2beta/secure_boot.c b/components/bootloader_support/src/esp32s2/secure_boot.c similarity index 97% rename from components/bootloader_support/src/esp32s2beta/secure_boot.c rename to components/bootloader_support/src/esp32s2/secure_boot.c index aac9405a07..f1d96c49a0 100644 --- a/components/bootloader_support/src/esp32s2beta/secure_boot.c +++ b/components/bootloader_support/src/esp32s2/secure_boot.c @@ -13,7 +13,7 @@ // limitations under the License. #include "esp_secure_boot.h" #include "esp_log.h" -#include "esp32s2beta/rom/secure_boot.h" +#include "esp32s2/rom/secure_boot.h" #define TAG "secure_boot" diff --git a/components/bootloader_support/src/esp32s2beta/secure_boot_signatures.c b/components/bootloader_support/src/esp32s2/secure_boot_signatures.c similarity index 98% rename from components/bootloader_support/src/esp32s2beta/secure_boot_signatures.c rename to components/bootloader_support/src/esp32s2/secure_boot_signatures.c index d553c1ee60..27d98340c2 100644 --- a/components/bootloader_support/src/esp32s2beta/secure_boot_signatures.c +++ b/components/bootloader_support/src/esp32s2/secure_boot_signatures.c @@ -17,7 +17,7 @@ #include "bootloader_sha.h" #include "esp_log.h" #include "esp_image_format.h" -#include "esp32s2beta/rom/secure_boot.h" +#include "esp32s2/rom/secure_boot.h" static const char* TAG = "secure_boot"; diff --git a/components/bootloader_support/src/esp_image_format.c b/components/bootloader_support/src/esp_image_format.c index 6d81f1633b..c9c63c49f3 100644 --- a/components/bootloader_support/src/esp_image_format.c +++ b/components/bootloader_support/src/esp_image_format.c @@ -26,9 +26,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/rtc.h" #include "esp32/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/secure_boot.h" #endif /* Checking signatures as part of verifying images is necessary: @@ -204,7 +204,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_ esptool.py may have rewritten the header - rely on esptool.py having verified the bootloader at flashing time, instead.) */ bool verify_sha; -#if CONFIG_SECURE_BOOT_ENABLED && CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_SECURE_BOOT_ENABLED && CONFIG_IDF_TARGET_ESP32S2 verify_sha = true; #else // ESP32, or ESP32S2 without secure boot enabled verify_sha = (data->start_addr != ESP_BOOTLOADER_OFFSET); @@ -638,7 +638,7 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han bootloader_munmap(simple_hash); } -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 // Pad to 4096 byte sector boundary if (end % FLASH_SECTOR_SIZE != 0) { uint32_t pad_len = FLASH_SECTOR_SIZE - (end % FLASH_SECTOR_SIZE); @@ -677,7 +677,7 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han return ESP_ERR_IMAGE_INVALID; } -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 // Adjust image length result to include the appended signature data->image_len = end - data->start_addr + sizeof(ets_secure_boot_signature_t); #endif diff --git a/components/bootloader_support/src/flash_qio_mode.c b/components/bootloader_support/src/flash_qio_mode.c index c777f1a5ca..94da524f9c 100644 --- a/components/bootloader_support/src/flash_qio_mode.c +++ b/components/bootloader_support/src/flash_qio_mode.c @@ -19,9 +19,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" #include "esp32/rom/efuse.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/efuse.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/efuse.h" #include "soc/spi_mem_struct.h" #endif #include "soc/spi_struct.h" @@ -33,7 +33,7 @@ /* SPI flash controller */ #if CONFIG_IDF_TARGET_ESP32 #define SPIFLASH SPI1 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define SPIFLASH SPIMEM1 #endif @@ -141,7 +141,7 @@ uint32_t bootloader_read_flash_id(void) return id; } -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #define FLASH_WRAP_CMD 0x77 typedef enum { FLASH_WRAP_MODE_8B = 0, @@ -212,7 +212,7 @@ void bootloader_enable_qio_mode(void) enable_qio_mode(chip_data[i].read_status_fn, chip_data[i].write_status_fn, chip_data[i].status_qio_bit); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 spi_flash_wrap_set(FLASH_WRAP_MODE_DISABLE); #endif } @@ -277,7 +277,7 @@ static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn, #if CONFIG_IDF_TARGET_ESP32 esp_rom_spiflash_select_qio_pins(CONFIG_BOOTLOADER_SPI_WP_PIN, spiconfig); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (ets_efuse_get_wp_pad() <= MAX_PAD_GPIO_NUM) { esp_rom_spiflash_select_qio_pins(ets_efuse_get_wp_pad(), spiconfig); } else { @@ -340,7 +340,7 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8 uint32_t old_ctrl_reg = SPIFLASH.ctrl.val; #if CONFIG_IDF_TARGET_ESP32 SPIFLASH.ctrl.val = SPI_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 SPIFLASH.ctrl.val = SPI_MEM_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode #endif SPIFLASH.user.usr_dummy = 0; @@ -352,13 +352,13 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8 SPIFLASH.user.usr_miso = miso_len > 0; #if CONFIG_IDF_TARGET_ESP32 SPIFLASH.miso_dlen.usr_miso_dbitlen = miso_len ? (miso_len - 1) : 0; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 SPIFLASH.miso_dlen.usr_miso_bit_len = miso_len ? (miso_len - 1) : 0; #endif SPIFLASH.user.usr_mosi = mosi_len > 0; #if CONFIG_IDF_TARGET_ESP32 SPIFLASH.mosi_dlen.usr_mosi_dbitlen = mosi_len ? (mosi_len - 1) : 0; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 SPIFLASH.mosi_dlen.usr_mosi_bit_len = mosi_len ? (mosi_len - 1) : 0; #endif SPIFLASH.data_buf[0] = mosi_data; diff --git a/components/bootloader_support/test/test_verify_image.c b/components/bootloader_support/test/test_verify_image.c index b4801ed936..fd6cef02ff 100644 --- a/components/bootloader_support/test/test_verify_image.c +++ b/components/bootloader_support/test/test_verify_image.c @@ -33,7 +33,7 @@ TEST_CASE("Verify bootloader image in flash", "[bootloader_support]") TEST_ASSERT_EQUAL(data.image_len, bootloader_length); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) TEST_CASE("Verify unit test app image", "[bootloader_support]") { esp_image_metadata_t data = { 0 }; diff --git a/components/driver/CMakeLists.txt b/components/driver/CMakeLists.txt index 5897471a67..8910e76a78 100644 --- a/components/driver/CMakeLists.txt +++ b/components/driver/CMakeLists.txt @@ -1,4 +1,4 @@ -set(srcs +set(srcs "adc.c" "can.c" "dac.c" @@ -34,11 +34,11 @@ if(IDF_TARGET STREQUAL "esp32") list(APPEND includes "esp32/include") endif() -if(IDF_TARGET STREQUAL "esp32s2beta") - list(APPEND srcs "esp32s2beta/rtc_tempsensor.c" - "esp32s2beta/touch_sensor.c") +if(IDF_TARGET STREQUAL "esp32s2") + list(APPEND srcs "esp32s2/rtc_tempsensor.c" + "esp32s2/touch_sensor.c") # currently only S2 beta has its own target-specific includes - list(APPEND includes "esp32s2beta/include") + list(APPEND includes "esp32s2/include") endif() idf_component_register(SRCS "${srcs}" diff --git a/components/driver/esp32s2beta/include/temp_sensor.h b/components/driver/esp32s2/include/temp_sensor.h similarity index 100% rename from components/driver/esp32s2beta/include/temp_sensor.h rename to components/driver/esp32s2/include/temp_sensor.h diff --git a/components/driver/esp32s2beta/include/touch_sensor.h b/components/driver/esp32s2/include/touch_sensor.h similarity index 100% rename from components/driver/esp32s2beta/include/touch_sensor.h rename to components/driver/esp32s2/include/touch_sensor.h diff --git a/components/driver/esp32s2beta/rtc_tempsensor.c b/components/driver/esp32s2/rtc_tempsensor.c similarity index 96% rename from components/driver/esp32s2beta/rtc_tempsensor.c rename to components/driver/esp32s2/rtc_tempsensor.c index 0f8d2a2d04..a947d667db 100644 --- a/components/driver/esp32s2beta/rtc_tempsensor.c +++ b/components/driver/esp32s2/rtc_tempsensor.c @@ -23,7 +23,7 @@ #include "soc/sens_reg.h" #include "soc/sens_struct.h" #include "temp_sensor.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" static const char *TAG = "tsens"; @@ -68,8 +68,8 @@ esp_err_t temp_sensor_set_config(temp_sensor_config_t tsens) SENS.sar_tctrl2.tsens_reset = 1;// Reset the temp sensor. SENS.sar_tctrl2.tsens_reset = 0;// Clear the reset status. ESP_LOGI(TAG, "Config temperature range [%d°C ~ %d°C], error < %d°C", - dac_offset[tsens.dac_offset].range_min, - dac_offset[tsens.dac_offset].range_max, + dac_offset[tsens.dac_offset].range_min, + dac_offset[tsens.dac_offset].range_max, dac_offset[tsens.dac_offset].error_max); return ESP_OK; } @@ -112,7 +112,7 @@ esp_err_t temp_sensor_stop(void) } esp_err_t temp_sensor_read_raw(uint32_t *tsens_out) -{ +{ TSENS_CHECK(tsens_out != NULL, ESP_ERR_INVALID_ARG); TSENS_CHECK(rtc_tsens_mux != NULL, ESP_ERR_INVALID_STATE); xSemaphoreTake(rtc_tsens_mux, portMAX_DELAY); @@ -141,4 +141,4 @@ esp_err_t temp_sensor_read_celsius(float *celsius) } } return ret; -} \ No newline at end of file +} diff --git a/components/driver/esp32s2beta/touch_sensor.c b/components/driver/esp32s2/touch_sensor.c similarity index 99% rename from components/driver/esp32s2beta/touch_sensor.c rename to components/driver/esp32s2/touch_sensor.c index 0108cd8862..317f973734 100644 --- a/components/driver/esp32s2beta/touch_sensor.c +++ b/components/driver/esp32s2/touch_sensor.c @@ -28,7 +28,7 @@ #include "driver/gpio.h" #include "sdkconfig.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" #include "hal/touch_sensor_types.h" #include "hal/touch_sensor_hal.h" @@ -267,7 +267,7 @@ esp_err_t touch_pad_filter_set_config(touch_filter_config_t *filter_info) TOUCH_ENTER_CRITICAL(); touch_hal_filter_set_config(filter_info); TOUCH_EXIT_CRITICAL(); - + return ESP_OK; } @@ -316,7 +316,7 @@ esp_err_t touch_pad_denoise_set_config(touch_pad_denoise_t *denoise) { TOUCH_CHECK(denoise->grade < TOUCH_PAD_DENOISE_MAX, TOUCH_PARAM_CHECK_STR("grade"), ESP_ERR_INVALID_ARG); TOUCH_CHECK(denoise->cap_level < TOUCH_PAD_DENOISE_CAP_MAX, TOUCH_PARAM_CHECK_STR("cap_level"), ESP_ERR_INVALID_ARG); - + const touch_hal_meas_mode_t meas = { .slope = TOUCH_PAD_SLOPE_DEFAULT, .tie_opt = TOUCH_PAD_TIE_OPT_DEFAULT, @@ -442,4 +442,4 @@ esp_err_t touch_pad_sleep_channel_read_proximity_cnt(uint32_t *approach_cnt) { touch_hal_sleep_read_proximity_cnt(approach_cnt); return ESP_OK; -} \ No newline at end of file +} diff --git a/components/driver/include/driver/adc.h b/components/driver/include/driver/adc.h index 17f73e4fa7..f3ad9d1d69 100644 --- a/components/driver/include/driver/adc.h +++ b/components/driver/include/driver/adc.h @@ -49,7 +49,7 @@ typedef enum { ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO35 (ESP32), GPIO8 (ESP32-S2) */ #if CONFIG_IDF_TARGET_ESP32 ADC1_CHANNEL_MAX, -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 ADC1_CHANNEL_8, /*!< ADC1 channel 6 is GPIO9 (ESP32-S2)*/ ADC1_CHANNEL_9, /*!< ADC1 channel 7 is GPIO10 (ESP32-S2) */ ADC1_CHANNEL_MAX, diff --git a/components/driver/include/driver/gpio.h b/components/driver/include/driver/gpio.h index 3b0f3967ab..270d738ada 100644 --- a/components/driver/include/driver/gpio.h +++ b/components/driver/include/driver/gpio.h @@ -24,8 +24,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/gpio.h" #endif #ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS diff --git a/components/driver/ledc.c b/components/driver/ledc.c index e084908e82..62d7ae7667 100644 --- a/components/driver/ledc.c +++ b/components/driver/ledc.c @@ -120,7 +120,7 @@ static uint32_t ledc_get_src_clk_freq(ledc_clk_cfg_t clk_cfg) src_clk_freq = LEDC_REF_CLK_HZ; } else if (clk_cfg == LEDC_USE_RTC8M_CLK) { src_clk_freq = s_ledc_slow_clk_8M; -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 } else if (clk_cfg == LEDC_USE_XTAL_CLK) { src_clk_freq = rtc_clk_xtal_freq_get() * 1000000; #endif @@ -284,7 +284,7 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n if ((speed_mode == LEDC_LOW_SPEED_MODE) && (clk_cfg == LEDC_USE_RTC8M_CLK)) { if(s_ledc_slow_clk_8M == 0) { if (ledc_slow_clk_calibrate() == false) { - goto error; + goto error; } } div_param = ( (uint64_t) s_ledc_slow_clk_8M << 8 ) / freq_hz / precision; diff --git a/components/driver/periph_ctrl.c b/components/driver/periph_ctrl.c index 2b7e561ff8..a32d57c543 100644 --- a/components/driver/periph_ctrl.c +++ b/components/driver/periph_ctrl.c @@ -66,7 +66,7 @@ static uint32_t get_clk_en_mask(periph_module_t periph) #if CONFIG_IDF_TARGET_ESP32 case PERIPH_UART2_MODULE: return DPORT_UART2_CLK_EN; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 case PERIPH_USB_MODULE: return DPORT_USB_CLK_EN; #endif @@ -105,7 +105,7 @@ static uint32_t get_clk_en_mask(periph_module_t periph) return DPORT_SPI3_CLK_EN; case PERIPH_SPI_DMA_MODULE: return DPORT_SPI_DMA_CLK_EN; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 case PERIPH_FSPI_MODULE: return DPORT_SPI2_CLK_EN; case PERIPH_HSPI_MODULE: @@ -130,7 +130,7 @@ static uint32_t get_clk_en_mask(periph_module_t periph) case PERIPH_WIFI_MODULE: #if CONFIG_IDF_TARGET_ESP32 return DPORT_WIFI_CLK_WIFI_EN_M; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 return 0; #endif case PERIPH_BT_MODULE: @@ -168,7 +168,7 @@ static uint32_t get_rst_en_mask(periph_module_t periph, bool enable) #if CONFIG_IDF_TARGET_ESP32 case PERIPH_UART2_MODULE: return DPORT_UART2_RST; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 case PERIPH_USB_MODULE: return DPORT_USB_RST; #endif @@ -207,7 +207,7 @@ static uint32_t get_rst_en_mask(periph_module_t periph, bool enable) return DPORT_SPI3_RST; case PERIPH_SPI_DMA_MODULE: return DPORT_SPI_DMA_RST; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 case PERIPH_FSPI_MODULE: return DPORT_SPI2_RST; case PERIPH_HSPI_MODULE: @@ -290,7 +290,7 @@ static uint32_t get_clk_en_reg(periph_module_t periph) if (periph == PERIPH_AES_MODULE || periph == PERIPH_SHA_MODULE || periph == PERIPH_RSA_MODULE) { return DPORT_PERI_CLK_EN_REG; } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if(periph == PERIPH_SPI_SHARED_DMA_MODULE) { return DPORT_PERIP_CLK_EN1_REG; } @@ -306,7 +306,7 @@ static uint32_t get_rst_en_reg(periph_module_t periph) if (periph == PERIPH_AES_MODULE || periph == PERIPH_SHA_MODULE || periph == PERIPH_RSA_MODULE) { return DPORT_PERI_RST_EN_REG; } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if(periph == PERIPH_SPI_SHARED_DMA_MODULE){ return DPORT_PERIP_CLK_EN1_REG; } diff --git a/components/driver/rtc_module.c b/components/driver/rtc_module.c index e0a160a2e1..fa84713495 100644 --- a/components/driver/rtc_module.c +++ b/components/driver/rtc_module.c @@ -31,8 +31,8 @@ #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #ifndef NDEBUG diff --git a/components/driver/spi_common.c b/components/driver/spi_common.c index 4792639a18..c0f204847d 100644 --- a/components/driver/spi_common.c +++ b/components/driver/spi_common.c @@ -105,7 +105,7 @@ int spicommon_irqdma_source_for_host(spi_host_device_t host) static inline uint32_t get_dma_periph(int dma_chan) { -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 if (dma_chan == 1) { return PERIPH_SPI2_DMA_MODULE; } else if (dma_chan==2) { @@ -135,7 +135,7 @@ bool spicommon_dma_chan_claim (int dma_chan) #if CONFIG_IDF_TARGET_ESP32 periph_module_enable(get_dma_periph(dma_chan)); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (dma_chan==1) { periph_module_enable(PERIPH_SPI2_DMA_MODULE); } else if (dma_chan==2) { @@ -167,7 +167,7 @@ bool spicommon_dma_chan_free(int dma_chan) //disable the DMA only when all the channels are freed. periph_module_disable(get_dma_periph(dma_chan)); } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (dma_chan==1) { periph_module_disable(PERIPH_SPI2_DMA_MODULE); } else if (dma_chan==2) { @@ -305,7 +305,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf gpio_set_direction(bus_config->mosi_io_num, GPIO_MODE_INPUT); } gpio_matrix_in(bus_config->mosi_io_num, spi_periph_signal[host].spid_in, false); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->mosi_io_num]); #endif PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], FUNC_GPIO); @@ -318,7 +318,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf gpio_set_direction(bus_config->miso_io_num, GPIO_MODE_INPUT); } gpio_matrix_in(bus_config->miso_io_num, spi_periph_signal[host].spiq_in, false); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->miso_io_num]); #endif PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->miso_io_num], FUNC_GPIO); @@ -327,7 +327,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf gpio_set_direction(bus_config->quadwp_io_num, GPIO_MODE_INPUT_OUTPUT); gpio_matrix_out(bus_config->quadwp_io_num, spi_periph_signal[host].spiwp_out, false, false); gpio_matrix_in(bus_config->quadwp_io_num, spi_periph_signal[host].spiwp_in, false); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num]); #endif PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], FUNC_GPIO); @@ -336,7 +336,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf gpio_set_direction(bus_config->quadhd_io_num, GPIO_MODE_INPUT_OUTPUT); gpio_matrix_out(bus_config->quadhd_io_num, spi_periph_signal[host].spihd_out, false, false); gpio_matrix_in(bus_config->quadhd_io_num, spi_periph_signal[host].spihd_in, false); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num]); #endif PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], FUNC_GPIO); @@ -349,7 +349,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf gpio_set_direction(bus_config->sclk_io_num, GPIO_MODE_INPUT); } gpio_matrix_in(bus_config->sclk_io_num, spi_periph_signal[host].spiclk_in, false); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->sclk_io_num]); #endif PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], FUNC_GPIO); @@ -388,7 +388,7 @@ void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_num, gpio_iomux_in(cs_io_num, spi_periph_signal[host].spics_in); #if CONFIG_IDF_TARGET_ESP32 gpio_iomux_out(cs_io_num, spi_periph_signal[host].func, false); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 gpio_iomux_out(cs_io_num, spi_periph_signal[host].func, false); #endif } else { diff --git a/components/driver/spi_master.c b/components/driver/spi_master.c index c5de80589e..3b06deb909 100644 --- a/components/driver/spi_master.c +++ b/components/driver/spi_master.c @@ -220,7 +220,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host, const spi_bus_config_t *bus SPI_CHECK(host>=SPI_HOST && host<=VSPI_HOST, "invalid host", ESP_ERR_INVALID_ARG); #ifdef CONFIG_IDF_TARGET_ESP32 SPI_CHECK( dma_chan >= 0 && dma_chan <= 2, "invalid dma channel", ESP_ERR_INVALID_ARG ); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 SPI_CHECK( dma_chan == 0 || dma_chan == host, "invalid dma channel", ESP_ERR_INVALID_ARG ); #endif SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG); diff --git a/components/driver/spi_slave.c b/components/driver/spi_slave.c index e8794149f6..61a709061e 100644 --- a/components/driver/spi_slave.c +++ b/components/driver/spi_slave.c @@ -105,7 +105,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b SPI_CHECK(VALID_HOST(host), "invalid host", ESP_ERR_INVALID_ARG); #if defined(CONFIG_IDF_TARGET_ESP32) SPI_CHECK( dma_chan >= 0 && dma_chan <= 2, "invalid dma channel", ESP_ERR_INVALID_ARG ); -#elif defined(CONFIG_IDF_TARGET_ESP32S2BETA) +#elif defined(CONFIG_IDF_TARGET_ESP32S2) SPI_CHECK( dma_chan == 0 || dma_chan == host, "invalid dma channel", ESP_ERR_INVALID_ARG ); #endif SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG); diff --git a/components/driver/test/include/test/test_common_spi.h b/components/driver/test/include/test/test_common_spi.h index 29521ba666..5c10115cfc 100644 --- a/components/driver/test/include/test/test_common_spi.h +++ b/components/driver/test/include/test/test_common_spi.h @@ -48,7 +48,7 @@ #define ESP_SPI_SLAVE_TV (12.5*3.5) #define WIRE_DELAY 12.5 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define TEST_SPI_HOST FSPI_HOST #define TEST_SLAVE_HOST HSPI_HOST diff --git a/components/driver/test/test_adc2.c b/components/driver/test/test_adc2.c index 8e423c4d1b..e7194b9f25 100644 --- a/components/driver/test/test_adc2.c +++ b/components/driver/test/test_adc2.c @@ -12,7 +12,7 @@ #include "nvs_flash.h" #include "test_utils.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static const char* TAG = "test_adc2"; diff --git a/components/driver/test/test_gpio.c b/components/driver/test/test_gpio.c index 4c27118b84..fd4948534b 100644 --- a/components/driver/test/test_gpio.c +++ b/components/driver/test/test_gpio.c @@ -16,8 +16,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/uart.h" #endif #define WAKE_UP_IGNORE 1 // gpio_wakeup function development is not completed yet, set it deprecated. @@ -25,7 +25,7 @@ #define GPIO_OUTPUT_IO 18 // default output GPIO #define GPIO_INPUT_IO 19 // default input GPIO #define GPIO_OUTPUT_MAX GPIO_NUM_34 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // ESP32_S2 DEVKIC uses IO19 and IO20 as USB functions, so it is necessary to avoid using IO19, otherwise GPIO io pull up/down function cannot pass #define GPIO_OUTPUT_IO 18 // default output GPIO #define GPIO_INPUT_IO 21 // default input GPIO @@ -55,7 +55,7 @@ static gpio_config_t init_io(gpio_num_t num) return io_conf; } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners // edge interrupt event static void gpio_isr_edge_handler(void* arg) @@ -169,7 +169,7 @@ TEST_CASE("GPIO config parameters test", "[gpio]") io_config.mode = GPIO_MODE_OUTPUT; // ESP32 34-39 input only, once set as output should log something TEST_ASSERT(gpio_config(&io_config) == ESP_ERR_INVALID_ARG); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 io_config.pin_bit_mask = (uint64_t)1<<26; TEST_ESP_OK(gpio_config(&io_config)); @@ -183,7 +183,7 @@ TEST_CASE("GPIO config parameters test", "[gpio]") } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners TEST_CASE("GPIO rising edge interrupt test", "[gpio][test_env=UT_T1_GPIO]") { @@ -375,7 +375,7 @@ TEST_CASE("GPIO enable and disable interrupt test", "[gpio][test_env=UT_T1_GPIO] TEST_ASSERT(gpio_isr_handler_add(GPIO_INPUT_IO, gpio_isr_level_handler, (void*) GPIO_INPUT_IO) == ESP_ERR_INVALID_STATE); TEST_ASSERT(gpio_isr_handler_remove(GPIO_INPUT_IO) == ESP_ERR_INVALID_STATE); } -#endif //DISABLED_FOR_TARGETS(ESP32S2BETA) +#endif //DISABLED_FOR_TARGETS(ESP32S2) // ESP32 Connect GPIO18 with GPIO19, ESP32-S2 Connect GPIO18 with GPIO21 // use multimeter to test the voltage, so it is ignored in CI @@ -408,7 +408,7 @@ TEST_CASE("GPIO set gpio output level test", "[gpio][ignore]") io_conf.mode = GPIO_MODE_OUTPUT; gpio_config(&io_conf); TEST_ASSERT(gpio_config(&io_conf) == ESP_ERR_INVALID_ARG); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 //ESP32-S2 IO46 are just used for input io_conf.pin_bit_mask = ((uint64_t)1<<46); io_conf.mode = GPIO_MODE_OUTPUT; @@ -463,7 +463,7 @@ TEST_CASE("GPIO io pull up/down function", "[gpio]") TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(GPIO_INPUT_IO), 0, "gpio_pullup_dis error, it can pull up"); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners TEST_CASE("GPIO output and input mode test", "[gpio][test_env=UT_T1_GPIO]") { @@ -537,7 +537,7 @@ TEST_CASE("GPIO repeate call service and isr has no memory leak test","[gpio][te } TEST_ASSERT_INT32_WITHIN(size, esp_get_free_heap_size(), 100); } -#endif //DISABLED_FOR_TARGETS(ESP32S2BETA) +#endif //DISABLED_FOR_TARGETS(ESP32S2) #if !WAKE_UP_IGNORE //this function development is not completed yet, set it ignored @@ -785,4 +785,4 @@ TEST_CASE("GPIO ISR service test", "[gpio][ignore]") TEST_ESP_OK(gpio_isr_handler_remove(test_io19)); gpio_uninstall_isr_service(); TEST_ASSERT((io18_param.isr_cnt == 1) && (io19_param.isr_cnt == 1)); -} \ No newline at end of file +} diff --git a/components/driver/test/test_i2c.c b/components/driver/test/test_i2c.c index 97d728e249..9e2245d232 100644 --- a/components/driver/test/test_i2c.c +++ b/components/driver/test/test_i2c.c @@ -242,7 +242,7 @@ TEST_CASE("I2C driver memory leaking check", "[i2c]") TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size()); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) // print the reading buffer static void disp_buf(uint8_t *buf, int len) @@ -372,7 +372,7 @@ static void slave_write_buffer_test(void) TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test); -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA, ESP32) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32) static void i2c_master_write_read_test(void) { uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH); @@ -513,8 +513,8 @@ static void i2c_slave_repeat_read(void) TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read); -#endif //DISABLED_FOR_TARGET(ESP32S2BETA, ESP32) -#endif //DISABLED_FOR_TARGET(ESP32S2BETA) +#endif //DISABLED_FOR_TARGET(ESP32S2, ESP32) +#endif //DISABLED_FOR_TARGET(ESP32S2) static volatile bool exit_flag; static bool test_read_func; @@ -679,4 +679,4 @@ TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]") i2c_scl_freq_cal(); free(data); TEST_ESP_OK(i2c_driver_delete(i2c_num)); -} \ No newline at end of file +} diff --git a/components/driver/test/test_i2s.c b/components/driver/test/test_i2s.c index 6000996a9b..01dab2aa99 100644 --- a/components/driver/test/test_i2s.c +++ b/components/driver/test/test_i2s.c @@ -21,7 +21,7 @@ #if CONFIG_IDF_TARGET_ESP32 #define MASTER_WS_IO 25 #define DATA_OUT_IO 22 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define MASTER_WS_IO 28 #define DATA_OUT_IO 20 #endif @@ -76,8 +76,8 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]") TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0)); } -#if !DISABLED_FOR_TARGETS(ESP32S2BETA) -/* ESP32S2BETA has only single I2S port and hence following test cases are not applicable */ +#if !DISABLED_FOR_TARGETS(ESP32S2) +/* ESP32S2 has only single I2S port and hence following test cases are not applicable */ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]") { diff --git a/components/driver/test/test_ledc.c b/components/driver/test/test_ledc.c index 929b270ad3..e390dde7af 100644 --- a/components/driver/test/test_ledc.c +++ b/components/driver/test/test_ledc.c @@ -138,7 +138,7 @@ TEST_CASE("LEDC error log channel and timer config", "[ledc][test_env=UT_T1_LEDC { #ifdef CONFIG_IDF_TARGET_ESP32 const ledc_mode_t test_speed_mode = LEDC_HIGH_SPEED_MODE; -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 const ledc_mode_t test_speed_mode = LEDC_LOW_SPEED_MODE; #endif //channel configuration test @@ -236,7 +236,7 @@ TEST_CASE("LEDC normal channel and timer config", "[ledc][test_env=UT_T1_LEDC]") // use all kinds of speed mode, channel, timer combination to test all of possible configuration #ifdef CONFIG_IDF_TARGET_ESP32 ledc_mode_t speed_mode[LEDC_SPEED_MODE_MAX] = {LEDC_HIGH_SPEED_MODE, LEDC_LOW_SPEED_MODE}; -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 ledc_mode_t speed_mode[LEDC_SPEED_MODE_MAX] = {LEDC_LOW_SPEED_MODE}; #endif ledc_channel_t channel_type[8] = {LEDC_CHANNEL_0, LEDC_CHANNEL_1, LEDC_CHANNEL_2, LEDC_CHANNEL_3, LEDC_CHANNEL_4, LEDC_CHANNEL_5, LEDC_CHANNEL_6, LEDC_CHANNEL_7}; @@ -262,7 +262,7 @@ TEST_CASE("LEDC normal channel and timer config", "[ledc][test_env=UT_T1_LEDC]") // set it ignore: need to debug TEST_CASE("LEDC set and get frequency", "[ledc][test_env=UT_T1_LEDC][timeout=60][ignore]") { -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) timer_frequency_test(LEDC_CHANNEL_0, LEDC_TIMER_13_BIT, LEDC_TIMER_0, LEDC_HIGH_SPEED_MODE); timer_frequency_test(LEDC_CHANNEL_0, LEDC_TIMER_13_BIT, LEDC_TIMER_1, LEDC_HIGH_SPEED_MODE); timer_frequency_test(LEDC_CHANNEL_0, LEDC_TIMER_13_BIT, LEDC_TIMER_2, LEDC_HIGH_SPEED_MODE); @@ -281,7 +281,7 @@ TEST_CASE("LEDC set and get dut(with logic analyzer)", "[ledc][ignore]") ledc_timer_t timer_list[4] = {LEDC_TIMER_0, LEDC_TIMER_1, LEDC_TIMER_2, LEDC_TIMER_3}; #ifdef CONFIG_IDF_TARGET_ESP32 ledc_mode_t speed_mode_list[LEDC_SPEED_MODE_MAX] = {LEDC_HIGH_SPEED_MODE, LEDC_LOW_SPEED_MODE}; -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 ledc_mode_t speed_mode_list[LEDC_SPEED_MODE_MAX] = {LEDC_LOW_SPEED_MODE}; #endif for(int i=0; i= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ } while (0); -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 #define TOUCH_CHANNEL_CHECK(channel) do { \ TOUCH_CHECK(channel < SOC_TOUCH_SENSOR_NUM && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ TOUCH_CHECK(channel != SOC_TOUCH_DENOISE_CHANNEL, "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); \ @@ -199,7 +199,7 @@ esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint16_t threshold) TOUCH_EXIT_CRITICAL(); return ESP_OK; } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint32_t threshold) { TOUCH_CHANNEL_CHECK(touch_num); @@ -219,7 +219,7 @@ esp_err_t touch_pad_get_thresh(touch_pad_t touch_num, uint16_t *threshold) touch_hal_get_threshold(touch_num, threshold); return ESP_OK; } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 esp_err_t touch_pad_get_thresh(touch_pad_t touch_num, uint32_t *threshold) { TOUCH_CHANNEL_CHECK(touch_num); diff --git a/components/driver/uart.c b/components/driver/uart.c index 3fe1862c7a..2fc8dbf0bb 100644 --- a/components/driver/uart.c +++ b/components/driver/uart.c @@ -32,8 +32,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif #ifdef CONFIG_UART_ISR_IN_IRAM @@ -481,7 +481,7 @@ esp_err_t uart_enable_pattern_det_baud_intr(uart_port_t uart_num, char pattern_c at_cmd.gap_tout = chr_tout * uart_div; at_cmd.pre_idle = pre_idle * uart_div; at_cmd.post_idle = post_idle * uart_div; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 at_cmd.gap_tout = chr_tout; at_cmd.pre_idle = pre_idle; at_cmd.post_idle = post_idle; diff --git a/components/efuse/Kconfig b/components/efuse/Kconfig index 21e80a4e0d..5b5544cc71 100644 --- a/components/efuse/Kconfig +++ b/components/efuse/Kconfig @@ -42,6 +42,6 @@ menu "eFuse Bit Manager" default 256 if EFUSE_CODE_SCHEME_COMPAT_NONE default 192 if EFUSE_CODE_SCHEME_COMPAT_3_4 default 128 if EFUSE_CODE_SCHEME_COMPAT_REPEAT - default 256 if IDF_TARGET_ESP32S2BETA + default 256 if IDF_TARGET_ESP32S2 endmenu diff --git a/components/efuse/efuse_table_gen.py b/components/efuse/efuse_table_gen.py index a5a8e52c98..6fcc35a470 100755 --- a/components/efuse/efuse_table_gen.py +++ b/components/efuse/efuse_table_gen.py @@ -354,7 +354,7 @@ class FuseDefinition(object): if strval not in ["EFUSE_BLK0", "EFUSE_BLK1", "EFUSE_BLK2", "EFUSE_BLK3"]: raise InputError("Field 'efuse_block' should be one of EFUSE_BLK0..EFUSE_BLK3") - if idf_target == "esp32s2beta": + if idf_target == "esp32s2": if strval not in ["EFUSE_BLK0", "EFUSE_BLK1", "EFUSE_BLK2", "EFUSE_BLK3", "EFUSE_BLK4", "EFUSE_BLK5", "EFUSE_BLK6", "EFUSE_BLK7", "EFUSE_BLK8", "EFUSE_BLK9", "EFUSE_BLK10"]: @@ -463,7 +463,7 @@ def main(): global idf_target parser = argparse.ArgumentParser(description='ESP32 eFuse Manager') - parser.add_argument('--idf_target', '-t', help='Target chip type', choices=['esp32','esp32s2beta'], default='esp32') + parser.add_argument('--idf_target', '-t', help='Target chip type', choices=['esp32','esp32s2'], default='esp32') parser.add_argument('--quiet', '-q', help="Don't print non-critical status messages to stderr", action='store_true') parser.add_argument('--debug', help='Create header file with debug info', default=False, action="store_false") parser.add_argument('--info', help='Print info about range of used bits', default=False, action="store_true") diff --git a/components/efuse/esp32s2beta/component.mk b/components/efuse/esp32s2/component.mk similarity index 100% rename from components/efuse/esp32s2beta/component.mk rename to components/efuse/esp32s2/component.mk diff --git a/components/efuse/esp32s2beta/esp_efuse_table.c b/components/efuse/esp32s2/esp_efuse_table.c similarity index 100% rename from components/efuse/esp32s2beta/esp_efuse_table.c rename to components/efuse/esp32s2/esp_efuse_table.c diff --git a/components/efuse/esp32s2beta/esp_efuse_table.csv b/components/efuse/esp32s2/esp_efuse_table.csv similarity index 100% rename from components/efuse/esp32s2beta/esp_efuse_table.csv rename to components/efuse/esp32s2/esp_efuse_table.csv diff --git a/components/efuse/esp32s2beta/include/esp_efuse_table.h b/components/efuse/esp32s2/include/esp_efuse_table.h similarity index 100% rename from components/efuse/esp32s2beta/include/esp_efuse_table.h rename to components/efuse/esp32s2/include/esp_efuse_table.h diff --git a/components/efuse/esp32s2beta/sources.cmake b/components/efuse/esp32s2/sources.cmake similarity index 100% rename from components/efuse/esp32s2beta/sources.cmake rename to components/efuse/esp32s2/sources.cmake diff --git a/components/efuse/include/esp32s2beta/esp_efuse.h b/components/efuse/include/esp32s2/esp_efuse.h similarity index 98% rename from components/efuse/include/esp32s2beta/esp_efuse.h rename to components/efuse/include/esp32s2/esp_efuse.h index 94fbb21686..52e86e921e 100644 --- a/components/efuse/include/esp32s2beta/esp_efuse.h +++ b/components/efuse/include/esp32s2/esp_efuse.h @@ -19,7 +19,7 @@ extern "C" { #endif /** - * @brief Type of eFuse blocks ESP32S2BETA + * @brief Type of eFuse blocks ESP32S2 */ typedef enum { EFUSE_BLK0 = 0, /**< Number of eFuse BLOCK0. REPEAT_DATA */ diff --git a/components/efuse/include/esp_efuse.h b/components/efuse/include/esp_efuse.h index 789c00c4dc..aa20bf6c15 100644 --- a/components/efuse/include/esp_efuse.h +++ b/components/efuse/include/esp_efuse.h @@ -24,8 +24,8 @@ extern "C" { #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/esp_efuse.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/esp_efuse.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/esp_efuse.h" #endif #define ESP_ERR_EFUSE 0x1600 /*!< Base error code for efuse api. */ diff --git a/components/efuse/private_include/esp32s2beta/esp_efuse_utility.h b/components/efuse/private_include/esp32s2/esp_efuse_utility.h similarity index 100% rename from components/efuse/private_include/esp32s2beta/esp_efuse_utility.h rename to components/efuse/private_include/esp32s2/esp_efuse_utility.h diff --git a/components/efuse/private_include/esp_efuse_utility.h b/components/efuse/private_include/esp_efuse_utility.h index c6b2e691a7..ad45fae0aa 100644 --- a/components/efuse/private_include/esp_efuse_utility.h +++ b/components/efuse/private_include/esp_efuse_utility.h @@ -25,8 +25,8 @@ extern "C" { #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/esp_efuse_utility.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/esp_efuse_utility.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/esp_efuse_utility.h" #endif /** diff --git a/components/efuse/src/esp32s2beta/esp_efuse_api.c b/components/efuse/src/esp32s2/esp_efuse_api.c similarity index 100% rename from components/efuse/src/esp32s2beta/esp_efuse_api.c rename to components/efuse/src/esp32s2/esp_efuse_api.c diff --git a/components/efuse/src/esp32s2beta/esp_efuse_fields.c b/components/efuse/src/esp32s2/esp_efuse_fields.c similarity index 94% rename from components/efuse/src/esp32s2beta/esp_efuse_fields.c rename to components/efuse/src/esp32s2/esp_efuse_fields.c index 9d69271f07..6299fb31e8 100644 --- a/components/efuse/src/esp32s2beta/esp_efuse_fields.c +++ b/components/efuse/src/esp32s2/esp_efuse_fields.c @@ -17,7 +17,7 @@ #include "esp_efuse_table.h" #include "stdlib.h" #include "esp_types.h" -#include "esp32s2beta/rom/efuse.h" +#include "esp32s2/rom/efuse.h" #include "assert.h" #include "esp_err.h" #include "esp_log.h" @@ -33,7 +33,7 @@ const static char *TAG = "efuse"; uint8_t esp_efuse_get_chip_ver(void) { uint32_t chip_ver = 0; - // TODO: ESP32S2BETA does not have this field + // TODO: ESP32S2 does not have this field return chip_ver; } @@ -41,7 +41,7 @@ uint8_t esp_efuse_get_chip_ver(void) uint32_t esp_efuse_get_pkg_ver(void) { uint32_t pkg_ver = 0; - // TODO: ESP32S2BETA does not have this field + // TODO: ESP32S2 does not have this field return pkg_ver; } diff --git a/components/efuse/src/esp32s2beta/esp_efuse_utility.c b/components/efuse/src/esp32s2/esp_efuse_utility.c similarity index 99% rename from components/efuse/src/esp32s2beta/esp_efuse_utility.c rename to components/efuse/src/esp32s2/esp_efuse_utility.c index e1e238da1e..c4320b2832 100644 --- a/components/efuse/src/esp32s2beta/esp_efuse_utility.c +++ b/components/efuse/src/esp32s2/esp_efuse_utility.c @@ -14,12 +14,12 @@ #include "esp_efuse_utility.h" #include "soc/efuse_periph.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_log.h" #include "assert.h" #include "sdkconfig.h" #include -#include "esp32s2beta/rom/efuse.h" +#include "esp32s2/rom/efuse.h" static const char *TAG = "efuse"; diff --git a/components/efuse/src/esp_efuse_fields.c b/components/efuse/src/esp_efuse_fields.c index 8d1fcf36f2..eb76264cd0 100644 --- a/components/efuse/src/esp_efuse_fields.c +++ b/components/efuse/src/esp_efuse_fields.c @@ -28,8 +28,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/efuse.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/efuse.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/efuse.h" #endif // Permanently update values written to the efuse write registers diff --git a/components/efuse/test/test_efuse.c b/components/efuse/test/test_efuse.c index a422352bb4..0960ff1dde 100644 --- a/components/efuse/test/test_efuse.c +++ b/components/efuse/test/test_efuse.c @@ -34,7 +34,7 @@ static void test_read_blob(void) TEST_ASSERT_EQUAL_INT(sizeof(mac) * 8, esp_efuse_get_field_size(ESP_EFUSE_MAC_FACTORY)); ESP_LOGI(TAG, "MAC: %02x:%02x:%02x:%02x:%02x:%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) ESP_LOGI(TAG, "2. Check CRC by MAC"); uint8_t crc; TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY_CRC, &crc, 8)); @@ -510,7 +510,7 @@ TEST_CASE("Test esp_efuse_read_block esp_efuse_write_block functions", "[efuse]" printf("EFUSE_CODING_SCHEME_REPEAT\n"); count_useful_reg = 4; } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (coding_scheme == EFUSE_CODING_SCHEME_RS) { printf("EFUSE_CODING_SCHEME_RS\n"); count_useful_reg = 8; @@ -573,7 +573,7 @@ TEST_CASE("Test Bits are not empty. Write operation is forbidden", "[efuse]") printf("EFUSE_CODING_SCHEME_REPEAT\n"); count_useful_reg = 4; } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (coding_scheme == EFUSE_CODING_SCHEME_RS) { printf("EFUSE_CODING_SCHEME_RS\n"); if (num_block == EFUSE_BLK1) { @@ -741,7 +741,7 @@ TEST_CASE("Test a write/read protection", "[efuse]") test_rp(EFUSE_BLK1, ESP_EFUSE_RD_DIS_BLK1, true); test_rp(EFUSE_BLK2, ESP_EFUSE_RD_DIS_BLK2, false); test_rp(EFUSE_BLK3, ESP_EFUSE_RD_DIS_BLK3, false); -#elif defined(CONFIG_IDF_TARGET_ESP32S2BETA) +#elif defined(CONFIG_IDF_TARGET_ESP32S2) test_wp(EFUSE_BLK2, ESP_EFUSE_WR_DIS_SYS_DATA_PART1); test_wp(EFUSE_BLK3, ESP_EFUSE_WR_DIS_USER_DATA); diff --git a/components/efuse/test/test_efuse_coding_scheme.c b/components/efuse/test/test_efuse_coding_scheme.c index 222308c945..c334fa4b38 100644 --- a/components/efuse/test/test_efuse_coding_scheme.c +++ b/components/efuse/test/test_efuse_coding_scheme.c @@ -11,7 +11,7 @@ typedef struct { uint32_t encoded[8]; } coding_scheme_test_t; -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) /* Randomly generated byte strings, encoded and written to ESP32 using espefuse algorithm, then verified to have no encoding errors and correct readback. diff --git a/components/esp32/test/test_intr_alloc.c b/components/esp32/test/test_intr_alloc.c index 255ca52cba..a477c543c1 100644 --- a/components/esp32/test/test_intr_alloc.c +++ b/components/esp32/test/test_intr_alloc.c @@ -6,8 +6,8 @@ #include #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/esp32s2beta/CMakeLists.txt b/components/esp32s2/CMakeLists.txt similarity index 69% rename from components/esp32s2beta/CMakeLists.txt rename to components/esp32s2/CMakeLists.txt index d32575be89..1f5a52ed27 100644 --- a/components/esp32s2beta/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -1,13 +1,13 @@ idf_build_get_property(target IDF_TARGET) idf_build_get_property(sdkconfig_header SDKCONFIG_HEADER) -if(NOT "${target}" STREQUAL "esp32s2beta") +if(NOT "${target}" STREQUAL "esp32s2") return() endif() if(BOOTLOADER_BUILD) - # For bootloader, all we need from esp32s2beta is headers + # For bootloader, all we need from esp32s2 is headers idf_component_register(INCLUDE_DIRS include) - target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s2beta.peripherals.ld") + target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s2.peripherals.ld") else() # Regular app build @@ -18,18 +18,18 @@ else() "crosscore_int.c" "dport_access.c" "dport_panic_highint_hdl.S" - "esp_timer_esp32s2beta.c" + "esp_timer_esp32s2.c" "hw_random.c" "int_wdt.c" "intr_alloc.c" "panic.c" - "pm_esp32s2beta.c" + "pm_esp32s2.c" "pm_trace.c" "reset_reason.c" "sleep_modes.c" "spiram.c" "spiram_psram.c" - "system_api_esp32s2beta.c" + "system_api_esp32s2.c" "task_wdt.c") set(include_dirs "include") @@ -41,25 +41,25 @@ else() app_trace app_update bootloader_support log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common) - set(fragments linker.lf ld/esp32s2beta_fragments.lf) + set(fragments linker.lf ld/esp32s2_fragments.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" LDFRAGMENTS "${fragments}" REQUIRES "${requires}" PRIV_REQUIRES "${priv_requires}" - REQUIRED_IDF_TARGETS esp32s2beta) + REQUIRED_IDF_TARGETS esp32s2) - target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp32s2beta_out.ld") + target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp32s2_out.ld") # Rely on user code to define app_main target_link_libraries(${COMPONENT_LIB} INTERFACE "-u app_main") # Process the template file through the linker script generation mechanism, and use the output for linking the # final binary - target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32s2beta.project.ld.in" PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32s2beta.project.ld") + target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32s2.project.ld.in" PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32s2.project.ld") - target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s2beta.peripherals.ld") + target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s2.peripherals.ld") target_link_libraries(${COMPONENT_LIB} PUBLIC gcc) target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0") @@ -69,17 +69,17 @@ else() target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_panic_highint_hdl") idf_build_get_property(config_dir CONFIG_DIR) - # Preprocess esp32s2beta.ld linker script to include configuration, becomes esp32s2beta_out.ld + # Preprocess esp32s2.ld linker script to include configuration, becomes esp32s2_out.ld set(LD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/ld) add_custom_command( - OUTPUT esp32s2beta_out.ld - COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o esp32s2beta_out.ld -I ${config_dir} ${LD_DIR}/esp32s2beta.ld - MAIN_DEPENDENCY ${LD_DIR}/esp32s2beta.ld ${sdkconfig_header} + OUTPUT esp32s2_out.ld + COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o esp32s2_out.ld -I ${config_dir} ${LD_DIR}/esp32s2.ld + MAIN_DEPENDENCY ${LD_DIR}/esp32s2.ld ${sdkconfig_header} COMMENT "Generating linker script..." VERBATIM) - add_custom_target(esp32s2beta_linker_script DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/esp32s2beta_out.ld) - add_dependencies(${COMPONENT_LIB} esp32s2beta_linker_script) + add_custom_target(esp32s2_linker_script DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/esp32s2_out.ld) + add_dependencies(${COMPONENT_LIB} esp32s2_linker_script) # disable stack protection in files which are involved in initialization of that feature set_source_files_properties( diff --git a/components/esp32s2beta/Kconfig b/components/esp32s2/Kconfig similarity index 98% rename from components/esp32s2beta/Kconfig rename to components/esp32s2/Kconfig index cc68c99058..ea4fb2f0e1 100644 --- a/components/esp32s2beta/Kconfig +++ b/components/esp32s2/Kconfig @@ -2,14 +2,14 @@ menu "ESP32S2-specific" # TODO: this component simply shouldn't be included # in the build at the CMake level, but this is currently # not working so we just hide all items here - visible if IDF_TARGET_ESP32S2BETA + visible if IDF_TARGET_ESP32S2 - choice ESP32S2_BETA_CHIP_VERSION + choice ESP32S2_CHIP_VERSION # TODO: remove once final S2 chip is supported - prompt "ESP32-S2 Beta chip version" - default ESP32S2_BETA_VERSION_A + prompt "ESP32-S2 chip version" + default ESP32S2_VERSION_A help - There are three versions of ESP32-S2 beta chip with different Wi-Fi PHY: A, B and Marlin3. + There are three versions of ESP32-S2 chip with different Wi-Fi PHY: A, B and Marlin3. This setting must match the chip for Wi-Fi to work correctly. You can determine the chip version by reading the markings on top of the chip. It will be one of the @@ -17,11 +17,11 @@ menu "ESP32S2-specific" The Wi-Fi performance of Marlin3 is the best among the three versions of chip. - config ESP32S2_BETA_VERSION_A + config ESP32S2_VERSION_A bool "Chip7.2.2-A" - config ESP32S2_BETA_VERSION_B + config ESP32S2_VERSION_B bool "Chip7.2.2-B" - config ESP32S2_BETA_VERSION_MARLIN3 + config ESP32S2_VERSION_MARLIN3 bool "Marlin3-B2 or Marlin3-B3" endchoice @@ -504,7 +504,7 @@ menu "Power Management" # TODO: this component simply shouldn't be included # in the build at the CMake level, but this is currently # not working so we just hide all items here - visible if IDF_TARGET_ESP32S2BETA + visible if IDF_TARGET_ESP32S2 config PM_ENABLE bool "Support for power management" diff --git a/components/esp32s2/Makefile.projbuild b/components/esp32s2/Makefile.projbuild new file mode 100644 index 0000000000..2c25e51a75 --- /dev/null +++ b/components/esp32s2/Makefile.projbuild @@ -0,0 +1 @@ +# nothing here, esp32s2 is not suppoted in Make build system \ No newline at end of file diff --git a/components/esp32s2beta/brownout.c b/components/esp32s2/brownout.c similarity index 94% rename from components/esp32s2beta/brownout.c rename to components/esp32s2/brownout.c index 5257e1820c..986ed73077 100644 --- a/components/esp32s2beta/brownout.c +++ b/components/esp32s2/brownout.c @@ -20,7 +20,7 @@ #include "soc/soc.h" #include "soc/cpu.h" #include "soc/rtc_cntl_reg.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" #include "esp_private/system_internal.h" #include "driver/rtc_cntl.h" #include "freertos/FreeRTOS.h" @@ -48,7 +48,7 @@ static void rtc_brownout_isr_handler(void *arg) void esp_brownout_init(void) { -// TODO: implement brownout threshold configuration for esp32s2beta - IDF-751 +// TODO: implement brownout threshold configuration for esp32s2 - IDF-751 ESP_ERROR_CHECK( rtc_isr_register(rtc_brownout_isr_handler, NULL, RTC_CNTL_BROWN_OUT_INT_ENA_M) ); diff --git a/components/esp32s2beta/cache_err_int.c b/components/esp32s2/cache_err_int.c similarity index 98% rename from components/esp32s2beta/cache_err_int.c rename to components/esp32s2/cache_err_int.c index 84ade820e4..ab7328456e 100644 --- a/components/esp32s2beta/cache_err_int.c +++ b/components/esp32s2/cache_err_int.c @@ -31,7 +31,7 @@ #include "soc/dport_reg.h" #include "soc/periph_defs.h" #include "sdkconfig.h" -#include "esp32s2beta/dport_access.h" +#include "esp32s2/dport_access.h" void esp_cache_err_int_init(void) { diff --git a/components/esp32s2beta/clk.c b/components/esp32s2/clk.c similarity index 98% rename from components/esp32s2beta/clk.c rename to components/esp32s2/clk.c index 94e8578e26..5b579db228 100644 --- a/components/esp32s2beta/clk.c +++ b/components/esp32s2/clk.c @@ -19,11 +19,11 @@ #include "sdkconfig.h" #include "esp_attr.h" #include "esp_log.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_clk_internal.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/rtc.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/rtc.h" #include "soc/system_reg.h" #include "soc/dport_access.h" #include "soc/soc.h" diff --git a/components/esp32s2beta/component.mk b/components/esp32s2/component.mk similarity index 100% rename from components/esp32s2beta/component.mk rename to components/esp32s2/component.mk diff --git a/components/esp32s2beta/cpu_start.c b/components/esp32s2/cpu_start.c similarity index 97% rename from components/esp32s2beta/cpu_start.c rename to components/esp32s2/cpu_start.c index 024793fc5c..29fe77d12e 100644 --- a/components/esp32s2beta/cpu_start.c +++ b/components/esp32s2/cpu_start.c @@ -18,14 +18,14 @@ #include "esp_attr.h" #include "esp_err.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/dport_access.h" -#include "esp32s2beta/brownout.h" -#include "esp32s2beta/cache_err_int.h" -#include "esp32s2beta/spiram.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/dport_access.h" +#include "esp32s2/brownout.h" +#include "esp32s2/cache_err_int.h" +#include "esp32s2/spiram.h" #include "soc/cpu.h" #include "soc/rtc.h" diff --git a/components/esp32s2beta/crosscore_int.c b/components/esp32s2/crosscore_int.c similarity index 97% rename from components/esp32s2beta/crosscore_int.c rename to components/esp32s2/crosscore_int.c index f1e24ca285..72c3b06666 100644 --- a/components/esp32s2beta/crosscore_int.c +++ b/components/esp32s2/crosscore_int.c @@ -18,8 +18,8 @@ #include "esp_err.h" #include "esp_intr_alloc.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/uart.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/uart.h" #include "soc/cpu.h" #include "soc/dport_reg.h" diff --git a/components/esp32s2beta/dport_access.c b/components/esp32s2/dport_access.c similarity index 100% rename from components/esp32s2beta/dport_access.c rename to components/esp32s2/dport_access.c diff --git a/components/esp32s2beta/dport_panic_highint_hdl.S b/components/esp32s2/dport_panic_highint_hdl.S similarity index 100% rename from components/esp32s2beta/dport_panic_highint_hdl.S rename to components/esp32s2/dport_panic_highint_hdl.S diff --git a/components/esp32s2beta/esp_clk_internal.h b/components/esp32s2/esp_clk_internal.h similarity index 100% rename from components/esp32s2beta/esp_clk_internal.h rename to components/esp32s2/esp_clk_internal.h diff --git a/components/esp32s2beta/esp_timer_esp32s2beta.c b/components/esp32s2/esp_timer_esp32s2.c similarity index 99% rename from components/esp32s2beta/esp_timer_esp32s2beta.c rename to components/esp32s2/esp_timer_esp32s2.c index 82be232e73..d5637b5623 100644 --- a/components/esp32s2beta/esp_timer_esp32s2beta.c +++ b/components/esp32s2/esp_timer_esp32s2.c @@ -19,7 +19,7 @@ #include "esp_attr.h" #include "esp_intr_alloc.h" #include "esp_log.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_private/esp_timer_impl.h" #include "soc/frc_timer_reg.h" #include "soc/rtc.h" diff --git a/components/esp32s2beta/hw_random.c b/components/esp32s2/hw_random.c similarity index 98% rename from components/esp32s2beta/hw_random.c rename to components/esp32s2/hw_random.c index b2c6418491..3342950925 100644 --- a/components/esp32s2beta/hw_random.c +++ b/components/esp32s2/hw_random.c @@ -18,7 +18,7 @@ #include #include #include "esp_attr.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "soc/wdev_reg.h" #include "freertos/FreeRTOSConfig.h" #include "xtensa/core-macros.h" diff --git a/components/esp32s2beta/include/esp32s2beta/brownout.h b/components/esp32s2/include/esp32s2/brownout.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/brownout.h rename to components/esp32s2/include/esp32s2/brownout.h diff --git a/components/esp32s2beta/include/esp32s2beta/cache_err_int.h b/components/esp32s2/include/esp32s2/cache_err_int.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/cache_err_int.h rename to components/esp32s2/include/esp32s2/cache_err_int.h diff --git a/components/esp32s2beta/include/esp32s2beta/clk.h b/components/esp32s2/include/esp32s2/clk.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/clk.h rename to components/esp32s2/include/esp32s2/clk.h diff --git a/components/esp32s2beta/include/esp32s2beta/dport_access.h b/components/esp32s2/include/esp32s2/dport_access.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/dport_access.h rename to components/esp32s2/include/esp32s2/dport_access.h diff --git a/components/esp32s2beta/include/esp32s2beta/pm.h b/components/esp32s2/include/esp32s2/pm.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/pm.h rename to components/esp32s2/include/esp32s2/pm.h diff --git a/components/esp32s2beta/include/esp32s2beta/spiram.h b/components/esp32s2/include/esp32s2/spiram.h similarity index 100% rename from components/esp32s2beta/include/esp32s2beta/spiram.h rename to components/esp32s2/include/esp32s2/spiram.h diff --git a/components/esp32s2beta/include/esp_clk.h b/components/esp32s2/include/esp_clk.h similarity index 100% rename from components/esp32s2beta/include/esp_clk.h rename to components/esp32s2/include/esp_clk.h diff --git a/components/esp32s2beta/include/esp_intr.h b/components/esp32s2/include/esp_intr.h similarity index 98% rename from components/esp32s2beta/include/esp_intr.h rename to components/esp32s2/include/esp_intr.h index 6710e3c166..ea36d0de36 100644 --- a/components/esp32s2beta/include/esp_intr.h +++ b/components/esp32s2/include/esp_intr.h @@ -15,7 +15,7 @@ #ifndef __ESP_INTR_H__ #define __ESP_INTR_H__ -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" #include "freertos/xtensa_api.h" #ifdef __cplusplus diff --git a/components/esp32s2beta/include/esp_intr_alloc.h b/components/esp32s2/include/esp_intr_alloc.h similarity index 100% rename from components/esp32s2beta/include/esp_intr_alloc.h rename to components/esp32s2/include/esp_intr_alloc.h diff --git a/components/esp32s2beta/include/esp_sleep.h b/components/esp32s2/include/esp_sleep.h similarity index 100% rename from components/esp32s2beta/include/esp_sleep.h rename to components/esp32s2/include/esp_sleep.h diff --git a/components/esp32s2beta/include/esp_spiram.h b/components/esp32s2/include/esp_spiram.h similarity index 100% rename from components/esp32s2beta/include/esp_spiram.h rename to components/esp32s2/include/esp_spiram.h diff --git a/components/esp32s2beta/include/esp_ssc.h b/components/esp32s2/include/esp_ssc.h similarity index 100% rename from components/esp32s2beta/include/esp_ssc.h rename to components/esp32s2/include/esp_ssc.h diff --git a/components/esp32s2beta/int_wdt.c b/components/esp32s2/int_wdt.c similarity index 100% rename from components/esp32s2beta/int_wdt.c rename to components/esp32s2/int_wdt.c diff --git a/components/esp32s2beta/intr_alloc.c b/components/esp32s2/intr_alloc.c similarity index 100% rename from components/esp32s2beta/intr_alloc.c rename to components/esp32s2/intr_alloc.c diff --git a/components/esp32s2beta/ld/esp32s2beta.ld b/components/esp32s2/ld/esp32s2.ld similarity index 99% rename from components/esp32s2beta/ld/esp32s2beta.ld rename to components/esp32s2/ld/esp32s2.ld index 4b55693d17..34b5adfcb1 100644 --- a/components/esp32s2beta/ld/esp32s2beta.ld +++ b/components/esp32s2/ld/esp32s2.ld @@ -95,7 +95,7 @@ _data_seg_org = ORIGIN(rtc_data_seg); /* The lines below define location alias for .rtc.data section based on Kconfig option. When the option is not defined then use slow memory segment else the data will be placed in fast memory segment - TODO: check whether the rtc_data_location is correct for esp32s2beta - IDF-761 */ + TODO: check whether the rtc_data_location is correct for esp32s2 - IDF-761 */ #ifndef CONFIG_ESP32_RTCDATA_IN_FAST_MEM REGION_ALIAS("rtc_data_location", rtc_slow_seg ); #else diff --git a/components/esp32s2beta/ld/esp32s2beta.peripherals.ld b/components/esp32s2/ld/esp32s2.peripherals.ld similarity index 100% rename from components/esp32s2beta/ld/esp32s2beta.peripherals.ld rename to components/esp32s2/ld/esp32s2.peripherals.ld diff --git a/components/esp32s2beta/ld/esp32s2beta.project.ld.in b/components/esp32s2/ld/esp32s2.project.ld.in similarity index 100% rename from components/esp32s2beta/ld/esp32s2beta.project.ld.in rename to components/esp32s2/ld/esp32s2.project.ld.in diff --git a/components/esp32s2beta/ld/esp32s2beta_fragments.lf b/components/esp32s2/ld/esp32s2_fragments.lf similarity index 100% rename from components/esp32s2beta/ld/esp32s2beta_fragments.lf rename to components/esp32s2/ld/esp32s2_fragments.lf diff --git a/components/esp32s2beta/linker.lf b/components/esp32s2/linker.lf similarity index 76% rename from components/esp32s2beta/linker.lf rename to components/esp32s2/linker.lf index b0d99f2211..80ed1158e0 100644 --- a/components/esp32s2beta/linker.lf +++ b/components/esp32s2/linker.lf @@ -1,5 +1,5 @@ -[mapping:esp32s2beta] -archive: libesp32s2beta.a +[mapping:esp32s2] +archive: libesp32s2.a entries: panic (noflash) diff --git a/components/esp32s2beta/panic.c b/components/esp32s2/panic.c similarity index 99% rename from components/esp32s2beta/panic.c rename to components/esp32s2/panic.c index 292aa2bbe9..dccfe04676 100644 --- a/components/esp32s2beta/panic.c +++ b/components/esp32s2/panic.c @@ -15,8 +15,8 @@ #include -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/uart.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/uart.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -42,7 +42,7 @@ #include "esp_err.h" #include "esp_core_dump.h" #include "esp_spi_flash.h" -#include "esp32s2beta/cache_err_int.h" +#include "esp32s2/cache_err_int.h" #include "esp_app_trace.h" #include "esp_private/system_internal.h" #include "sdkconfig.h" diff --git a/components/esp32s2beta/pm_esp32s2beta.c b/components/esp32s2/pm_esp32s2.c similarity index 99% rename from components/esp32s2beta/pm_esp32s2beta.c rename to components/esp32s2/pm_esp32s2.c index e3e5180af5..a6735c0ea4 100644 --- a/components/esp32s2beta/pm_esp32s2beta.c +++ b/components/esp32s2/pm_esp32s2.c @@ -21,7 +21,7 @@ #include "esp_err.h" #include "esp_pm.h" #include "esp_log.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_private/crosscore_int.h" #include "soc/rtc.h" @@ -34,7 +34,7 @@ #include "esp_private/pm_impl.h" #include "esp_private/pm_trace.h" #include "esp_private/esp_timer_impl.h" -#include "esp32s2beta/pm.h" +#include "esp32s2/pm.h" /* CCOMPARE update timeout, in CPU cycles. Any value above ~600 cycles will work * for the purpose of detecting a deadlock. diff --git a/components/esp32s2beta/pm_trace.c b/components/esp32s2/pm_trace.c similarity index 100% rename from components/esp32s2beta/pm_trace.c rename to components/esp32s2/pm_trace.c diff --git a/components/esp32s2beta/reset_reason.c b/components/esp32s2/reset_reason.c similarity index 99% rename from components/esp32s2beta/reset_reason.c rename to components/esp32s2/reset_reason.c index d5eb92be30..32ac171a9d 100644 --- a/components/esp32s2beta/reset_reason.c +++ b/components/esp32s2/reset_reason.c @@ -13,7 +13,7 @@ // limitations under the License. #include "esp_system.h" -#include "esp32s2beta/rom/rtc.h" +#include "esp32s2/rom/rtc.h" #include "esp_private/system_internal.h" #include "soc/rtc_periph.h" diff --git a/components/esp32s2beta/sleep_modes.c b/components/esp32s2/sleep_modes.c similarity index 98% rename from components/esp32s2beta/sleep_modes.c rename to components/esp32s2/sleep_modes.c index f063ba2179..996f05032c 100644 --- a/components/esp32s2beta/sleep_modes.c +++ b/components/esp32s2/sleep_modes.c @@ -19,13 +19,13 @@ #include "esp_sleep.h" #include "esp_private/esp_timer_impl.h" #include "esp_log.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_newlib.h" #include "esp_spi_flash.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/ets_sys.h" #include "soc/cpu.h" #include "soc/rtc.h" #include "soc/spi_periph.h" @@ -184,7 +184,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags) } // Enable ULP wakeup if (s_config.wakeup_triggers & RTC_ULP_TRIG_EN) { - // no-op for esp32s2beta + // no-op for esp32s2 } // Enter sleep @@ -608,7 +608,7 @@ static uint32_t get_power_down_flags(void) // If there is any data placed into .rtc.data or .rtc.bss segments, and // RTC_SLOW_MEM is Auto, keep it powered up as well. - // Labels are defined in the linker script, see esp32s2beta.ld. + // Labels are defined in the linker script, see esp32s2.ld. extern int _rtc_slow_length; if ((s_config.pd_options[ESP_PD_DOMAIN_RTC_SLOW_MEM] == ESP_PD_OPTION_AUTO) && diff --git a/components/esp32s2beta/spiram.c b/components/esp32s2/spiram.c similarity index 99% rename from components/esp32s2beta/spiram.c rename to components/esp32s2/spiram.c index bdd45e86f0..b8759ee43e 100644 --- a/components/esp32s2beta/spiram.c +++ b/components/esp32s2/spiram.c @@ -23,7 +23,7 @@ we add more types of external RAM memory, this can be made into a more intellige #include "sdkconfig.h" #include "esp_attr.h" #include "esp_err.h" -#include "esp32s2beta/spiram.h" +#include "esp32s2/spiram.h" #include "spiram_psram.h" #include "esp_log.h" #include "freertos/FreeRTOS.h" @@ -32,7 +32,7 @@ we add more types of external RAM memory, this can be made into a more intellige #include "esp_heap_caps_init.h" #include "soc/soc_memory_layout.h" #include "soc/dport_reg.h" -#include "esp32s2beta/rom/cache.h" +#include "esp32s2/rom/cache.h" #include "soc/cache_memory.h" #include "soc/extmem_reg.h" diff --git a/components/esp32s2beta/spiram_psram.c b/components/esp32s2/spiram_psram.c similarity index 99% rename from components/esp32s2beta/spiram_psram.c rename to components/esp32s2/spiram_psram.c index 49501b094e..0e5c8cae1d 100644 --- a/components/esp32s2beta/spiram_psram.c +++ b/components/esp32s2/spiram_psram.c @@ -24,12 +24,12 @@ #include "esp_types.h" #include "esp_log.h" #include "spiram_psram.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/opi_flash.h" -#include "esp32s2beta/rom/gpio.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/efuse.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/opi_flash.h" +#include "esp32s2/rom/gpio.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/efuse.h" #include "soc/dport_reg.h" #include "soc/efuse_periph.h" #include "soc/spi_caps.h" diff --git a/components/esp32s2beta/spiram_psram.h b/components/esp32s2/spiram_psram.h similarity index 100% rename from components/esp32s2beta/spiram_psram.h rename to components/esp32s2/spiram_psram.h diff --git a/components/esp32s2beta/system_api_esp32s2beta.c b/components/esp32s2/system_api_esp32s2.c similarity index 97% rename from components/esp32s2beta/system_api_esp32s2beta.c rename to components/esp32s2/system_api_esp32s2.c index f69f88dc70..096ea860f4 100644 --- a/components/esp32s2beta/system_api_esp32s2beta.c +++ b/components/esp32s2/system_api_esp32s2.c @@ -19,8 +19,8 @@ #include "esp_attr.h" #include "esp_wifi.h" #include "esp_log.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/rom/uart.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/rom/uart.h" #include "soc/dport_reg.h" #include "soc/gpio_reg.h" #include "soc/rtc_cntl_reg.h" @@ -109,7 +109,7 @@ void esp_chip_info(esp_chip_info_t *out_info) { memset(out_info, 0, sizeof(*out_info)); - out_info->model = CHIP_ESP32S2BETA; + out_info->model = CHIP_ESP32S2; out_info->cores = 1; out_info->features = CHIP_FEATURE_WIFI_BGN; } diff --git a/components/esp32s2beta/task_wdt.c b/components/esp32s2/task_wdt.c similarity index 100% rename from components/esp32s2beta/task_wdt.c rename to components/esp32s2/task_wdt.c diff --git a/components/esp32s2beta/test/CMakeLists.txt b/components/esp32s2/test/CMakeLists.txt similarity index 77% rename from components/esp32s2beta/test/CMakeLists.txt rename to components/esp32s2/test/CMakeLists.txt index 2a333b89f1..30d3a22973 100644 --- a/components/esp32s2beta/test/CMakeLists.txt +++ b/components/esp32s2/test/CMakeLists.txt @@ -1,4 +1,4 @@ -if(IDF_TARGET STREQUAL "esp32s2beta") +if(IDF_TARGET STREQUAL "esp32s2") idf_component_register(SRC_DIRS . INCLUDE_DIRS . ${CMAKE_CURRENT_BINARY_DIR} REQUIRES unity test_utils nvs_flash ulp esp_common @@ -9,9 +9,9 @@ if(IDF_TARGET STREQUAL "esp32s2beta") WORKING_DIRECTORY ${COMPONENT_DIR} DEPENDS "${CMAKE_CURRENT_LIST_DIR}/logo.jpg") - add_custom_target(esp32s2beta_test_logo DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h") + add_custom_target(esp32s2_test_logo DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h") - add_dependencies(${COMPONENT_LIB} esp32s2beta_test_logo) + add_dependencies(${COMPONENT_LIB} esp32s2_test_logo) idf_build_set_property(COMPILE_DEFINITIONS "-DESP_TIMER_DYNAMIC_OVERFLOW_VAL" APPEND) target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_test_dport_xt_highint5") diff --git a/components/esp32s2beta/test/component.mk b/components/esp32s2/test/component.mk similarity index 100% rename from components/esp32s2beta/test/component.mk rename to components/esp32s2/test/component.mk diff --git a/components/esp32s2beta/test/logo.jpg b/components/esp32s2/test/logo.jpg similarity index 100% rename from components/esp32s2beta/test/logo.jpg rename to components/esp32s2/test/logo.jpg diff --git a/components/esp32s2beta/test/test_libgcc.c b/components/esp32s2/test/test_libgcc.c similarity index 100% rename from components/esp32s2beta/test/test_libgcc.c rename to components/esp32s2/test/test_libgcc.c diff --git a/components/esp32s2beta/test/test_sha.c b/components/esp32s2/test/test_sha.c similarity index 98% rename from components/esp32s2beta/test/test_sha.c rename to components/esp32s2/test/test_sha.c index df19a12ff4..ef872c478c 100644 --- a/components/esp32s2beta/test/test_sha.c +++ b/components/esp32s2/test/test_sha.c @@ -2,7 +2,7 @@ #include #include #include "esp_types.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "esp_log.h" #include "esp_timer.h" #include "esp_heap_caps.h" @@ -13,7 +13,7 @@ #include "mbedtls/sha1.h" #include "mbedtls/sha256.h" #include "mbedtls/sha512.h" -#include "esp32s2beta/sha.h" +#include "esp32s2/sha.h" /* Note: Most of the SHA functions are called as part of mbedTLS, so are tested as part of mbedTLS tests. Only esp_sha() is different. diff --git a/components/esp32s2beta/test/test_spiram_cache_flush.c b/components/esp32s2/test/test_spiram_cache_flush.c similarity index 100% rename from components/esp32s2beta/test/test_spiram_cache_flush.c rename to components/esp32s2/test/test_spiram_cache_flush.c diff --git a/components/esp32s2beta/test/test_stack_check.c b/components/esp32s2/test/test_stack_check.c similarity index 100% rename from components/esp32s2beta/test/test_stack_check.c rename to components/esp32s2/test/test_stack_check.c diff --git a/components/esp32s2beta/test/test_stack_check_cxx.cpp b/components/esp32s2/test/test_stack_check_cxx.cpp similarity index 100% rename from components/esp32s2beta/test/test_stack_check_cxx.cpp rename to components/esp32s2/test/test_stack_check_cxx.cpp diff --git a/components/esp32s2beta/Makefile.projbuild b/components/esp32s2beta/Makefile.projbuild deleted file mode 100644 index 2e7a946644..0000000000 --- a/components/esp32s2beta/Makefile.projbuild +++ /dev/null @@ -1 +0,0 @@ -# nothing here, esp32s2beta is not suppoted in Make build system \ No newline at end of file diff --git a/components/esp_common/Kconfig b/components/esp_common/Kconfig index 0b7b18860d..a3f617b30a 100644 --- a/components/esp_common/Kconfig +++ b/components/esp_common/Kconfig @@ -218,7 +218,7 @@ menu "Common ESP-related" config ESP_PANIC_HANDLER_IRAM bool "Place panic handler code in IRAM" default n - depends on IDF_TARGET_ESP32 # pending ESP32-S2 Beta support + depends on IDF_TARGET_ESP32 # pending ESP32-S2 support help If this option is disabled (default), the panic handler code is placed in flash not IRAM. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will diff --git a/components/esp_common/include/esp_pm.h b/components/esp_common/include/esp_pm.h index 6bf9f09d94..15af6a4aca 100644 --- a/components/esp_common/include/esp_pm.h +++ b/components/esp_common/include/esp_pm.h @@ -19,8 +19,8 @@ #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/pm.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/pm.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/pm.h" #endif #ifdef __cplusplus diff --git a/components/esp_common/include/esp_system.h b/components/esp_common/include/esp_system.h index c013515cd9..5947773d4f 100644 --- a/components/esp_common/include/esp_system.h +++ b/components/esp_common/include/esp_system.h @@ -40,7 +40,7 @@ typedef enum { #define FOUR_UNIVERSAL_MAC_ADDR 4 #if CONFIG_IDF_TARGET_ESP32 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES #endif /** @endcond */ @@ -243,7 +243,7 @@ esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac) */ typedef enum { CHIP_ESP32 = 1, //!< ESP32 - CHIP_ESP32S2BETA = 2, //!< ESP32-S2 Beta + CHIP_ESP32S2 = 2, //!< ESP32-S2 } esp_chip_model_t; /* Chip feature flags, used in esp_chip_info_t */ diff --git a/components/esp_common/src/ets_timer_legacy.c b/components/esp_common/src/ets_timer_legacy.c index c08ecf3dd1..a856b0cf4d 100644 --- a/components/esp_common/src/ets_timer_legacy.c +++ b/components/esp_common/src/ets_timer_legacy.c @@ -34,8 +34,8 @@ #include "esp_private/esp_timer_impl.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif /* We abuse 'timer_arg' field of ETSTimer structure to hold a pointer to esp_timer */ diff --git a/components/esp_common/src/mac_addr.c b/components/esp_common/src/mac_addr.c index 076321d2bb..d1c480937f 100644 --- a/components/esp_common/src/mac_addr.c +++ b/components/esp_common/src/mac_addr.c @@ -19,8 +19,8 @@ #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/efuse.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/efuse.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/efuse.h" #endif /* esp_system.h APIs relating to MAC addresses */ @@ -61,7 +61,7 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac) esp_err_t esp_efuse_mac_get_custom(uint8_t *mac) { -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 return ESP_ERR_NOT_SUPPORTED; // TODO: support custom MAC in efuse #else uint8_t version; @@ -81,7 +81,7 @@ esp_err_t esp_efuse_mac_get_custom(uint8_t *mac) return ESP_ERR_INVALID_CRC; } return ESP_OK; -#endif // IDF_TARGET_ESP32S2BETA +#endif // IDF_TARGET_ESP32S2 } esp_err_t esp_efuse_mac_get_default(uint8_t* mac) diff --git a/components/esp_eth/test/test_dm9051.c b/components/esp_eth/test/test_dm9051.c index c7b1309e58..2698290013 100644 --- a/components/esp_eth/test/test_dm9051.c +++ b/components/esp_eth/test/test_dm9051.c @@ -11,7 +11,7 @@ #include "esp_log.h" #include "driver/gpio.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static const char *TAG = "dm9051_test"; diff --git a/components/esp_eth/test/test_emac.c b/components/esp_eth/test/test_emac.c index 22dc9bdeaf..b724c06eb3 100644 --- a/components/esp_eth/test/test_emac.c +++ b/components/esp_eth/test/test_emac.c @@ -15,7 +15,7 @@ #include "ping/ping_sock.h" #include "esp32/rom/md5_hash.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static const char *TAG = "esp32_eth_test"; diff --git a/components/esp_gdbstub/esp32s2beta/gdbstub_esp32s2beta.c b/components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c similarity index 100% rename from components/esp_gdbstub/esp32s2beta/gdbstub_esp32s2beta.c rename to components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c diff --git a/components/esp_gdbstub/esp32s2beta/gdbstub_target_config.h b/components/esp_gdbstub/esp32s2/gdbstub_target_config.h similarity index 100% rename from components/esp_gdbstub/esp32s2beta/gdbstub_target_config.h rename to components/esp_gdbstub/esp32s2/gdbstub_target_config.h diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index b7db4945b2..82f24b5195 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -8,8 +8,8 @@ if(BOOTLOADER_BUILD) "${target}/ld/${target}.rom.newlib-funcs.ld" "${target}/ld/${target}.rom.libgcc.ld" ) - if(target STREQUAL "esp32s2beta") - list(APPEND scripts "esp32s2beta/ld/esp32s2beta.rom.spiflash.ld") + if(target STREQUAL "esp32s2") + list(APPEND scripts "esp32s2/ld/esp32s2.rom.spiflash.ld") endif() target_linker_script(${COMPONENT_LIB} INTERFACE "${scripts}") @@ -40,12 +40,12 @@ else() # Regular app build list(APPEND scripts "esp32/ld/esp32.rom.spiflash.ld") endif() - elseif(target STREQUAL "esp32s2beta") - # no SPIRAM workaround for esp32s2beta + elseif(target STREQUAL "esp32s2") + # no SPIRAM workaround for esp32s2 # no nano formatting function in ROM - list(APPEND scripts "esp32s2beta/ld/esp32s2beta.rom.newlib-funcs.ld" - "esp32s2beta/ld/esp32s2beta.rom.spiflash.ld") + list(APPEND scripts "esp32s2/ld/esp32s2.rom.newlib-funcs.ld" + "esp32s2/ld/esp32s2.rom.spiflash.ld") endif() target_linker_script(${COMPONENT_LIB} INTERFACE "${scripts}") diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.ld similarity index 98% rename from components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.ld rename to components/esp_rom/esp32s2/ld/esp32s2.rom.ld index 2405e2f054..5583e5c1e5 100644 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.ld +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.ld @@ -1,8 +1,10 @@ -/* -ESP32S2 ROM address table -Generated for ROM with MD5sum: -0a2c7ec5109c17884606d23b47045796 /home/jack/esp-rom/rom//.output/eagle/release/image/eagle.pro.rom.out -*/ +/** + * ESP32-S2 ROM address table (except symbols from libgcc and libc) + * Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796 + * + * These are all weak symbols that could be overwritten in ESP-IDF. + */ + PROVIDE ( abort = 0x40019fb4 ); PROVIDE ( acm_config_descr = 0x3ffaef0f ); PROVIDE ( acm_usb_descriptors = 0x3ffaee68 ); @@ -103,7 +105,6 @@ PROVIDE ( chip_usb_dw_init = 0x400133bc ); PROVIDE ( chip_usb_dw_prepare_persist = 0x40013588 ); PROVIDE ( chip_usb_get_persist_flags = 0x400135d8 ); PROVIDE ( chip_usb_set_persist_flags = 0x400135e8 ); -PROVIDE ( __clear_cache = 0x40005abc ); PROVIDE ( context = 0x3fffeb34 ); PROVIDE ( cpio_destroy = 0x4001599c ); PROVIDE ( cpio_done = 0x40015968 ); @@ -112,6 +113,7 @@ PROVIDE ( cpio_start = 0x4001561c ); PROVIDE ( crc16_le = 0x40011a10 ); PROVIDE ( crc32_le = 0x400119dc ); PROVIDE ( crc8_le = 0x40011a4c ); +PROVIDE ( _cvt = 0x4000f9b8 ); PROVIDE ( _data_end_all_pro = 0x3fffff98 ); PROVIDE ( _data_end_c = 0x3ffffd80 ); PROVIDE ( _data_end_ets = 0x3fffe710 ); @@ -144,6 +146,7 @@ PROVIDE ( dbus_baseaddrs = 0x3ffaf030 ); PROVIDE ( _DebugExceptionVector = 0x40000280 ); PROVIDE ( _DebugExceptionVector_text_end = 0x4000028b ); PROVIDE ( _DebugExceptionVector_text_start = 0x40000280 ); +PROVIDE ( __default_global_locale = 0x3ffac600 ); PROVIDE ( dfu_class_handle_req = 0x400152f0 ); PROVIDE ( dfu_config_descr = 0x3ffaeeb2 ); PROVIDE ( dfu_cpio_callback = 0x4001360c ); @@ -333,6 +336,7 @@ PROVIDE ( _GeneralException = 0x400073cf ); PROVIDE ( get_id = 0x4001610c ); PROVIDE ( GetSecurityInfoProc = 0x40012098 ); PROVIDE ( GetUartDevice = 0x40012f60 ); +PROVIDE ( __global_locale_ptr = 0x3ffffd7c ); PROVIDE ( g_phyFuns = 0x3ffffd90 ); PROVIDE ( g_phyFuns_instance = 0x3ffffd94 ); PROVIDE ( gpio_input_get = 0x400193a0 ); @@ -426,9 +430,11 @@ PROVIDE ( mz_free = 0x40002fa4 ); PROVIDE ( _NMIExceptionVector = 0x400002c0 ); PROVIDE ( _NMIExceptionVector_text_end = 0x400002c3 ); PROVIDE ( _NMIExceptionVector_text_start = 0x400002c0 ); +PROVIDE ( __packed = 0x3ffffcec ); PROVIDE ( phy_get_romfuncs = 0x4000a88c ); PROVIDE ( _Pri_4_HandlerAddress = 0x3fffed78 ); PROVIDE ( _Pri_5_HandlerAddress = 0x3fffed7c ); +PROVIDE ( pthread_setcancelstate = 0x40019fa8 ); PROVIDE ( _putc1 = 0x3ffffd6c ); PROVIDE ( _putc2 = 0x3ffffd68 ); PROVIDE ( RcvMsg = 0x40012f10 ); @@ -582,8 +588,6 @@ PROVIDE ( SelectSpiFunction = 0x40015d08 ); PROVIDE ( SelectSpiQIO = 0x40015b88 ); PROVIDE ( SendMsg = 0x40012d0c ); PROVIDE ( send_packet = 0x40012cc8 ); -PROVIDE ( setlocale = 0x40001c44 ); -PROVIDE ( _setlocale_r = 0x40001bdc ); PROVIDE ( set_rtc_memory_crc = 0x40010010 ); PROVIDE ( SetSpiDrvs = 0x40015c18 ); PROVIDE ( sig_matrix = 0x3ffffd57 ); @@ -644,7 +648,6 @@ PROVIDE ( str_prod_descr = 0x3ffaee88 ); PROVIDE ( str_serial_descr = 0x3ffaee84 ); PROVIDE ( s_usb_osglue = 0x3ffffcdc ); PROVIDE ( _SyscallException = 0x4000732a ); -PROVIDE ( syscall_table_ptr_app = 0x3ffffd74 ); PROVIDE ( syscall_table_ptr_pro = 0x3ffffd78 ); PROVIDE ( tdefl_compress = 0x400041dc ); PROVIDE ( tdefl_compress_buffer = 0x40004938 ); diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.libgcc.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.libgcc.ld similarity index 87% rename from components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.libgcc.ld rename to components/esp_rom/esp32s2/ld/esp32s2.rom.libgcc.ld index d714ff7da1..d48c02c95f 100644 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.libgcc.ld +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.libgcc.ld @@ -1,3 +1,9 @@ +/** + * Unlike other ROM functions which are exported using PROVIDE, which declares weak symbols, + * these libgcc functions are exported using assignment, which declare strong symbols. + * This is done so that ROM functions are always used instead of the ones provided by libgcc.a. + */ + __absvdi2 = 0x40005ad8; __absvsi2 = 0x40005ac4; __adddf3 = 0x40008660; @@ -8,6 +14,7 @@ __ashldi3 = 0x4001b000; __ashrdi3 = 0x4001b018; __bswapdi2 = 0x40006d34; __bswapsi2 = 0x40006d0c; +__clear_cache = 0x40005abc; __clrsbdi2 = 0x40006da8; __clrsbsi2 = 0x40006d90; __clzdi2 = 0x4001b238; diff --git a/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-data.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-data.ld new file mode 100644 index 0000000000..33eda7e057 --- /dev/null +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-data.ld @@ -0,0 +1,15 @@ +/** + * These are the .bss/.data symbols used by newlib functions present in ESP32-S2 ROM. + * See also esp32s2.rom.newlib-funcs.ld for the list of general newlib functions. + * + * Unlike other ROM functions and data which are exported using PROVIDE, which declare weak symbols, + * newlib related functions are exported using assignment, which declare strong symbols. + * This is done so that ROM functions are always used instead of the ones provided by libc.a. + */ + +_ctype_ = 0x3ffac76c; +_global_impure_ptr = 0x3ffffd8c; +_PathLocale = 0x3ffffd80; +__sf_fake_stderr = 0x3ffaf08c; +__sf_fake_stdin = 0x3ffaf0cc; +__sf_fake_stdout = 0x3ffaf0ac; diff --git a/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-funcs.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-funcs.ld new file mode 100644 index 0000000000..4958f2f039 --- /dev/null +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.newlib-funcs.ld @@ -0,0 +1,125 @@ +/** + * These are the newlib functions present in ESP32-S2 ROM. + * See also esp32s2.rom.newlib-data.ld for the list of .data/.bss symbols used by these functions. + + * Unlike other ROM functions which are exported using PROVIDE, which declare weak symbols, + * newlib related functions are exported using assignment, which declares strong symbols. + * This is done so that ROM functions are always used instead of the ones provided by libc.a. + */ + +abs = 0x40000618; +__ascii_mbtowc = 0x40007a04; +__ascii_wctomb = 0x400018d0; +__assert = 0x4001a430; +__assert_func = 0x4001a408; +bzero = 0x400078c8; +_cleanup_r = 0x4001a480; +creat = 0x4000788c; +div = 0x40000620; +fclose = 0x4001a804; +_fclose_r = 0x4001a714; +fflush = 0x40001bb8; +_fflush_r = 0x40001b30; +fiprintf = 0x40000a3c; +_fiprintf_r = 0x40000a18; +__fp_lock_all = 0x4001a638; +fprintf = 0x40000a3c; +_fprintf_r = 0x40000a18; +__fp_unlock_all = 0x4001a64c; +__fputwc = 0x40001770; +fputwc = 0x40001864; +_fputwc_r = 0x400017f8; +_fwalk = 0x4001bcec; +_fwalk_reent = 0x4001bd24; +isalnum = 0x400078d8; +isalpha = 0x400078e8; +isascii = 0x4001aaec; +_isatty_r = 0x400078a0; +isblank = 0x400078f8; +iscntrl = 0x40007918; +isdigit = 0x40007930; +isgraph = 0x40007968; +islower = 0x40007948; +isprint = 0x40007980; +ispunct = 0x40007994; +isspace = 0x400079ac; +isupper = 0x400079c4; +labs = 0x40000648; +ldiv = 0x40000650; +__locale_ctype_ptr = 0x40001c2c; +__locale_ctype_ptr_l = 0x40001c24; +__locale_mb_cur_max = 0x40001c0c; +longjmp = 0x400005a4; +_mbtowc_r = 0x400079e0; +memccpy = 0x4001ab00; +memchr = 0x4001ab24; +memcmp = 0x4001ab40; +memcpy = 0x4001aba8; +memmove = 0x4001acb0; +memrchr = 0x4001acec; +memset = 0x4001ad3c; +open = 0x400080c4; +qsort = 0x400006f4; +rand_r = 0x40007af4; +__sclose = 0x4001a700; +__seofread = 0x4001a690; +setjmp = 0x40000540; +setlocale = 0x40001c44; +_setlocale_r = 0x40001bdc; +__sflush_r = 0x400019dc; +__sfmoreglue = 0x4001a4c8; +__sfp = 0x4001a590; +__sfp_lock_acquire = 0x4001a508; +__sfp_lock_release = 0x4001a514; +__sfvwrite_r = 0x40001310; +__sinit = 0x4001a538; +__sinit_lock_acquire = 0x4001a520; +__sinit_lock_release = 0x4001a52c; +__smakebuf_r = 0x40001954; +__sprint_r = 0x40000aec; +srand = 0x40007a24; +__sread = 0x4001a660; +__sseek = 0x4001a6cc; +strcasecmp = 0x40007b38; +strcasestr = 0x40007b7c; +strcat = 0x4001ad90; +strchr = 0x4001adb0; +strcmp = 0x40007be4; +strcoll = 0x40007ce8; +strcpy = 0x40007cfc; +strcspn = 0x4001adcc; +strdup = 0x40007d84; +_strdup_r = 0x40007d98; +strlcat = 0x40007db8; +strlcpy = 0x4001adf8; +strlen = 0x40007e08; +strlwr = 0x40007e68; +strncasecmp = 0x40007e94; +strncat = 0x4001ae34; +strncmp = 0x4001ae64; +strncpy = 0x40007f20; +strndup = 0x40007fe8; +_strndup_r = 0x40007ffc; +strnlen = 0x4001ae9c; +strrchr = 0x40008040; +strsep = 0x4000806c; +strspn = 0x4001aebc; +strstr = 0x4001aee8; +__strtok_r = 0x4001af18; +strtok_r = 0x4001af7c; +strupr = 0x40008084; +__swbuf = 0x4000167c; +__swbuf_r = 0x400015bc; +__swhatbuf_r = 0x400018f8; +__swrite = 0x4001a698; +__swsetup_r = 0x40001690; +toascii = 0x4001af90; +tolower = 0x40008158; +toupper = 0x40008174; +vfiprintf = 0x40000e40; +_vfiprintf_r = 0x40000b58; +vfprintf = 0x40000e40; +_vfprintf_r = 0x40000b58; +wcrtomb = 0x400012f4; +_wcrtomb_r = 0x400012a0; +_wctomb_r = 0x400018ac; diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.spiflash.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.spiflash.ld similarity index 80% rename from components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.spiflash.ld rename to components/esp_rom/esp32s2/ld/esp32s2.rom.spiflash.ld index bf486f979b..f0f7670efc 100644 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.spiflash.ld +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.spiflash.ld @@ -1,12 +1,7 @@ -/* - SPI flash driver function, compatibility names. -*/ +/** + * SPI flash driver function, compatibility names. + */ - -PROVIDE ( cache_ibus_mmu_set_rom = cache_ibus_mmu_set ); -PROVIDE ( Cache_Read_Disable_rom = Cache_Read_Disable ); -PROVIDE ( Cache_Read_Enable_rom = Cache_Read_Enable ); -PROVIDE ( cache_dbus_mmu_set_rom = cache_dbus_mmu_set ); PROVIDE ( g_rom_spiflash_dummy_len_plus = dummy_len_plus); PROVIDE ( g_ticks_per_us_pro = g_ticks_per_us ); PROVIDE ( g_rom_flashchip = SPI_flashchip_data ); @@ -25,4 +20,4 @@ PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock ); PROVIDE ( esp_rom_spiflash_wait_idle = SPI_Wait_Idle ); PROVIDE ( esp_rom_spiflash_config_readmode = SPIReadModeCnfig ); PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock ); -PROVIDE ( esp_rom_spiflash_write_encrypted = SPI_Encrypt_Write ); \ No newline at end of file +PROVIDE ( esp_rom_spiflash_write_encrypted = SPI_Encrypt_Write ); diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-data.ld b/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-data.ld deleted file mode 100644 index 56642969ba..0000000000 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-data.ld +++ /dev/null @@ -1,9 +0,0 @@ -_ctype_ = 0x3ffac76c; -__default_global_locale = 0x3ffac600; -_global_impure_ptr = 0x3ffffd8c; -__global_locale_ptr = 0x3ffffd7c; -__locale_ctype_ptr = 0x40001c2c; -__locale_ctype_ptr_l = 0x40001c24; -__locale_mb_cur_max = 0x40001c0c; -__packed = 0x3ffffcec; -_PathLocale = 0x3ffffd80; diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-funcs.ld b/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-funcs.ld deleted file mode 100644 index 15dcfb5f34..0000000000 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-funcs.ld +++ /dev/null @@ -1,93 +0,0 @@ -abs = 0x40000618; -__ascii_mbtowc = 0x40007a04; -__ascii_wctomb = 0x400018d0; -__assert = 0x4001a430; -__assert_func = 0x4001a408; -/* -atoi = ; -_atoi_r = ; -atol = ; -_atol_r = ; -*/ -bzero = 0x400078c8; -_cvt = 0x4000f9b8; -div = 0x40000620; -isalnum = 0x400078d8; -isalpha = 0x400078e8; -isascii = 0x4001aaec; -isblank = 0x400078f8; -iscntrl = 0x40007918; -isdigit = 0x40007930; -isgraph = 0x40007968; -islower = 0x40007948; -isprint = 0x40007980; -ispunct = 0x40007994; -isspace = 0x400079ac; -isupper = 0x400079c4; -/* -itoa = ; -__itoa = ; -*/ -labs = 0x40000648; -ldiv = 0x40000650; -longjmp = 0x400005a4; -_mbtowc_r = 0x400079e0; -memccpy = 0x4001ab00; -memchr = 0x4001ab24; -memcmp = 0x4001ab40; -memcpy = 0x4001aba8; -memmove = 0x4001acb0; -memrchr = 0x4001acec; -memset = 0x4001ad3c; -pthread_setcancelstate = 0x40019fa8; -qsort = 0x400006f4; -rand = 0x40007a78; -rand_r = 0x40007af4; -setjmp = 0x40000540; -srand = 0x40007a24; -strcasecmp = 0x40007b38; -strcasestr = 0x40007b7c; -strcat = 0x4001ad90; -strchr = 0x4001adb0; -strcmp = 0x40007be4; -strcoll = 0x40007ce8; -strcpy = 0x40007cfc; -strcspn = 0x4001adcc; -strdup = 0x40007d84; -_strdup_r = 0x40007d98; -strlcat = 0x40007db8; -strlcpy = 0x4001adf8; -strlen = 0x40007e08; -strlwr = 0x40007e68; -strncasecmp = 0x40007e94; -strncat = 0x4001ae34; -strncmp = 0x4001ae64; -strncpy = 0x40007f20; -strndup = 0x40007fe8; -_strndup_r = 0x40007ffc; -strnlen = 0x4001ae9c; -strrchr = 0x40008040; -strsep = 0x4000806c; -strspn = 0x4001aebc; -strstr = 0x4001aee8; -__strtok_r = 0x4001af18; -strtok_r = 0x4001af7c; -/* -strtol = ; -strtol_l = ; -_strtol_r = ; -strtoul = ; -strtoul_l = ; -_strtoul_r = ; -*/ -strupr = 0x40008084; -toascii = 0x4001af90; -tolower = 0x40008158; -toupper = 0x40008174; -/* -utoa = ; -__utoa = ; -*/ -wcrtomb = 0x400012f4; -_wcrtomb_r = 0x400012a0; -_wctomb_r = 0x400018ac; diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-stdio.ld b/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-stdio.ld deleted file mode 100644 index 1b076838d3..0000000000 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.newlib-stdio.ld +++ /dev/null @@ -1,54 +0,0 @@ -/* These are the stdio related newlib functions present in ESP32S2beta ROM. - They are not used when compiling with newlib 3. -*/ - -PROVIDE ( fclose = 0x40015a30 ); -PROVIDE ( _fclose_r = 0x40015940 ); -PROVIDE ( fflush = 0x40001f94 ); -PROVIDE ( _fflush_r = 0x40001f0c ); -PROVIDE ( __fp_lock_all = 0x40015864 ); -PROVIDE ( _fwalk = 0x40016efc ); -PROVIDE ( _fwalk_reent = 0x40016f34 ); -PROVIDE ( fiprintf = 0x40000e18 ); -PROVIDE ( _fiprintf_r = 0x40000df4 ); -PROVIDE ( fprintf = 0x40000e18 ); -PROVIDE ( _fprintf_r = 0x40000df4 ); -PROVIDE ( __fp_unlock_all = 0x40015878 ); -PROVIDE ( fputwc = 0x40001c40 ); -PROVIDE ( __fputwc = 0x40001b4c ); -PROVIDE ( _fputwc_r = 0x40001bd4 ); -PROVIDE ( _printf_common = 0x4000123c ); -PROVIDE ( _printf_float = 0x40015538 ); -PROVIDE ( _printf_i = 0x40001308 ); -PROVIDE ( vfiprintf = 0x4000121c ); -PROVIDE ( _vfiprintf_r = 0x40000f34 ); -PROVIDE ( vfprintf = 0x4000121c ); -PROVIDE ( _vfprintf_r = 0x40000f34 ); -PROVIDE ( _scanf_float = 0x40015554 ); -PROVIDE ( __sclose = 0x4001592c ); -PROVIDE ( __seofread = 0x400158bc ); -PROVIDE ( __sf_fake_stderr = 0x3ffae938 ); -PROVIDE ( __sf_fake_stdin = 0x3ffae978 ); -PROVIDE ( __sf_fake_stdout = 0x3ffae958 ); -PROVIDE ( __sflush_r = 0x40001db8 ); -PROVIDE ( __sfmoreglue = 0x400156f4 ); -PROVIDE ( __sfp = 0x400157bc ); -PROVIDE ( __sfp_lock_acquire = 0x40015734 ); -PROVIDE ( __sfp_lock_release = 0x40015740 ); -PROVIDE ( __sfputs_r = 0x40000e7c ); -PROVIDE ( __sfvwrite_r = 0x400016ec ); -PROVIDE ( __sinit = 0x40015764 ); -PROVIDE ( __sinit_lock_acquire = 0x4001574c ); -PROVIDE ( __sinit_lock_release = 0x40015758 ); -PROVIDE ( __smakebuf_r = 0x40001d30 ); -PROVIDE ( __sprint_r = 0x40000ec8 ); -PROVIDE ( __sread = 0x4001588c ); -PROVIDE ( __sseek = 0x400158f8 ); -PROVIDE ( __swbuf = 0x40001a58 ); -PROVIDE ( __swbuf_r = 0x40001998 ); -PROVIDE ( __swhatbuf_r = 0x40001cd4 ); -PROVIDE ( __swrite = 0x400158c4 ); -PROVIDE ( __swsetup_r = 0x40001a6c ); -PROVIDE ( _cleanup = 0x40015724 ); -PROVIDE ( _cleanup_r = 0x400156ac ); -PROVIDE ( creat = 0x40007c68 ); diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.redefined.ld b/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.redefined.ld deleted file mode 100644 index 04d949fd16..0000000000 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.redefined.ld +++ /dev/null @@ -1,103 +0,0 @@ -/* - ROM Functions defined in this file are not used in ESP-IDF as is, - and different definitions for functions with the same names are provided. - This file is not used when linking ESP-IDF and is intended for reference only -*/ - -PROVIDE ( abort = 0x400151e0 ); -PROVIDE ( ets_timer_arm = 0x4000d76c ); -PROVIDE ( ets_timer_arm_us = 0x4000d7b0 ); -PROVIDE ( ets_timer_disarm = 0x4000d7f0 ); -PROVIDE ( ets_timer_done = 0x4000d82c ); -PROVIDE ( ets_timer_handler_isr = 0x4000d858 ); -PROVIDE ( ets_timer_init = 0x4000d8ec ); -PROVIDE ( ets_timer_setfn = 0x4000d754 ); - -PROVIDE ( _KernelExceptionVector = 0x40000300 ); -PROVIDE ( _KernelExceptionVector_text_end = 0x40000306 ); -PROVIDE ( _KernelExceptionVector_text_start = 0x40000300 ); -PROVIDE ( _NMIExceptionVector = 0x400002c0 ); -PROVIDE ( _NMIExceptionVector_text_end = 0x400002c3 ); -PROVIDE ( _NMIExceptionVector_text_start = 0x400002c0 ); -PROVIDE ( _UserExceptionVector = 0x40000340 ); -PROVIDE ( _UserExceptionVector_text_end = 0x40000357 ); -PROVIDE ( _UserExceptionVector_text_start = 0x40000340 ); -PROVIDE ( _DebugExceptionVector = 0x40000280 ); -PROVIDE ( _DebugExceptionVector_text_end = 0x4000028b ); -PROVIDE ( _DebugExceptionVector_text_start = 0x40000280 ); -PROVIDE ( _DoubleExceptionVector = 0x400003c0 ); -PROVIDE ( _DoubleExceptionVector_text_end = 0x400003c6 ); -PROVIDE ( _DoubleExceptionVector_text_start = 0x400003c0 ); -PROVIDE ( _Level2FromVector = 0x400078d4 ); -PROVIDE ( _Level2HandlerLabel = 0x00000000 ); -PROVIDE ( _Level2InterruptVector_text_end = 0x40000186 ); -PROVIDE ( _Level2InterruptVector_text_start = 0x40000180 ); -PROVIDE ( _Level2Vector = 0x40000180 ); -PROVIDE ( _Level3FromVector = 0x40007970 ); -PROVIDE ( _Level3HandlerLabel = 0x00000000 ); -PROVIDE ( _Level3InterruptVector_text_end = 0x400001c6 ); -PROVIDE ( _Level3InterruptVector_text_start = 0x400001c0 ); -PROVIDE ( _Level3Vector = 0x400001c0 ); -PROVIDE ( _Level4FromVector = 0x40007a08 ); -PROVIDE ( _Level4HandlerLabel = 0x00000000 ); -PROVIDE ( _Level4InterruptVector_text_end = 0x40000206 ); -PROVIDE ( _Level4InterruptVector_text_start = 0x40000200 ); -PROVIDE ( _Level4Vector = 0x40000200 ); -PROVIDE ( _Level5FromVector = 0x40007b38 ); -PROVIDE ( _Level5HandlerLabel = 0x00000000 ); -PROVIDE ( _Level5InterruptVector_text_end = 0x40000246 ); -PROVIDE ( _Level5InterruptVector_text_start = 0x40000240 ); -PROVIDE ( _Level5Vector = 0x40000240 ); -PROVIDE ( _LevelOneInterrupt = 0x400077e6 ); -PROVIDE ( _ResetHandler = 0x4000044c ); -PROVIDE ( _ResetVector = 0x40000400 ); -PROVIDE ( _ResetVector_literal_end = 0x40000540 ); -PROVIDE ( _ResetVector_literal_start = 0x40000540 ); -PROVIDE ( _ResetVector_text_end = 0x4000053d ); -PROVIDE ( _ResetVector_text_start = 0x40000400 ); -PROVIDE ( _SyscallException = 0x40007706 ); -PROVIDE ( _WindowOverflow12 = 0x40000100 ); -PROVIDE ( _WindowOverflow4 = 0x40000000 ); -PROVIDE ( _WindowOverflow8 = 0x40000080 ); -PROVIDE ( _WindowUnderflow12 = 0x40000140 ); -PROVIDE ( _WindowUnderflow4 = 0x40000040 ); -PROVIDE ( _WindowUnderflow8 = 0x400000c0 ); -PROVIDE ( _WindowVectors_text_end = 0x40000170 ); -PROVIDE ( _WindowVectors_text_start = 0x40000000 ); - -PROVIDE ( hmac_md5 = 0x4000586c ); -PROVIDE ( hmac_md5_vector = 0x4000577c ); -PROVIDE ( MD5Final = 0x400056e8 ); -PROVIDE ( MD5Init = 0x40005648 ); -PROVIDE ( MD5Update = 0x40005668 ); -PROVIDE ( md5_vector = 0x40005750 ); - -PROVIDE ( _xtos_alloca_handler = 0x40000010 ); -PROVIDE ( xtos_cause3_handler = 0x4000774c ); -PROVIDE ( xtos_c_handler_table = 0x3fffcea8 ); -PROVIDE ( xtos_c_wrapper_handler = 0x4000775c ); -PROVIDE ( _xtos_enabled = 0x3fffcfb0 ); -PROVIDE ( xtos_exc_handler_table = 0x3fffcda8 ); -PROVIDE ( xtos_interrupt_mask_table = 0x3fffd0b8 ); -PROVIDE ( xtos_interrupt_table = 0x3fffcfb8 ); -PROVIDE ( _xtos_ints_off = 0x4001560c ); -PROVIDE ( _xtos_ints_on = 0x400155e8 ); -PROVIDE ( _xtos_intstruct = 0x3fffcfb0 ); -PROVIDE ( _xtos_l1int_handler = 0x400077c8 ); -PROVIDE ( xtos_p_none = 0x40015acc ); -PROVIDE ( _xtos_restore_intlevel = 0x400078a8 ); -PROVIDE ( _xtos_return_from_exc = 0x40015ad4 ); -PROVIDE ( _xtos_set_exception_handler = 0x40007690 ); -PROVIDE ( _xtos_set_interrupt_handler = 0x400155ac ); -PROVIDE ( _xtos_set_interrupt_handler_arg = 0x40015570 ); -PROVIDE ( _xtos_set_intlevel = 0x40015aec ); -PROVIDE ( _xtos_set_min_intlevel = 0x40015b08 ); -PROVIDE ( _xtos_set_vpri = 0x400078b4 ); -PROVIDE ( _xtos_syscall_handler = 0x400076d8 ); -PROVIDE ( xtos_unhandled_exception = 0x40015b2c ); -PROVIDE ( xtos_unhandled_interrupt = 0x40015b3c ); -PROVIDE ( _xtos_vectors_ref_ = 0x00000000 ); -PROVIDE ( _xtos_vpri_enabled = 0x3fffcfb4 ); - -PROVIDE ( setlocale = 0x40002020 ); -PROVIDE ( _setlocale_r = 0x40001fb8 ); diff --git a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.syscalls.ld b/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.syscalls.ld deleted file mode 100644 index 9d4d45ec25..0000000000 --- a/components/esp_rom/esp32s2beta/ld/esp32s2beta.rom.syscalls.ld +++ /dev/null @@ -1,60 +0,0 @@ -/* These ROM functions call respective entries in the syscall table. - They are called by other ROM functions (mostly from newlib). - We don't link to them directly, since in IDF there are actual - implementations of these functions, with same names. - - I.e.: - - times (in ROM) -> _times_r (in ROM) -> syscall table entry _times_r -> _times_r (in IDF) - - Hence the following entries are provided only for reference - and commented out. - */ - -/* - -PROVIDE ( calloc = 0x40015520 ); -PROVIDE ( _calloc_r = 0x40015234 ); -PROVIDE ( close = 0x4000848c ); -PROVIDE ( _close_r = 0x40015378 ); -PROVIDE ( free = 0x400154f4 ); -PROVIDE ( _free_r = 0x40015208 ); -PROVIDE ( _fstat_r = 0x40015308 ); -PROVIDE ( _getpid_r = 0x40015338 ); -PROVIDE ( __getreent = 0x400154c8 ); -PROVIDE ( _gettimeofday_r = 0x40015294 ); -PROVIDE ( _kill_r = 0x4001534c ); -PROVIDE ( _link_r = 0x400152d8 ); -PROVIDE ( _lock_acquire = 0x40015450 ); -PROVIDE ( _lock_acquire_recursive = 0x40015464 ); -PROVIDE ( _lock_close = 0x40015428 ); -PROVIDE ( _lock_close_recursive = 0x4001543c ); -PROVIDE ( _lock_init = 0x40015400 ); -PROVIDE ( _lock_init_recursive = 0x40015414 ); -PROVIDE ( _lock_release = 0x400154a0 ); -PROVIDE ( _lock_release_recursive = 0x400154b4 ); -PROVIDE ( _lock_try_acquire = 0x40015478 ); -PROVIDE ( _lock_try_acquire_recursive = 0x4001548c ); -PROVIDE ( _lseek_r = 0x400153c8 ); -PROVIDE ( malloc = 0x400154dc ); -PROVIDE ( _malloc_r = 0x400151f0 ); -PROVIDE ( open = 0x400084a0 ); -PROVIDE ( _open_r = 0x40015390 ); -PROVIDE ( _raise_r = 0x400152ac ); -PROVIDE ( read = 0x400084f0 ); -PROVIDE ( _read_r = 0x400153e4 ); -PROVIDE ( realloc = 0x40015508 ); -PROVIDE ( _realloc_r = 0x4001521c ); -PROVIDE ( _rename_r = 0x40015264 ); -PROVIDE ( sbrk = 0x40008508 ); -PROVIDE ( _sbrk_r = 0x40015320 ); -PROVIDE ( _stat_r = 0x400152f0 ); -PROVIDE ( _system_r = 0x4001524c ); -PROVIDE ( _times_r = 0x4001527c ); -PROVIDE ( _unlink_r = 0x400152c0 ); -PROVIDE ( write = 0x4000851c ); -PROVIDE ( _write_r = 0x400153ac ); -PROVIDE ( _isatty_r = 0x40007c7c ); -PROVIDE ( _exit_r = 0x40015364 ); - -*/ diff --git a/components/esp_rom/include/esp32s2beta/rom/aes.h b/components/esp_rom/include/esp32s2/rom/aes.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/aes.h rename to components/esp_rom/include/esp32s2/rom/aes.h diff --git a/components/esp_rom/include/esp32s2beta/rom/bigint.h b/components/esp_rom/include/esp32s2/rom/bigint.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/bigint.h rename to components/esp_rom/include/esp32s2/rom/bigint.h diff --git a/components/esp_rom/include/esp32s2beta/rom/cache.h b/components/esp_rom/include/esp32s2/rom/cache.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/cache.h rename to components/esp_rom/include/esp32s2/rom/cache.h diff --git a/components/esp_rom/include/esp32s2beta/rom/crc.h b/components/esp_rom/include/esp32s2/rom/crc.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/crc.h rename to components/esp_rom/include/esp32s2/rom/crc.h diff --git a/components/esp_rom/include/esp32s2beta/rom/digital_signature.h b/components/esp_rom/include/esp32s2/rom/digital_signature.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/digital_signature.h rename to components/esp_rom/include/esp32s2/rom/digital_signature.h diff --git a/components/esp_rom/include/esp32s2beta/rom/efuse.h b/components/esp_rom/include/esp32s2/rom/efuse.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/efuse.h rename to components/esp_rom/include/esp32s2/rom/efuse.h diff --git a/components/esp_rom/include/esp32s2beta/rom/ets_sys.h b/components/esp_rom/include/esp32s2/rom/ets_sys.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/ets_sys.h rename to components/esp_rom/include/esp32s2/rom/ets_sys.h diff --git a/components/esp_rom/include/esp32s2beta/rom/gpio.h b/components/esp_rom/include/esp32s2/rom/gpio.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/gpio.h rename to components/esp_rom/include/esp32s2/rom/gpio.h diff --git a/components/esp_rom/include/esp32s2beta/rom/hmac.h b/components/esp_rom/include/esp32s2/rom/hmac.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/hmac.h rename to components/esp_rom/include/esp32s2/rom/hmac.h diff --git a/components/esp_rom/include/esp32s2beta/rom/libc_stubs.h b/components/esp_rom/include/esp32s2/rom/libc_stubs.h similarity index 86% rename from components/esp_rom/include/esp32s2beta/rom/libc_stubs.h rename to components/esp_rom/include/esp32s2/rom/libc_stubs.h index f4eb3a65e9..0c2a4b83ae 100644 --- a/components/esp_rom/include/esp32s2beta/rom/libc_stubs.h +++ b/components/esp_rom/include/esp32s2/rom/libc_stubs.h @@ -1,9 +1,9 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD +// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at - +// // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software @@ -26,13 +26,13 @@ extern "C" { #endif /* -ESP32 ROM code contains implementations of some of C library functions. +ESP32-S2 ROM code contains implementations of some of C library functions. Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall implementation defined in the following struct. -The table itself, by default, is not allocated in RAM. There are two pointers, `syscall_table_ptr_pro` and -`syscall_table_ptr_app`, which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU) -and CPU 1 (aka APP CPU). Location of these pointers in .bss segment of ROM code is defined in linker script. +The table itself, by default, is not allocated in RAM. There is a pointer, `syscall_table_ptr_pro`, +which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU). +Location of this pointer in .bss segment of ROM code is defined in linker script. So, before using any of the C library functions (except for pure functions and memcpy/memset functions), application must allocate syscall table structure for each CPU being used, and populate it with pointers @@ -80,7 +80,6 @@ struct syscall_stub_table }; extern struct syscall_stub_table* syscall_table_ptr_pro; -extern struct syscall_stub_table* syscall_table_ptr_app; #ifdef __cplusplus } // extern "C" diff --git a/components/esp_rom/include/esp32s2beta/rom/lldesc.h b/components/esp_rom/include/esp32s2/rom/lldesc.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/lldesc.h rename to components/esp_rom/include/esp32s2/rom/lldesc.h diff --git a/components/esp_rom/include/esp32s2beta/rom/md5_hash.h b/components/esp_rom/include/esp32s2/rom/md5_hash.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/md5_hash.h rename to components/esp_rom/include/esp32s2/rom/md5_hash.h diff --git a/components/esp_rom/include/esp32s2beta/rom/miniz.h b/components/esp_rom/include/esp32s2/rom/miniz.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/miniz.h rename to components/esp_rom/include/esp32s2/rom/miniz.h diff --git a/components/esp_rom/include/esp32s2beta/rom/opi_flash.h b/components/esp_rom/include/esp32s2/rom/opi_flash.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/opi_flash.h rename to components/esp_rom/include/esp32s2/rom/opi_flash.h diff --git a/components/esp_rom/include/esp32s2beta/rom/queue.h b/components/esp_rom/include/esp32s2/rom/queue.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/queue.h rename to components/esp_rom/include/esp32s2/rom/queue.h diff --git a/components/esp_rom/include/esp32s2beta/rom/rsa_pss.h b/components/esp_rom/include/esp32s2/rom/rsa_pss.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/rsa_pss.h rename to components/esp_rom/include/esp32s2/rom/rsa_pss.h diff --git a/components/esp_rom/include/esp32s2beta/rom/rtc.h b/components/esp_rom/include/esp32s2/rom/rtc.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/rtc.h rename to components/esp_rom/include/esp32s2/rom/rtc.h diff --git a/components/esp_rom/include/esp32s2beta/rom/secure_boot.h b/components/esp_rom/include/esp32s2/rom/secure_boot.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/secure_boot.h rename to components/esp_rom/include/esp32s2/rom/secure_boot.h diff --git a/components/esp_rom/include/esp32s2beta/rom/sha.h b/components/esp_rom/include/esp32s2/rom/sha.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/sha.h rename to components/esp_rom/include/esp32s2/rom/sha.h diff --git a/components/esp_rom/include/esp32s2beta/rom/spi_flash.h b/components/esp_rom/include/esp32s2/rom/spi_flash.h similarity index 99% rename from components/esp_rom/include/esp32s2beta/rom/spi_flash.h rename to components/esp_rom/include/esp32s2/rom/spi_flash.h index f74926acdf..1d9e8aa5e9 100644 --- a/components/esp_rom/include/esp32s2beta/rom/spi_flash.h +++ b/components/esp_rom/include/esp32s2/rom/spi_flash.h @@ -15,7 +15,7 @@ #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ -#ifndef CONFIG_IDF_TARGET_ESP32S2BETA +#ifndef CONFIG_IDF_TARGET_ESP32S2 #error This file should only be included for ESP32-S2 target #endif diff --git a/components/esp_rom/include/esp32s2beta/rom/tbconsole.h b/components/esp_rom/include/esp32s2/rom/tbconsole.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/tbconsole.h rename to components/esp_rom/include/esp32s2/rom/tbconsole.h diff --git a/components/esp_rom/include/esp32s2beta/rom/tjpgd.h b/components/esp_rom/include/esp32s2/rom/tjpgd.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/tjpgd.h rename to components/esp_rom/include/esp32s2/rom/tjpgd.h diff --git a/components/esp_rom/include/esp32s2beta/rom/uart.h b/components/esp_rom/include/esp32s2/rom/uart.h similarity index 100% rename from components/esp_rom/include/esp32s2beta/rom/uart.h rename to components/esp_rom/include/esp32s2/rom/uart.h diff --git a/components/esp_wifi/CMakeLists.txt b/components/esp_wifi/CMakeLists.txt index 8777b5dff3..a1664100c4 100644 --- a/components/esp_wifi/CMakeLists.txt +++ b/components/esp_wifi/CMakeLists.txt @@ -31,18 +31,24 @@ idf_component_register(SRCS "src/coexist.c" LDFRAGMENTS "${ldfragments}") idf_build_get_property(build_dir BUILD_DIR) -target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}") + +# ToDo: Rename esp32s2beta to esp32s2 next time update wifi lib +set(target_name "${idf_target}") +if(idf_target STREQUAL "esp32s2") + set(target_name "esp32s2beta") +endif() +target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}") if(link_binary_libs) if(CONFIG_IDF_TARGET_ESP32) set(phy phy) - elseif(CONFIG_IDF_TARGET_ESP32S2BETA) + elseif(CONFIG_IDF_TARGET_ESP32S2) # TODO: remove once final S2 chip is supported - if(CONFIG_ESP32S2_BETA_VERSION_A) + if(CONFIG_ESP32S2_VERSION_A) set(phy phyA) - elseif(CONFIG_ESP32S2_BETA_VERSION_B) + elseif(CONFIG_ESP32S2_VERSION_B) set(phy phyB) - elseif(CONFIG_ESP32S2_BETA_VERSION_MARLIN3) + elseif(CONFIG_ESP32S2_VERSION_MARLIN3) set(phy phy_marlin3) endif() endif() @@ -50,7 +56,7 @@ if(link_binary_libs) foreach(blob ${blobs}) add_library(${blob} STATIC IMPORTED) - set_property(TARGET ${blob} PROPERTY IMPORTED_LOCATION ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/lib${blob}.a) + set_property(TARGET ${blob} PROPERTY IMPORTED_LOCATION ${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/lib${blob}.a) target_link_libraries(${COMPONENT_LIB} PUBLIC ${blob}) foreach(_blob ${blobs}) @@ -89,12 +95,12 @@ if(CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION) # ToDo: remove once MP chip is supported if(CONFIG_IDF_TARGET_ESP32) set(phy_name "phy") - elseif(CONFIG_IDF_TARGET_ESP32S2BETA) - if(CONFIG_ESP32S2BETA_VERSION_A) + elseif(CONFIG_IDF_TARGET_ESP32S2) + if(CONFIG_ESP32S2_VERSION_A) set(phy_name "phyA") - elseif(CONFIG_ESP32S2BETA_VERSION_B) + elseif(CONFIG_ESP32S2_VERSION_B) set(phy_name "phyB") - elseif(CONFIG_ESP32S2BETA_VERSION_MARLIN3) + elseif(CONFIG_ESP32S2_VERSION_MARLIN3) set(phy_name "phy_marlin3") endif() endif() diff --git a/components/esp_wifi/esp32s2beta/esp_adapter.c b/components/esp_wifi/esp32s2/esp_adapter.c similarity index 99% rename from components/esp_wifi/esp32s2beta/esp_adapter.c rename to components/esp_wifi/esp32s2/esp_adapter.c index 012a39f891..9e7614dbba 100644 --- a/components/esp_wifi/esp32s2beta/esp_adapter.c +++ b/components/esp_wifi/esp32s2/esp_adapter.c @@ -38,7 +38,7 @@ #include "esp_private/wifi_os_adapter.h" #include "esp_private/wifi.h" #include "esp_phy_init.h" -#include "esp32s2beta/clk.h" +#include "esp32s2/clk.h" #include "driver/periph_ctrl.h" #include "nvs.h" #include "os.h" diff --git a/components/esp_wifi/esp32s2beta/include/phy_init_data.h b/components/esp_wifi/esp32s2/include/phy_init_data.h similarity index 100% rename from components/esp_wifi/esp32s2beta/include/phy_init_data.h rename to components/esp_wifi/esp32s2/include/phy_init_data.h diff --git a/components/esp_wifi/include/phy.h b/components/esp_wifi/include/phy.h index b101200411..74eae0e6c2 100644 --- a/components/esp_wifi/include/phy.h +++ b/components/esp_wifi/include/phy.h @@ -59,7 +59,7 @@ void phy_set_wifi_mode_only(bool wifi_only); */ void coex_bt_high_prio(void); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 /** * @brief Open PHY and RF. */ diff --git a/components/esp_wifi/src/phy_init.c b/components/esp_wifi/src/phy_init.c index 7ba00f1031..452fe97a97 100644 --- a/components/esp_wifi/src/phy_init.c +++ b/components/esp_wifi/src/phy_init.c @@ -38,9 +38,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/rtc.h" #endif #if CONFIG_IDF_TARGET_ESP32 @@ -241,7 +241,7 @@ esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibrat esp_phy_common_clock_enable(); phy_set_wifi_mode_only(0); -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 if (module == PHY_MODEM_MODULE) { phy_wakeup_init(); } @@ -681,7 +681,7 @@ static esp_err_t store_cal_data_to_nvs_handle(nvs_handle_t handle, } #if CONFIG_ESP32_REDUCE_PHY_TX_POWER -// TODO: fix the esp_phy_reduce_tx_power unused warning for esp32s2beta - IDF-759 +// TODO: fix the esp_phy_reduce_tx_power unused warning for esp32s2 - IDF-759 static void __attribute((unused)) esp_phy_reduce_tx_power(esp_phy_init_data_t* init_data) { uint8_t i; diff --git a/components/esp_wifi/test/test_phy_rtc.c b/components/esp_wifi/test/test_phy_rtc.c index e52b4b3966..53ba4fbc49 100644 --- a/components/esp_wifi/test/test_phy_rtc.c +++ b/components/esp_wifi/test/test_phy_rtc.c @@ -13,7 +13,7 @@ #include #include "soc/soc_caps.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //Function just extern, need not test #ifdef SOC_BT_SUPPORTED diff --git a/components/esp_wifi/test/test_wifi.c b/components/esp_wifi/test/test_wifi.c index 7761b95bf2..c0d49d2744 100644 --- a/components/esp_wifi/test/test_wifi.c +++ b/components/esp_wifi/test/test_wifi.c @@ -169,7 +169,7 @@ TEST_CASE("wifi stop and deinit","[wifi]") TEST_IGNORE_MESSAGE("this test case is ignored due to the critical memory leak of esp_netif and event_loop."); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static void start_wifi_as_softap(void) { diff --git a/components/esp_wifi/test_md5/test_md5.sh b/components/esp_wifi/test_md5/test_md5.sh index 28a72beada..6a55239ce3 100755 --- a/components/esp_wifi/test_md5/test_md5.sh +++ b/components/esp_wifi/test_md5/test_md5.sh @@ -17,7 +17,7 @@ case $IDF_TARGET in PREFIX=xtensa-esp32-elf- LIB_DIR=esp32 ;; - esp32s2beta) + esp32s2) PREFIX=xtensa-esp32s2-elf- LIB_DIR=esp32s2beta ;; diff --git a/components/espcoredump/include_core_dump/esp_core_dump_port.h b/components/espcoredump/include_core_dump/esp_core_dump_port.h index b6ea923c0f..14c03991b5 100644 --- a/components/espcoredump/include_core_dump/esp_core_dump_port.h +++ b/components/espcoredump/include_core_dump/esp_core_dump_port.h @@ -18,8 +18,8 @@ #if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/crc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/crc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/crc.h" #endif #elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #include "mbedtls/sha256.h" @@ -35,7 +35,7 @@ extern "C" { #if CONFIG_IDF_TARGET_ESP32 #define COREDUMP_VERSION_CHIP ESP_CHIP_ID_ESP32 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // TODO: set to ESP32-S2 chip ID #define COREDUMP_VERSION_CHIP ~ESP_CHIP_ID_ESP32 #endif diff --git a/components/espcoredump/src/core_dump_flash.c b/components/espcoredump/src/core_dump_flash.c index c2a26c79ac..5d305ae7c9 100644 --- a/components/espcoredump/src/core_dump_flash.c +++ b/components/espcoredump/src/core_dump_flash.c @@ -18,8 +18,8 @@ #include "esp_flash_internal.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/crc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/crc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/crc.h" #endif const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_flash"; diff --git a/components/espcoredump/src/core_dump_uart.c b/components/espcoredump/src/core_dump_uart.c index cd614508f5..0a0ddb8ce6 100644 --- a/components/espcoredump/src/core_dump_uart.c +++ b/components/espcoredump/src/core_dump_uart.c @@ -20,9 +20,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/crc.h" #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/crc.h" -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/crc.h" +#include "esp32s2/clk.h" #endif const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_uart"; diff --git a/components/esptool_py/esptool b/components/esptool_py/esptool index 51fe3c19f1..939b3e987a 160000 --- a/components/esptool_py/esptool +++ b/components/esptool_py/esptool @@ -1 +1 @@ -Subproject commit 51fe3c19f1b999869d9b071665c9555f24df924c +Subproject commit 939b3e987ac6efde171add89ee26a34031058760 diff --git a/components/freertos/include/freertos/FreeRTOSConfig.h b/components/freertos/include/freertos/FreeRTOSConfig.h index 35370dd363..fcd5993016 100644 --- a/components/freertos/include/freertos/FreeRTOSConfig.h +++ b/components/freertos/include/freertos/FreeRTOSConfig.h @@ -123,8 +123,8 @@ int xt_clock_freq(void) __attribute__((deprecated)); #include /* for abort() */ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #if defined(CONFIG_FREERTOS_ASSERT_DISABLE) diff --git a/components/freertos/test/test_freertos_eventgroups.c b/components/freertos/test/test_freertos_eventgroups.c index 06d9741cca..9b3800a5aa 100644 --- a/components/freertos/test/test_freertos_eventgroups.c +++ b/components/freertos/test/test_freertos_eventgroups.c @@ -8,7 +8,7 @@ #include "driver/timer.h" #include "unity.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define int_clr_timers int_clr #define update update.update #define int_st_timers int_st diff --git a/components/freertos/test/test_freertos_task_delay_until.c b/components/freertos/test/test_freertos_task_delay_until.c index 75d3f429fb..e223b083a9 100644 --- a/components/freertos/test/test_freertos_task_delay_until.c +++ b/components/freertos/test/test_freertos_task_delay_until.c @@ -25,7 +25,7 @@ #define TICKS_TO_MS(x) (((x)*1000)/TICK_RATE) #define REF_TO_ROUND_MS(x) (((x)+500)/1000) -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static SemaphoreHandle_t task_delete_semphr; @@ -75,4 +75,4 @@ TEST_CASE("Test vTaskDelayUntil", "[freertos]") ref_clock_deinit(); } -#endif // CONFIG_IDF_TARGET_ESP32S2BETA +#endif // CONFIG_IDF_TARGET_ESP32S2 diff --git a/components/freertos/test/test_freertos_task_notify.c b/components/freertos/test/test_freertos_task_notify.c index 311bfd73b4..c7961fe3b8 100644 --- a/components/freertos/test/test_freertos_task_notify.c +++ b/components/freertos/test/test_freertos_task_notify.c @@ -15,7 +15,7 @@ #include "unity.h" #include "test_utils.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define int_clr_timers int_clr #define update update.update #define int_st_timers int_st diff --git a/components/freertos/test/test_suspend_scheduler.c b/components/freertos/test/test_suspend_scheduler.c index 1415c35326..24135ec9f2 100644 --- a/components/freertos/test/test_suspend_scheduler.c +++ b/components/freertos/test/test_suspend_scheduler.c @@ -13,7 +13,7 @@ #include "driver/timer.h" #include "sdkconfig.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define int_clr_timers int_clr #define update update.update #define int_st_timers int_st diff --git a/components/freertos/test/test_task_suspend_resume.c b/components/freertos/test/test_task_suspend_resume.c index 8fba220a2c..ec8eb9e91b 100644 --- a/components/freertos/test/test_task_suspend_resume.c +++ b/components/freertos/test/test_task_suspend_resume.c @@ -18,7 +18,7 @@ #include "esp_freertos_hooks.h" #include "sdkconfig.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define int_clr_timers int_clr #define update update.update #define int_st_timers int_st diff --git a/components/freertos/test/test_thread_local.c b/components/freertos/test/test_thread_local.c index d2d97caa23..33de6c4209 100644 --- a/components/freertos/test/test_thread_local.c +++ b/components/freertos/test/test_thread_local.c @@ -11,7 +11,7 @@ #include "test_utils.h" #include "sdkconfig.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static __thread int tl_test_var1; static __thread uint8_t tl_test_var2 = 55; diff --git a/components/freertos/xtensa_init.c b/components/freertos/xtensa_init.c index b8cd5f7fff..8581c5bbbb 100644 --- a/components/freertos/xtensa_init.c +++ b/components/freertos/xtensa_init.c @@ -37,8 +37,8 @@ that are implemented in C. #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif #ifdef XT_RTOS_TIMER_INT diff --git a/components/heap/multi_heap_platform.h b/components/heap/multi_heap_platform.h index b64a634032..5a05d81f9d 100644 --- a/components/heap/multi_heap_platform.h +++ b/components/heap/multi_heap_platform.h @@ -19,8 +19,8 @@ #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #include diff --git a/components/idf_test/include/idf_performance.h b/components/idf_test/include/idf_performance.h index 0aea1b3506..ede5abd8e6 100644 --- a/components/idf_test/include/idf_performance.h +++ b/components/idf_test/include/idf_performance.h @@ -60,7 +60,7 @@ #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 65000 #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 850000 -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 #define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 14.4 // SHA256 hardware throughput at 240MHz, threshold set lower than worst case @@ -74,7 +74,7 @@ #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 60000 #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 600000 -#endif //CONFIG_IDF_TARGET_ESP32S2BETA +#endif //CONFIG_IDF_TARGET_ESP32S2 //time to perform the task selection plus context switch (from task) #define IDF_PERFORMANCE_MAX_SCHEDULING_TIME 1500 diff --git a/components/libsodium/test/test_sodium.c b/components/libsodium/test/test_sodium.c index 9ff9f3858b..470007b9a8 100644 --- a/components/libsodium/test/test_sodium.c +++ b/components/libsodium/test/test_sodium.c @@ -37,7 +37,7 @@ TEST_CASE("box tests", "[libsodium]") TEST_ASSERT_EQUAL(0, box2_xmain()); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) extern int ed25519_convert_xmain(void); TEST_CASE("ed25519_convert tests", "[libsodium][timeout=60]") diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h index 994174ec4b..858284ffb1 100644 --- a/components/log/include/esp_log.h +++ b/components/log/include/esp_log.h @@ -20,8 +20,8 @@ #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #ifdef __cplusplus diff --git a/components/mbedtls/port/esp32s2beta/aes.c b/components/mbedtls/port/esp32s2/aes.c similarity index 99% rename from components/mbedtls/port/esp32s2beta/aes.c rename to components/mbedtls/port/esp32s2/aes.c index ab28518354..47e33d7ec6 100644 --- a/components/mbedtls/port/esp32s2beta/aes.c +++ b/components/mbedtls/port/esp32s2/aes.c @@ -29,16 +29,16 @@ #include #include #include "mbedtls/aes.h" -#include "esp32s2beta/aes.h" -#include "esp32s2beta/gcm.h" +#include "esp32s2/aes.h" +#include "esp32s2/gcm.h" #include "soc/soc.h" #include "soc/cpu.h" #include "soc/dport_reg.h" #include "soc/hwcrypto_reg.h" #include "soc/crypto_dma_reg.h" -#include "esp32s2beta/crypto_dma.h" -#include "esp32s2beta/rom/lldesc.h" -#include "esp32s2beta/rom/cache.h" +#include "esp32s2/crypto_dma.h" +#include "esp32s2/rom/lldesc.h" +#include "esp32s2/rom/cache.h" #include "soc/periph_defs.h" #include "esp_intr_alloc.h" diff --git a/components/mbedtls/port/esp32s2beta/esp_bignum.c b/components/mbedtls/port/esp32s2/esp_bignum.c similarity index 99% rename from components/mbedtls/port/esp32s2beta/esp_bignum.c rename to components/mbedtls/port/esp32s2/esp_bignum.c index da1f902899..104bcebe99 100644 --- a/components/mbedtls/port/esp32s2beta/esp_bignum.c +++ b/components/mbedtls/port/esp32s2/esp_bignum.c @@ -28,7 +28,7 @@ #include #include #include "mbedtls/bignum.h" -#include "esp32s2beta/rom/bigint.h" +#include "esp32s2/rom/bigint.h" #include "soc/hwcrypto_reg.h" #include "esp_system.h" #include "esp_log.h" diff --git a/components/mbedtls/port/esp32s2beta/sha.c b/components/mbedtls/port/esp32s2/sha.c similarity index 97% rename from components/mbedtls/port/esp32s2beta/sha.c rename to components/mbedtls/port/esp32s2/sha.c index 9939a626f4..d854aa98cc 100644 --- a/components/mbedtls/port/esp32s2beta/sha.c +++ b/components/mbedtls/port/esp32s2/sha.c @@ -30,14 +30,14 @@ #include #include #include "soc/soc.h" -#include "esp32s2beta/crypto_dma.h" -#include "esp32s2beta/sha.h" +#include "esp32s2/crypto_dma.h" +#include "esp32s2/sha.h" #include "soc/crypto_dma_reg.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" #include "soc/dport_reg.h" #include "soc/hwcrypto_reg.h" -#include "esp32s2beta/rom/lldesc.h" -#include "esp32s2beta/rom/cache.h" +#include "esp32s2/rom/lldesc.h" +#include "esp32s2/rom/cache.h" #include "esp_intr_alloc.h" #include "esp_log.h" #include "soc/periph_defs.h" diff --git a/components/mbedtls/port/esp_sha.c b/components/mbedtls/port/esp_sha.c index 8d2242eff5..be94473792 100644 --- a/components/mbedtls/port/esp_sha.c +++ b/components/mbedtls/port/esp_sha.c @@ -17,8 +17,8 @@ #include #if CONFIG_IDF_TARGET_ESP32 #include "esp32/sha.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/sha.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/sha.h" #endif #include diff --git a/components/mbedtls/port/esp_sha1.c b/components/mbedtls/port/esp_sha1.c index 6370090703..893afb44fb 100644 --- a/components/mbedtls/port/esp_sha1.c +++ b/components/mbedtls/port/esp_sha1.c @@ -49,8 +49,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/sha.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/sha.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/sha.h" #endif /* Implementation that should never be optimized out by the compiler */ diff --git a/components/mbedtls/port/esp_sha256.c b/components/mbedtls/port/esp_sha256.c index 7ec7913b6a..df31ec022e 100644 --- a/components/mbedtls/port/esp_sha256.c +++ b/components/mbedtls/port/esp_sha256.c @@ -50,8 +50,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/sha.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/sha.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/sha.h" #endif /* Implementation that should never be optimized out by the compiler */ diff --git a/components/mbedtls/port/esp_sha512.c b/components/mbedtls/port/esp_sha512.c index bd399babf2..d2b89122d8 100644 --- a/components/mbedtls/port/esp_sha512.c +++ b/components/mbedtls/port/esp_sha512.c @@ -56,8 +56,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/sha.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/sha.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/sha.h" #endif inline static esp_sha_type sha_type(const mbedtls_sha512_context *ctx) diff --git a/components/mbedtls/port/include/aes_alt.h b/components/mbedtls/port/include/aes_alt.h index 411f710496..ee6cfed6b0 100644 --- a/components/mbedtls/port/include/aes_alt.h +++ b/components/mbedtls/port/include/aes_alt.h @@ -30,8 +30,8 @@ extern "C" { #if defined(MBEDTLS_AES_ALT) #if CONFIG_IDF_TARGET_ESP32 #include "esp32/aes.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/aes.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/aes.h" #endif typedef esp_aes_context mbedtls_aes_context; diff --git a/components/mbedtls/port/include/esp32s2beta/aes.h b/components/mbedtls/port/include/esp32s2/aes.h similarity index 99% rename from components/mbedtls/port/include/esp32s2beta/aes.h rename to components/mbedtls/port/include/esp32s2/aes.h index 3a3419bf6d..b89da1350c 100644 --- a/components/mbedtls/port/include/esp32s2beta/aes.h +++ b/components/mbedtls/port/include/esp32s2/aes.h @@ -25,7 +25,7 @@ #define ESP_AES_H #include "esp_types.h" -#include "esp32s2beta/rom/aes.h" +#include "esp32s2/rom/aes.h" #ifdef __cplusplus extern "C" { diff --git a/components/mbedtls/port/include/esp32s2beta/crypto_dma.h b/components/mbedtls/port/include/esp32s2/crypto_dma.h similarity index 100% rename from components/mbedtls/port/include/esp32s2beta/crypto_dma.h rename to components/mbedtls/port/include/esp32s2/crypto_dma.h diff --git a/components/mbedtls/port/include/esp32s2beta/gcm.h b/components/mbedtls/port/include/esp32s2/gcm.h similarity index 100% rename from components/mbedtls/port/include/esp32s2beta/gcm.h rename to components/mbedtls/port/include/esp32s2/gcm.h diff --git a/components/mbedtls/port/include/esp32s2beta/sha.h b/components/mbedtls/port/include/esp32s2/sha.h similarity index 99% rename from components/mbedtls/port/include/esp32s2beta/sha.h rename to components/mbedtls/port/include/esp32s2/sha.h index c063ff9215..70acad343a 100644 --- a/components/mbedtls/port/include/esp32s2beta/sha.h +++ b/components/mbedtls/port/include/esp32s2/sha.h @@ -15,7 +15,7 @@ #ifndef _ESP_SHA_H_ #define _ESP_SHA_H_ -#include "esp32s2beta/rom/sha.h" +#include "esp32s2/rom/sha.h" #include "esp_types.h" /** @brief Low-level support functions for the hardware SHA engine diff --git a/components/mbedtls/test/test_mbedtls_sha.c b/components/mbedtls/test/test_mbedtls_sha.c index 1798f0015d..64eae72444 100644 --- a/components/mbedtls/test/test_mbedtls_sha.c +++ b/components/mbedtls/test/test_mbedtls_sha.c @@ -256,7 +256,7 @@ TEST_CASE("mbedtls SHA256 clone", "[mbedtls]") TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha256_thousand_as, sha256, 32, "SHA256 cloned calculation"); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) typedef struct { mbedtls_sha256_context ctx; uint8_t result[32]; diff --git a/components/newlib/syscall_table.c b/components/newlib/syscall_table.c index 969dde9586..778a1628be 100644 --- a/components/newlib/syscall_table.c +++ b/components/newlib/syscall_table.c @@ -1,4 +1,4 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD +// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -22,11 +22,16 @@ #include #include #include -#include "esp32/rom/libc_stubs.h" #include "esp_vfs.h" #include "esp_newlib.h" #include "sdkconfig.h" +#if CONFIG_IDF_TARGET_ESP32 +#include "esp32/rom/libc_stubs.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/libc_stubs.h" +#endif + static struct _reent s_reent; extern int _printf_float(struct _reent *rptr, @@ -93,7 +98,9 @@ static struct syscall_stub_table s_stub_table = { void esp_setup_syscall_table(void) { syscall_table_ptr_pro = &s_stub_table; +#if !CONFIG_FREERTOS_UNICORE syscall_table_ptr_app = &s_stub_table; +#endif _GLOBAL_REENT = &s_reent; environ = malloc(sizeof(char*)); environ[0] = NULL; diff --git a/components/newlib/time.c b/components/newlib/time.c index b1d25af153..b62c699997 100644 --- a/components/newlib/time.c +++ b/components/newlib/time.c @@ -37,10 +37,10 @@ #include "esp32/rom/ets_sys.h" #include "esp32/clk.h" #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/ets_sys.h" #endif #ifdef CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS diff --git a/components/sdmmc/test/test_sd.c b/components/sdmmc/test/test_sd.c index a45e35d126..8c745d8783 100644 --- a/components/sdmmc/test/test_sd.c +++ b/components/sdmmc/test/test_sd.c @@ -159,7 +159,7 @@ TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]") #endif -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs) { @@ -192,7 +192,7 @@ TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]") probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10); } -#endif //DISABLED(ESP32S2BETA) +#endif //DISABLED(ESP32S2) // Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated // from 'rand' with the starting value of 'seed' @@ -322,7 +322,7 @@ TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]") #endif // WITH_EMMC_TEST #endif // SDMMC_HOST_SUPPORTED -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]") { @@ -339,7 +339,7 @@ TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT TEST_ESP_OK(sdspi_host_deinit()); sd_test_board_power_off(); } -#endif //DISABLED_FOR_TARGETS(ESP32S2BETA) +#endif //DISABLED_FOR_TARGETS(ESP32S2) #ifdef SOC_SDMMC_HOST_SUPPORTED TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]") @@ -422,7 +422,7 @@ TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]") } #endif -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") { @@ -438,7 +438,7 @@ TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") TEST_ESP_OK(sdspi_host_deinit()); sd_test_board_power_off(); } -#endif //DISABLED_FOR_TARGETS(ESP32S2BETA) +#endif //DISABLED_FOR_TARGETS(ESP32S2) __attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config) { @@ -490,7 +490,7 @@ TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]") } #endif -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) //No runners TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") { @@ -506,4 +506,4 @@ TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") TEST_ESP_OK(sdspi_host_deinit()); sd_test_board_power_off(); } -#endif //DISABLED_FOR_TARGETS(ESP32S2BETA) \ No newline at end of file +#endif //DISABLED_FOR_TARGETS(ESP32S2) \ No newline at end of file diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt index 07e3042328..21cab72461 100644 --- a/components/soc/CMakeLists.txt +++ b/components/soc/CMakeLists.txt @@ -45,7 +45,7 @@ if(IDF_TARGET STREQUAL "esp32") ) endif() -if(IDF_TARGET STREQUAL "esp32s2beta") +if(IDF_TARGET STREQUAL "esp32s2") list(APPEND srcs "src/hal/spi_flash_hal_gpspi.c") endif() diff --git a/components/soc/esp32s2beta/adc_periph.c b/components/soc/esp32s2/adc_periph.c similarity index 100% rename from components/soc/esp32s2beta/adc_periph.c rename to components/soc/esp32s2/adc_periph.c diff --git a/components/soc/esp32s2/component.mk b/components/soc/esp32s2/component.mk new file mode 100644 index 0000000000..611b717d74 --- /dev/null +++ b/components/soc/esp32s2/component.mk @@ -0,0 +1 @@ +esp32s2/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion diff --git a/components/soc/esp32s2beta/cpu_util.c b/components/soc/esp32s2/cpu_util.c similarity index 100% rename from components/soc/esp32s2beta/cpu_util.c rename to components/soc/esp32s2/cpu_util.c diff --git a/components/soc/esp32s2beta/dac_periph.c b/components/soc/esp32s2/dac_periph.c similarity index 100% rename from components/soc/esp32s2beta/dac_periph.c rename to components/soc/esp32s2/dac_periph.c diff --git a/components/soc/esp32s2beta/gpio_periph.c b/components/soc/esp32s2/gpio_periph.c similarity index 100% rename from components/soc/esp32s2beta/gpio_periph.c rename to components/soc/esp32s2/gpio_periph.c diff --git a/components/soc/esp32s2beta/i2c_apll.h b/components/soc/esp32s2/i2c_apll.h similarity index 100% rename from components/soc/esp32s2beta/i2c_apll.h rename to components/soc/esp32s2/i2c_apll.h diff --git a/components/soc/esp32s2beta/i2c_bbpll.h b/components/soc/esp32s2/i2c_bbpll.h similarity index 100% rename from components/soc/esp32s2beta/i2c_bbpll.h rename to components/soc/esp32s2/i2c_bbpll.h diff --git a/components/soc/esp32s2beta/i2c_periph.c b/components/soc/esp32s2/i2c_periph.c similarity index 100% rename from components/soc/esp32s2beta/i2c_periph.c rename to components/soc/esp32s2/i2c_periph.c diff --git a/components/soc/esp32s2beta/i2c_rtc_clk.h b/components/soc/esp32s2/i2c_rtc_clk.h similarity index 100% rename from components/soc/esp32s2beta/i2c_rtc_clk.h rename to components/soc/esp32s2/i2c_rtc_clk.h diff --git a/components/soc/esp32s2beta/i2s_periph.c b/components/soc/esp32s2/i2s_periph.c similarity index 100% rename from components/soc/esp32s2beta/i2s_periph.c rename to components/soc/esp32s2/i2s_periph.c diff --git a/components/soc/esp32s2beta/include/hal/adc_ll.h b/components/soc/esp32s2/include/hal/adc_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/adc_ll.h rename to components/soc/esp32s2/include/hal/adc_ll.h diff --git a/components/soc/esp32s2beta/include/hal/dac_ll.h b/components/soc/esp32s2/include/hal/dac_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/dac_ll.h rename to components/soc/esp32s2/include/hal/dac_ll.h diff --git a/components/soc/esp32s2beta/include/hal/gpio_ll.h b/components/soc/esp32s2/include/hal/gpio_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/gpio_ll.h rename to components/soc/esp32s2/include/hal/gpio_ll.h diff --git a/components/soc/esp32s2beta/include/hal/gpspi_flash_ll.h b/components/soc/esp32s2/include/hal/gpspi_flash_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/gpspi_flash_ll.h rename to components/soc/esp32s2/include/hal/gpspi_flash_ll.h diff --git a/components/soc/esp32s2beta/include/hal/i2c_ll.h b/components/soc/esp32s2/include/hal/i2c_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/i2c_ll.h rename to components/soc/esp32s2/include/hal/i2c_ll.h diff --git a/components/soc/esp32s2beta/include/hal/i2s_ll.h b/components/soc/esp32s2/include/hal/i2s_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/i2s_ll.h rename to components/soc/esp32s2/include/hal/i2s_ll.h diff --git a/components/soc/esp32s2beta/include/hal/ledc_ll.h b/components/soc/esp32s2/include/hal/ledc_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/ledc_ll.h rename to components/soc/esp32s2/include/hal/ledc_ll.h diff --git a/components/soc/esp32s2beta/include/hal/pcnt_ll.h b/components/soc/esp32s2/include/hal/pcnt_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/pcnt_ll.h rename to components/soc/esp32s2/include/hal/pcnt_ll.h diff --git a/components/soc/esp32s2beta/include/hal/rmt_ll.h b/components/soc/esp32s2/include/hal/rmt_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/rmt_ll.h rename to components/soc/esp32s2/include/hal/rmt_ll.h diff --git a/components/soc/esp32s2beta/include/hal/rtc_io_ll.h b/components/soc/esp32s2/include/hal/rtc_io_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/rtc_io_ll.h rename to components/soc/esp32s2/include/hal/rtc_io_ll.h diff --git a/components/soc/esp32s2beta/include/hal/sigmadelta_ll.h b/components/soc/esp32s2/include/hal/sigmadelta_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/sigmadelta_ll.h rename to components/soc/esp32s2/include/hal/sigmadelta_ll.h diff --git a/components/soc/esp32s2beta/include/hal/spi_flash_ll.h b/components/soc/esp32s2/include/hal/spi_flash_ll.h similarity index 98% rename from components/soc/esp32s2beta/include/hal/spi_flash_ll.h rename to components/soc/esp32s2/include/hal/spi_flash_ll.h index cae39f4f91..1c145dbd48 100644 --- a/components/soc/esp32s2beta/include/hal/spi_flash_ll.h +++ b/components/soc/esp32s2/include/hal/spi_flash_ll.h @@ -25,7 +25,7 @@ #include "gpspi_flash_ll.h" #include "spimem_flash_ll.h" -// For esp32s2beta, spimem is equivalent to traditional spi peripherals found +// For esp32s2, spimem is equivalent to traditional spi peripherals found // in esp32. Let the spi flash clock reg definitions reflect this. #define SPI_FLASH_LL_CLKREG_VAL_5MHZ {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_5MHZ} #define SPI_FLASH_LL_CLKREG_VAL_10MHZ {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_10MHZ} diff --git a/components/soc/esp32s2beta/include/hal/spi_ll.h b/components/soc/esp32s2/include/hal/spi_ll.h similarity index 99% rename from components/soc/esp32s2beta/include/hal/spi_ll.h rename to components/soc/esp32s2/include/hal/spi_ll.h index 814a865a60..6b8053ce79 100644 --- a/components/soc/esp32s2beta/include/hal/spi_ll.h +++ b/components/soc/esp32s2/include/hal/spi_ll.h @@ -18,7 +18,7 @@ * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The LL layer for ESP32s2beta SPI register operations +// The LL layer for ESP32-S2 SPI register operations #pragma once @@ -27,7 +27,7 @@ #include "hal/hal_defs.h" #include "esp_types.h" #include "soc/spi_periph.h" -#include "esp32s2beta/rom/lldesc.h" +#include "esp32s2/rom/lldesc.h" /// Registers to reset during initialization. Don't use in app. #define SPI_LL_RST_MASK (SPI_OUT_RST | SPI_IN_RST | SPI_AHBM_RST | SPI_AHBM_FIFO_RST) diff --git a/components/soc/esp32s2beta/include/hal/spimem_flash_ll.h b/components/soc/esp32s2/include/hal/spimem_flash_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/spimem_flash_ll.h rename to components/soc/esp32s2/include/hal/spimem_flash_ll.h diff --git a/components/soc/esp32s2beta/include/hal/timer_ll.h b/components/soc/esp32s2/include/hal/timer_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/timer_ll.h rename to components/soc/esp32s2/include/hal/timer_ll.h diff --git a/components/soc/esp32s2beta/include/hal/touch_sensor_hal_esp32s2beta.h b/components/soc/esp32s2/include/hal/touch_sensor_hal_esp32s2.h similarity index 99% rename from components/soc/esp32s2beta/include/hal/touch_sensor_hal_esp32s2beta.h rename to components/soc/esp32s2/include/hal/touch_sensor_hal_esp32s2.h index 14beb29255..ff0315abbc 100644 --- a/components/soc/esp32s2beta/include/hal/touch_sensor_hal_esp32s2beta.h +++ b/components/soc/esp32s2/include/hal/touch_sensor_hal_esp32s2.h @@ -18,7 +18,7 @@ * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The HAL layer for touch sensor (esp32s2beta specific part) +// The HAL layer for touch sensor (esp32s2 specific part) #pragma once diff --git a/components/soc/esp32s2beta/include/hal/touch_sensor_ll.h b/components/soc/esp32s2/include/hal/touch_sensor_ll.h similarity index 99% rename from components/soc/esp32s2beta/include/hal/touch_sensor_ll.h rename to components/soc/esp32s2/include/hal/touch_sensor_ll.h index 3f0075c72f..8cc54b68b1 100644 --- a/components/soc/esp32s2beta/include/hal/touch_sensor_ll.h +++ b/components/soc/esp32s2/include/hal/touch_sensor_ll.h @@ -405,7 +405,7 @@ static inline bool touch_ll_meas_is_done(void) return (bool)SENS.sar_touch_chn_st.touch_meas_done; } -/************************* esp32s2beta only *************************/ +/************************* esp32s2 only *************************/ /** * Reset the whole of touch module. diff --git a/components/soc/esp32s2beta/include/hal/uart_ll.h b/components/soc/esp32s2/include/hal/uart_ll.h similarity index 100% rename from components/soc/esp32s2beta/include/hal/uart_ll.h rename to components/soc/esp32s2/include/hal/uart_ll.h diff --git a/components/soc/esp32s2beta/include/soc/adc_caps.h b/components/soc/esp32s2/include/soc/adc_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/adc_caps.h rename to components/soc/esp32s2/include/soc/adc_caps.h diff --git a/components/soc/esp32s2beta/include/soc/adc_channel.h b/components/soc/esp32s2/include/soc/adc_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/adc_channel.h rename to components/soc/esp32s2/include/soc/adc_channel.h diff --git a/components/soc/esp32s2beta/include/soc/apb_ctrl_reg.h b/components/soc/esp32s2/include/soc/apb_ctrl_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/apb_ctrl_reg.h rename to components/soc/esp32s2/include/soc/apb_ctrl_reg.h diff --git a/components/soc/esp32s2beta/include/soc/apb_ctrl_struct.h b/components/soc/esp32s2/include/soc/apb_ctrl_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/apb_ctrl_struct.h rename to components/soc/esp32s2/include/soc/apb_ctrl_struct.h diff --git a/components/soc/esp32s2beta/include/soc/apb_saradc_reg.h b/components/soc/esp32s2/include/soc/apb_saradc_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/apb_saradc_reg.h rename to components/soc/esp32s2/include/soc/apb_saradc_reg.h diff --git a/components/soc/esp32s2beta/include/soc/apb_saradc_struct.h b/components/soc/esp32s2/include/soc/apb_saradc_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/apb_saradc_struct.h rename to components/soc/esp32s2/include/soc/apb_saradc_struct.h diff --git a/components/soc/esp32s2beta/include/soc/assist_debug_reg.h b/components/soc/esp32s2/include/soc/assist_debug_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/assist_debug_reg.h rename to components/soc/esp32s2/include/soc/assist_debug_reg.h diff --git a/components/soc/esp32s2beta/include/soc/bb_reg.h b/components/soc/esp32s2/include/soc/bb_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/bb_reg.h rename to components/soc/esp32s2/include/soc/bb_reg.h diff --git a/components/soc/esp32s2beta/include/soc/boot_mode.h b/components/soc/esp32s2/include/soc/boot_mode.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/boot_mode.h rename to components/soc/esp32s2/include/soc/boot_mode.h diff --git a/components/soc/esp32s2beta/include/soc/cache_memory.h b/components/soc/esp32s2/include/soc/cache_memory.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/cache_memory.h rename to components/soc/esp32s2/include/soc/cache_memory.h diff --git a/components/soc/esp32s2beta/include/soc/clkout_channel.h b/components/soc/esp32s2/include/soc/clkout_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/clkout_channel.h rename to components/soc/esp32s2/include/soc/clkout_channel.h diff --git a/components/soc/esp32s2beta/include/soc/cpu.h b/components/soc/esp32s2/include/soc/cpu.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/cpu.h rename to components/soc/esp32s2/include/soc/cpu.h diff --git a/components/soc/esp32s2beta/include/soc/crypto_dma_reg.h b/components/soc/esp32s2/include/soc/crypto_dma_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/crypto_dma_reg.h rename to components/soc/esp32s2/include/soc/crypto_dma_reg.h diff --git a/components/soc/esp32s2beta/include/soc/dac_caps.h b/components/soc/esp32s2/include/soc/dac_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/dac_caps.h rename to components/soc/esp32s2/include/soc/dac_caps.h diff --git a/components/soc/esp32s2beta/include/soc/dac_channel.h b/components/soc/esp32s2/include/soc/dac_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/dac_channel.h rename to components/soc/esp32s2/include/soc/dac_channel.h diff --git a/components/soc/esp32s2beta/include/soc/dport_access.h b/components/soc/esp32s2/include/soc/dport_access.h similarity index 99% rename from components/soc/esp32s2beta/include/soc/dport_access.h rename to components/soc/esp32s2/include/soc/dport_access.h index eee914e324..e5dfeda836 100644 --- a/components/soc/esp32s2beta/include/soc/dport_access.h +++ b/components/soc/esp32s2/include/soc/dport_access.h @@ -17,7 +17,7 @@ #include #include "esp_attr.h" -#include "esp32s2beta/dport_access.h" +#include "esp32s2/dport_access.h" #include "soc.h" #include "uart_reg.h" #include "xtensa/xtruntime.h" diff --git a/components/soc/esp32s2beta/include/soc/dport_reg.h b/components/soc/esp32s2/include/soc/dport_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/dport_reg.h rename to components/soc/esp32s2/include/soc/dport_reg.h diff --git a/components/soc/esp32s2beta/include/soc/efuse_reg.h b/components/soc/esp32s2/include/soc/efuse_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/efuse_reg.h rename to components/soc/esp32s2/include/soc/efuse_reg.h diff --git a/components/soc/esp32s2beta/include/soc/efuse_struct.h b/components/soc/esp32s2/include/soc/efuse_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/efuse_struct.h rename to components/soc/esp32s2/include/soc/efuse_struct.h diff --git a/components/soc/esp32s2beta/include/soc/extmem_reg.h b/components/soc/esp32s2/include/soc/extmem_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/extmem_reg.h rename to components/soc/esp32s2/include/soc/extmem_reg.h diff --git a/components/soc/esp32s2beta/include/soc/fe_reg.h b/components/soc/esp32s2/include/soc/fe_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/fe_reg.h rename to components/soc/esp32s2/include/soc/fe_reg.h diff --git a/components/soc/esp32s2beta/include/soc/frc_timer_reg.h b/components/soc/esp32s2/include/soc/frc_timer_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/frc_timer_reg.h rename to components/soc/esp32s2/include/soc/frc_timer_reg.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_caps.h b/components/soc/esp32s2/include/soc/gpio_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_caps.h rename to components/soc/esp32s2/include/soc/gpio_caps.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_reg.h b/components/soc/esp32s2/include/soc/gpio_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_reg.h rename to components/soc/esp32s2/include/soc/gpio_reg.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_sd_reg.h b/components/soc/esp32s2/include/soc/gpio_sd_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_sd_reg.h rename to components/soc/esp32s2/include/soc/gpio_sd_reg.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_sd_struct.h b/components/soc/esp32s2/include/soc/gpio_sd_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_sd_struct.h rename to components/soc/esp32s2/include/soc/gpio_sd_struct.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_sig_map.h b/components/soc/esp32s2/include/soc/gpio_sig_map.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_sig_map.h rename to components/soc/esp32s2/include/soc/gpio_sig_map.h diff --git a/components/soc/esp32s2beta/include/soc/gpio_struct.h b/components/soc/esp32s2/include/soc/gpio_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/gpio_struct.h rename to components/soc/esp32s2/include/soc/gpio_struct.h diff --git a/components/soc/esp32s2beta/include/soc/hinf_reg.h b/components/soc/esp32s2/include/soc/hinf_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/hinf_reg.h rename to components/soc/esp32s2/include/soc/hinf_reg.h diff --git a/components/soc/esp32s2beta/include/soc/hinf_struct.h b/components/soc/esp32s2/include/soc/hinf_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/hinf_struct.h rename to components/soc/esp32s2/include/soc/hinf_struct.h diff --git a/components/soc/esp32s2beta/include/soc/host_reg.h b/components/soc/esp32s2/include/soc/host_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/host_reg.h rename to components/soc/esp32s2/include/soc/host_reg.h diff --git a/components/soc/esp32s2beta/include/soc/host_struct.h b/components/soc/esp32s2/include/soc/host_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/host_struct.h rename to components/soc/esp32s2/include/soc/host_struct.h diff --git a/components/soc/esp32s2beta/include/soc/hwcrypto_reg.h b/components/soc/esp32s2/include/soc/hwcrypto_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/hwcrypto_reg.h rename to components/soc/esp32s2/include/soc/hwcrypto_reg.h diff --git a/components/soc/esp32s2beta/include/soc/i2c_caps.h b/components/soc/esp32s2/include/soc/i2c_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2c_caps.h rename to components/soc/esp32s2/include/soc/i2c_caps.h diff --git a/components/soc/esp32s2beta/include/soc/i2c_reg.h b/components/soc/esp32s2/include/soc/i2c_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2c_reg.h rename to components/soc/esp32s2/include/soc/i2c_reg.h diff --git a/components/soc/esp32s2beta/include/soc/i2c_struct.h b/components/soc/esp32s2/include/soc/i2c_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2c_struct.h rename to components/soc/esp32s2/include/soc/i2c_struct.h diff --git a/components/soc/esp32s2beta/include/soc/i2s_caps.h b/components/soc/esp32s2/include/soc/i2s_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2s_caps.h rename to components/soc/esp32s2/include/soc/i2s_caps.h diff --git a/components/soc/esp32s2beta/include/soc/i2s_reg.h b/components/soc/esp32s2/include/soc/i2s_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2s_reg.h rename to components/soc/esp32s2/include/soc/i2s_reg.h diff --git a/components/soc/esp32s2beta/include/soc/i2s_struct.h b/components/soc/esp32s2/include/soc/i2s_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/i2s_struct.h rename to components/soc/esp32s2/include/soc/i2s_struct.h diff --git a/components/soc/esp32s2beta/include/soc/interrupt_reg.h b/components/soc/esp32s2/include/soc/interrupt_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/interrupt_reg.h rename to components/soc/esp32s2/include/soc/interrupt_reg.h diff --git a/components/soc/esp32s2beta/include/soc/io_mux_reg.h b/components/soc/esp32s2/include/soc/io_mux_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/io_mux_reg.h rename to components/soc/esp32s2/include/soc/io_mux_reg.h diff --git a/components/soc/esp32s2beta/include/soc/ledc_caps.h b/components/soc/esp32s2/include/soc/ledc_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/ledc_caps.h rename to components/soc/esp32s2/include/soc/ledc_caps.h diff --git a/components/soc/esp32s2beta/include/soc/ledc_reg.h b/components/soc/esp32s2/include/soc/ledc_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/ledc_reg.h rename to components/soc/esp32s2/include/soc/ledc_reg.h diff --git a/components/soc/esp32s2beta/include/soc/ledc_struct.h b/components/soc/esp32s2/include/soc/ledc_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/ledc_struct.h rename to components/soc/esp32s2/include/soc/ledc_struct.h diff --git a/components/soc/esp32s2beta/include/soc/mcpwm_reg.h b/components/soc/esp32s2/include/soc/mcpwm_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/mcpwm_reg.h rename to components/soc/esp32s2/include/soc/mcpwm_reg.h diff --git a/components/soc/esp32s2beta/include/soc/mcpwm_struct.h b/components/soc/esp32s2/include/soc/mcpwm_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/mcpwm_struct.h rename to components/soc/esp32s2/include/soc/mcpwm_struct.h diff --git a/components/soc/esp32s2beta/include/soc/nrx_reg.h b/components/soc/esp32s2/include/soc/nrx_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/nrx_reg.h rename to components/soc/esp32s2/include/soc/nrx_reg.h diff --git a/components/soc/esp32s2beta/include/soc/pcnt_caps.h b/components/soc/esp32s2/include/soc/pcnt_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/pcnt_caps.h rename to components/soc/esp32s2/include/soc/pcnt_caps.h diff --git a/components/soc/esp32s2beta/include/soc/pcnt_reg.h b/components/soc/esp32s2/include/soc/pcnt_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/pcnt_reg.h rename to components/soc/esp32s2/include/soc/pcnt_reg.h diff --git a/components/soc/esp32s2beta/include/soc/pcnt_struct.h b/components/soc/esp32s2/include/soc/pcnt_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/pcnt_struct.h rename to components/soc/esp32s2/include/soc/pcnt_struct.h diff --git a/components/soc/esp32s2beta/include/soc/periph_defs.h b/components/soc/esp32s2/include/soc/periph_defs.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/periph_defs.h rename to components/soc/esp32s2/include/soc/periph_defs.h diff --git a/components/soc/esp32s2beta/include/soc/rmt_caps.h b/components/soc/esp32s2/include/soc/rmt_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rmt_caps.h rename to components/soc/esp32s2/include/soc/rmt_caps.h diff --git a/components/soc/esp32s2beta/include/soc/rmt_reg.h b/components/soc/esp32s2/include/soc/rmt_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rmt_reg.h rename to components/soc/esp32s2/include/soc/rmt_reg.h diff --git a/components/soc/esp32s2beta/include/soc/rmt_struct.h b/components/soc/esp32s2/include/soc/rmt_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rmt_struct.h rename to components/soc/esp32s2/include/soc/rmt_struct.h diff --git a/components/soc/esp32s2beta/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc.h rename to components/soc/esp32s2/include/soc/rtc.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_cntl_reg.h b/components/soc/esp32s2/include/soc/rtc_cntl_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_cntl_reg.h rename to components/soc/esp32s2/include/soc/rtc_cntl_reg.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_cntl_struct.h b/components/soc/esp32s2/include/soc/rtc_cntl_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_cntl_struct.h rename to components/soc/esp32s2/include/soc/rtc_cntl_struct.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_i2c_reg.h b/components/soc/esp32s2/include/soc/rtc_i2c_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_i2c_reg.h rename to components/soc/esp32s2/include/soc/rtc_i2c_reg.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_i2c_struct.h b/components/soc/esp32s2/include/soc/rtc_i2c_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_i2c_struct.h rename to components/soc/esp32s2/include/soc/rtc_i2c_struct.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_io_caps.h b/components/soc/esp32s2/include/soc/rtc_io_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_io_caps.h rename to components/soc/esp32s2/include/soc/rtc_io_caps.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_io_channel.h b/components/soc/esp32s2/include/soc/rtc_io_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_io_channel.h rename to components/soc/esp32s2/include/soc/rtc_io_channel.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_io_reg.h b/components/soc/esp32s2/include/soc/rtc_io_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_io_reg.h rename to components/soc/esp32s2/include/soc/rtc_io_reg.h diff --git a/components/soc/esp32s2beta/include/soc/rtc_io_struct.h b/components/soc/esp32s2/include/soc/rtc_io_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/rtc_io_struct.h rename to components/soc/esp32s2/include/soc/rtc_io_struct.h diff --git a/components/soc/esp32s2beta/include/soc/sdio_slave_pins.h b/components/soc/esp32s2/include/soc/sdio_slave_pins.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sdio_slave_pins.h rename to components/soc/esp32s2/include/soc/sdio_slave_pins.h diff --git a/components/soc/esp32s2beta/include/soc/sdmmc_pins.h b/components/soc/esp32s2/include/soc/sdmmc_pins.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sdmmc_pins.h rename to components/soc/esp32s2/include/soc/sdmmc_pins.h diff --git a/components/soc/esp32s2beta/include/soc/sdmmc_reg.h b/components/soc/esp32s2/include/soc/sdmmc_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sdmmc_reg.h rename to components/soc/esp32s2/include/soc/sdmmc_reg.h diff --git a/components/soc/esp32s2beta/include/soc/sdmmc_struct.h b/components/soc/esp32s2/include/soc/sdmmc_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sdmmc_struct.h rename to components/soc/esp32s2/include/soc/sdmmc_struct.h diff --git a/components/soc/esp32s2beta/include/soc/sens_reg.h b/components/soc/esp32s2/include/soc/sens_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sens_reg.h rename to components/soc/esp32s2/include/soc/sens_reg.h diff --git a/components/soc/esp32s2beta/include/soc/sens_struct.h b/components/soc/esp32s2/include/soc/sens_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sens_struct.h rename to components/soc/esp32s2/include/soc/sens_struct.h diff --git a/components/soc/esp32s2beta/include/soc/sensitive_reg.h b/components/soc/esp32s2/include/soc/sensitive_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sensitive_reg.h rename to components/soc/esp32s2/include/soc/sensitive_reg.h diff --git a/components/soc/esp32s2beta/include/soc/sigmadelta_caps.h b/components/soc/esp32s2/include/soc/sigmadelta_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/sigmadelta_caps.h rename to components/soc/esp32s2/include/soc/sigmadelta_caps.h diff --git a/components/soc/esp32s2beta/include/soc/slc_reg.h b/components/soc/esp32s2/include/soc/slc_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/slc_reg.h rename to components/soc/esp32s2/include/soc/slc_reg.h diff --git a/components/soc/esp32s2beta/include/soc/slc_struct.h b/components/soc/esp32s2/include/soc/slc_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/slc_struct.h rename to components/soc/esp32s2/include/soc/slc_struct.h diff --git a/components/soc/esp32s2beta/include/soc/soc.h b/components/soc/esp32s2/include/soc/soc.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/soc.h rename to components/soc/esp32s2/include/soc/soc.h diff --git a/components/soc/esp32s2beta/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/soc_caps.h rename to components/soc/esp32s2/include/soc/soc_caps.h diff --git a/components/soc/esp32s2beta/include/soc/soc_ulp.h b/components/soc/esp32s2/include/soc/soc_ulp.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/soc_ulp.h rename to components/soc/esp32s2/include/soc/soc_ulp.h diff --git a/components/soc/esp32s2beta/include/soc/spi_caps.h b/components/soc/esp32s2/include/soc/spi_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_caps.h rename to components/soc/esp32s2/include/soc/spi_caps.h diff --git a/components/soc/esp32s2beta/include/soc/spi_mem_reg.h b/components/soc/esp32s2/include/soc/spi_mem_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_mem_reg.h rename to components/soc/esp32s2/include/soc/spi_mem_reg.h diff --git a/components/soc/esp32s2beta/include/soc/spi_mem_struct.h b/components/soc/esp32s2/include/soc/spi_mem_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_mem_struct.h rename to components/soc/esp32s2/include/soc/spi_mem_struct.h diff --git a/components/soc/esp32s2beta/include/soc/spi_pins.h b/components/soc/esp32s2/include/soc/spi_pins.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_pins.h rename to components/soc/esp32s2/include/soc/spi_pins.h diff --git a/components/soc/esp32s2beta/include/soc/spi_reg.h b/components/soc/esp32s2/include/soc/spi_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_reg.h rename to components/soc/esp32s2/include/soc/spi_reg.h diff --git a/components/soc/esp32s2beta/include/soc/spi_struct.h b/components/soc/esp32s2/include/soc/spi_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/spi_struct.h rename to components/soc/esp32s2/include/soc/spi_struct.h diff --git a/components/soc/esp32s2beta/include/soc/syscon_reg.h b/components/soc/esp32s2/include/soc/syscon_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/syscon_reg.h rename to components/soc/esp32s2/include/soc/syscon_reg.h diff --git a/components/soc/esp32s2beta/include/soc/syscon_struct.h b/components/soc/esp32s2/include/soc/syscon_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/syscon_struct.h rename to components/soc/esp32s2/include/soc/syscon_struct.h diff --git a/components/soc/esp32s2beta/include/soc/system_reg.h b/components/soc/esp32s2/include/soc/system_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/system_reg.h rename to components/soc/esp32s2/include/soc/system_reg.h diff --git a/components/soc/esp32s2beta/include/soc/timer_group_caps.h b/components/soc/esp32s2/include/soc/timer_group_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/timer_group_caps.h rename to components/soc/esp32s2/include/soc/timer_group_caps.h diff --git a/components/soc/esp32s2beta/include/soc/timer_group_reg.h b/components/soc/esp32s2/include/soc/timer_group_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/timer_group_reg.h rename to components/soc/esp32s2/include/soc/timer_group_reg.h diff --git a/components/soc/esp32s2beta/include/soc/timer_group_struct.h b/components/soc/esp32s2/include/soc/timer_group_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/timer_group_struct.h rename to components/soc/esp32s2/include/soc/timer_group_struct.h diff --git a/components/soc/esp32s2beta/include/soc/touch_sensor_caps.h b/components/soc/esp32s2/include/soc/touch_sensor_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/touch_sensor_caps.h rename to components/soc/esp32s2/include/soc/touch_sensor_caps.h diff --git a/components/soc/esp32s2beta/include/soc/touch_sensor_channel.h b/components/soc/esp32s2/include/soc/touch_sensor_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/touch_sensor_channel.h rename to components/soc/esp32s2/include/soc/touch_sensor_channel.h diff --git a/components/soc/esp32s2beta/include/soc/uart_caps.h b/components/soc/esp32s2/include/soc/uart_caps.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uart_caps.h rename to components/soc/esp32s2/include/soc/uart_caps.h diff --git a/components/soc/esp32s2beta/include/soc/uart_channel.h b/components/soc/esp32s2/include/soc/uart_channel.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uart_channel.h rename to components/soc/esp32s2/include/soc/uart_channel.h diff --git a/components/soc/esp32s2beta/include/soc/uart_reg.h b/components/soc/esp32s2/include/soc/uart_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uart_reg.h rename to components/soc/esp32s2/include/soc/uart_reg.h diff --git a/components/soc/esp32s2beta/include/soc/uart_struct.h b/components/soc/esp32s2/include/soc/uart_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uart_struct.h rename to components/soc/esp32s2/include/soc/uart_struct.h diff --git a/components/soc/esp32s2beta/include/soc/uhci_reg.h b/components/soc/esp32s2/include/soc/uhci_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uhci_reg.h rename to components/soc/esp32s2/include/soc/uhci_reg.h diff --git a/components/soc/esp32s2beta/include/soc/uhci_struct.h b/components/soc/esp32s2/include/soc/uhci_struct.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/uhci_struct.h rename to components/soc/esp32s2/include/soc/uhci_struct.h diff --git a/components/soc/esp32s2beta/include/soc/wdev_reg.h b/components/soc/esp32s2/include/soc/wdev_reg.h similarity index 100% rename from components/soc/esp32s2beta/include/soc/wdev_reg.h rename to components/soc/esp32s2/include/soc/wdev_reg.h diff --git a/components/soc/esp32s2beta/interrupts.c b/components/soc/esp32s2/interrupts.c similarity index 100% rename from components/soc/esp32s2beta/interrupts.c rename to components/soc/esp32s2/interrupts.c diff --git a/components/soc/esp32s2beta/ledc_periph.c b/components/soc/esp32s2/ledc_periph.c similarity index 100% rename from components/soc/esp32s2beta/ledc_periph.c rename to components/soc/esp32s2/ledc_periph.c diff --git a/components/soc/esp32s2beta/rtc_clk.c b/components/soc/esp32s2/rtc_clk.c similarity index 99% rename from components/soc/esp32s2beta/rtc_clk.c rename to components/soc/esp32s2/rtc_clk.c index a74cf81ece..b65a0cb61e 100644 --- a/components/soc/esp32s2beta/rtc_clk.c +++ b/components/soc/esp32s2/rtc_clk.c @@ -17,10 +17,10 @@ #include #include #include "sdkconfig.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/rtc.h" -#include "esp32s2beta/rom/uart.h" -#include "esp32s2beta/rom/gpio.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/rtc.h" +#include "esp32s2/rom/uart.h" +#include "esp32s2/rom/gpio.h" #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/rtc_io_reg.h" diff --git a/components/soc/esp32s2beta/rtc_init.c b/components/soc/esp32s2/rtc_init.c similarity index 100% rename from components/soc/esp32s2beta/rtc_init.c rename to components/soc/esp32s2/rtc_init.c diff --git a/components/soc/esp32s2beta/rtc_io_periph.c b/components/soc/esp32s2/rtc_io_periph.c similarity index 100% rename from components/soc/esp32s2beta/rtc_io_periph.c rename to components/soc/esp32s2/rtc_io_periph.c diff --git a/components/soc/esp32s2beta/rtc_periph.c b/components/soc/esp32s2/rtc_periph.c similarity index 100% rename from components/soc/esp32s2beta/rtc_periph.c rename to components/soc/esp32s2/rtc_periph.c diff --git a/components/soc/esp32s2beta/rtc_pm.c b/components/soc/esp32s2/rtc_pm.c similarity index 100% rename from components/soc/esp32s2beta/rtc_pm.c rename to components/soc/esp32s2/rtc_pm.c diff --git a/components/soc/esp32s2beta/rtc_sleep.c b/components/soc/esp32s2/rtc_sleep.c similarity index 98% rename from components/soc/esp32s2beta/rtc_sleep.c rename to components/soc/esp32s2/rtc_sleep.c index 15fde3237e..2336ae59d7 100644 --- a/components/soc/esp32s2beta/rtc_sleep.c +++ b/components/soc/esp32s2/rtc_sleep.c @@ -25,7 +25,7 @@ #include "soc/nrx_reg.h" #include "soc/fe_reg.h" #include "soc/rtc.h" -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" /** * Configure whether certain peripherals are powered down in deep sleep @@ -95,6 +95,11 @@ void rtc_sleep_init(rtc_sleep_config_t cfg) CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_PD_EN); } + REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_MONITOR, RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT); + REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_MONITOR, RTC_CNTL_BIASSLP_MONITOR_DEFAULT); + REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP, RTC_CNTL_BIASSLP_SLEEP_DEFAULT); + REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT); + if (cfg.deep_slp) { REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT); SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN); @@ -105,11 +110,6 @@ void rtc_sleep_init(rtc_sleep_config_t cfg) CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN); REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT); } - REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_MONITOR, RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT); - REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_MONITOR, RTC_CNTL_BIASSLP_MONITOR_DEFAULT); - REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP, RTC_CNTL_BIASSLP_SLEEP_DEFAULT); - REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT); - REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT); /* enable VDDSDIO control by state machine */ REG_CLR_BIT(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_FORCE); diff --git a/components/soc/esp32s2beta/rtc_time.c b/components/soc/esp32s2/rtc_time.c similarity index 99% rename from components/soc/esp32s2beta/rtc_time.c rename to components/soc/esp32s2/rtc_time.c index 52d63934b3..4db6a13f97 100644 --- a/components/soc/esp32s2beta/rtc_time.c +++ b/components/soc/esp32s2/rtc_time.c @@ -13,7 +13,7 @@ // limitations under the License. #include -#include "esp32s2beta/rom/ets_sys.h" +#include "esp32s2/rom/ets_sys.h" #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/timer_group_reg.h" diff --git a/components/soc/esp32s2beta/rtc_wdt.c b/components/soc/esp32s2/rtc_wdt.c similarity index 100% rename from components/soc/esp32s2beta/rtc_wdt.c rename to components/soc/esp32s2/rtc_wdt.c diff --git a/components/soc/esp32s2beta/soc_log.h b/components/soc/esp32s2/soc_log.h similarity index 100% rename from components/soc/esp32s2beta/soc_log.h rename to components/soc/esp32s2/soc_log.h diff --git a/components/soc/esp32s2beta/soc_memory_layout.c b/components/soc/esp32s2/soc_memory_layout.c similarity index 98% rename from components/soc/esp32s2beta/soc_memory_layout.c rename to components/soc/esp32s2/soc_memory_layout.c index bbcecc0531..d9a84288d7 100644 --- a/components/soc/esp32s2beta/soc_memory_layout.c +++ b/components/soc/esp32s2/soc_memory_layout.c @@ -46,7 +46,7 @@ const soc_memory_type_desc_t soc_memory_types[] = { //Type 2: DRAM which has an alias on the I-port { "D/IRAM", { 0, MALLOC_CAP_DMA|MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DEFAULT, MALLOC_CAP_32BIT|MALLOC_CAP_EXEC }, true, false}, //Type 3: IRAM - //In ESP32S2beta, All IRAM region are available by D-port (D/IRAM). + //In ESP32S2, All IRAM region are available by D-port (D/IRAM). { "IRAM", { MALLOC_CAP_EXEC|MALLOC_CAP_32BIT|MALLOC_CAP_INTERNAL, 0, 0 }, false, false}, //Type 4: SPI SRAM data //TODO, in fact, part of them support EDMA, to be supported. diff --git a/components/soc/esp32s2beta/sources.cmake b/components/soc/esp32s2/sources.cmake similarity index 92% rename from components/soc/esp32s2beta/sources.cmake rename to components/soc/esp32s2/sources.cmake index 4e0ba16ec0..4293a18b0a 100644 --- a/components/soc/esp32s2beta/sources.cmake +++ b/components/soc/esp32s2/sources.cmake @@ -21,6 +21,6 @@ set(SOC_SRCS "adc_periph.c" "touch_sensor_periph.c") if(NOT CMAKE_BUILD_EARLY_EXPANSION) - set_source_files_properties("esp32s2beta/rtc_clk.c" PROPERTIES + set_source_files_properties("esp32s2/rtc_clk.c" PROPERTIES COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion") endif() diff --git a/components/soc/esp32s2beta/spi_periph.c b/components/soc/esp32s2/spi_periph.c similarity index 100% rename from components/soc/esp32s2beta/spi_periph.c rename to components/soc/esp32s2/spi_periph.c diff --git a/components/soc/esp32s2beta/touch_sensor_hal.c b/components/soc/esp32s2/touch_sensor_hal.c similarity index 100% rename from components/soc/esp32s2beta/touch_sensor_hal.c rename to components/soc/esp32s2/touch_sensor_hal.c diff --git a/components/soc/esp32s2beta/touch_sensor_periph.c b/components/soc/esp32s2/touch_sensor_periph.c similarity index 100% rename from components/soc/esp32s2beta/touch_sensor_periph.c rename to components/soc/esp32s2/touch_sensor_periph.c diff --git a/components/soc/esp32s2beta/uart_periph.c b/components/soc/esp32s2/uart_periph.c similarity index 100% rename from components/soc/esp32s2beta/uart_periph.c rename to components/soc/esp32s2/uart_periph.c diff --git a/components/soc/esp32s2beta/component.mk b/components/soc/esp32s2beta/component.mk deleted file mode 100644 index 385d55c753..0000000000 --- a/components/soc/esp32s2beta/component.mk +++ /dev/null @@ -1 +0,0 @@ -esp32s2beta/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion diff --git a/components/soc/include/hal/dac_types.h b/components/soc/include/hal/dac_types.h index 07e8bb11fe..974d1320b1 100644 --- a/components/soc/include/hal/dac_types.h +++ b/components/soc/include/hal/dac_types.h @@ -4,8 +4,8 @@ #include "sdkconfig.h" typedef enum { - DAC_CHANNEL_1 = 0, /*!< DAC channel 1 is GPIO25(ESP32) / GPIO17(ESP32S2BETA) */ - DAC_CHANNEL_2 = 1, /*!< DAC channel 2 is GPIO26(ESP32) / GPIO18(ESP32S2BETA) */ + DAC_CHANNEL_1 = 0, /*!< DAC channel 1 is GPIO25(ESP32) / GPIO17(ESP32S2) */ + DAC_CHANNEL_2 = 1, /*!< DAC channel 2 is GPIO26(ESP32) / GPIO18(ESP32S2) */ DAC_CHANNEL_MAX, } dac_channel_t; diff --git a/components/soc/include/hal/gpio_types.h b/components/soc/include/hal/gpio_types.h index 97f6130625..164d076f93 100644 --- a/components/soc/include/hal/gpio_types.h +++ b/components/soc/include/hal/gpio_types.h @@ -106,7 +106,7 @@ typedef enum { #define GPIO_PIN_REG_25 IO_MUX_GPIO25_REG #define GPIO_PIN_REG_26 IO_MUX_GPIO26_REG #define GPIO_PIN_REG_27 IO_MUX_GPIO27_REG -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #define GPIO_PIN_REG_28 IO_MUX_GPIO28_REG #define GPIO_PIN_REG_29 IO_MUX_GPIO29_REG #define GPIO_PIN_REG_30 IO_MUX_GPIO30_REG diff --git a/components/soc/include/hal/spi_types.h b/components/soc/include/hal/spi_types.h index 715626a820..7f46e06c00 100644 --- a/components/soc/include/hal/spi_types.h +++ b/components/soc/include/hal/spi_types.h @@ -34,7 +34,7 @@ typedef enum { #define SPI_HOST SPI1_HOST #define HSPI_HOST SPI2_HOST #define VSPI_HOST SPI3_HOST -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define SPI_HOST SPI1_HOST #define FSPI_HOST SPI2_HOST #define HSPI_HOST SPI3_HOST diff --git a/components/soc/include/hal/touch_sensor_hal.h b/components/soc/include/hal/touch_sensor_hal.h index fd7c91042e..dc2023f19e 100644 --- a/components/soc/include/hal/touch_sensor_hal.h +++ b/components/soc/include/hal/touch_sensor_hal.h @@ -27,8 +27,8 @@ #ifdef CONFIG_IDF_TARGET_ESP32 #include "hal/touch_sensor_hal_esp32.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "hal/touch_sensor_hal_esp32s2beta.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "hal/touch_sensor_hal_esp32s2.h" #endif typedef struct { diff --git a/components/soc/include/hal/touch_sensor_types.h b/components/soc/include/hal/touch_sensor_types.h index 2e894c75ce..3e506f60a6 100644 --- a/components/soc/include/hal/touch_sensor_types.h +++ b/components/soc/include/hal/touch_sensor_types.h @@ -121,7 +121,7 @@ typedef enum { #define TOUCH_TRIGGER_MODE_DEFAULT (TOUCH_TRIGGER_BELOW) /*!= SOC_IRAM_LOW && (intptr_t)p < SOC_IRAM_HIGH); #else return ((intptr_t)p >= SOC_CACHE_APP_LOW && (intptr_t)p < SOC_IRAM_HIGH); diff --git a/components/soc/include/soc/spi_periph.h b/components/soc/include/soc/spi_periph.h index 1c3c94e2cc..260b0ce034 100644 --- a/components/soc/include/soc/spi_periph.h +++ b/components/soc/include/soc/spi_periph.h @@ -23,7 +23,7 @@ #include "soc/spi_struct.h" #include "soc/gpio_sig_map.h" #include "sdkconfig.h" -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #include "soc/spi_mem_struct.h" #include "soc/spi_mem_reg.h" #endif @@ -33,7 +33,7 @@ extern "C" { #endif -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #define SPI_FREAD_DIO 0 #define SPI_FREAD_QIO 0 #define SPI_FWRITE_DIO 0 diff --git a/components/soc/src/hal/spi_flash_hal.c b/components/soc/src/hal/spi_flash_hal.c index 123bc756b0..e3954c720d 100644 --- a/components/soc/src/hal/spi_flash_hal.c +++ b/components/soc/src/hal/spi_flash_hal.c @@ -36,7 +36,7 @@ static const spi_flash_hal_clock_config_t spi_flash_clk_cfg_reg[ESP_FLASH_SPEED_ {80e6, SPI_FLASH_LL_CLKREG_VAL_80MHZ}, }; -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 static const spi_flash_hal_clock_config_t spi_flash_gpspi_clk_cfg_reg[ESP_FLASH_SPEED_MAX] = { {5e6, {.gpspi=GPSPI_FLASH_LL_CLKREG_VAL_5MHZ}}, {10e6, {.gpspi=GPSPI_FLASH_LL_CLKREG_VAL_10MHZ}}, @@ -71,7 +71,7 @@ esp_err_t spi_flash_hal_init(spi_flash_memspi_data_t *data_out, const spi_flash_ spi_flash_hal_clock_config_t clock_cfg = spi_flash_clk_cfg_reg[cfg->speed]; -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 if (cfg->host_id > SPI_HOST) { clock_cfg = spi_flash_gpspi_clk_cfg_reg[cfg->speed]; } diff --git a/components/soc/src/hal/spi_flash_hal_iram.c b/components/soc/src/hal/spi_flash_hal_iram.c index ea40460922..e88e1f4848 100644 --- a/components/soc/src/hal/spi_flash_hal_iram.c +++ b/components/soc/src/hal/spi_flash_hal_iram.c @@ -66,7 +66,7 @@ bool spi_flash_hal_host_idle(spi_flash_host_driver_t *chip_drv) if ((void*) dev == spi_flash_ll_get_hw(SPI_HOST)) { #if CONFIG_IDF_TARGET_ESP32 idle &= spi_flash_ll_host_idle(&SPI0); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 idle &= spi_flash_ll_host_idle(&SPIMEM0); #endif } diff --git a/components/soc/src/memory_layout_utils.c b/components/soc/src/memory_layout_utils.c index 61414c71e7..a96b1c4b80 100644 --- a/components/soc/src/memory_layout_utils.c +++ b/components/soc/src/memory_layout_utils.c @@ -74,7 +74,7 @@ static void s_prepare_reserved_regions(soc_reserved_region_t *reserved, size_t c //ESP32 has a IRAM-only region 0x4008_0000 - 0x4009_FFFF, protect the used part reserved[1].start = (intptr_t)&_iram_start; /* IRAM used by code */ reserved[1].end = (intptr_t)&_iram_end; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 //ESP32S2 has a big D/IRAM region, the part used by code is reserved //The address of the D/I bus are in the same order, directly shift IRAM address to get reserved DRAM address const uint32_t i_d_offset = SOC_IRAM_LOW - SOC_DRAM_LOW; diff --git a/components/spi_flash/CMakeLists.txt b/components/spi_flash/CMakeLists.txt index c4e047bcf8..54634f9280 100644 --- a/components/spi_flash/CMakeLists.txt +++ b/components/spi_flash/CMakeLists.txt @@ -5,8 +5,8 @@ if(BOOTLOADER_BUILD) # ESP32 Bootloader needs SPIUnlock from this file, but doesn't # need other parts of this component set(srcs "esp32/spi_flash_rom_patch.c") - elseif (CONFIG_IDF_TARGET_ESP32S2BETA) - set(srcs "esp32s2beta/spi_flash_rom_patch.c") + elseif (CONFIG_IDF_TARGET_ESP32S2) + set(srcs "esp32s2/spi_flash_rom_patch.c") else() # but on other platforms no source files are needed for bootloader set(srcs) @@ -24,9 +24,9 @@ else() if (CONFIG_IDF_TARGET_ESP32) list(APPEND srcs "esp32/spi_flash_rom_patch.c") - elseif (CONFIG_IDF_TARGET_ESP32S2BETA) + elseif (CONFIG_IDF_TARGET_ESP32S2) list(APPEND srcs - "esp32s2beta/spi_flash_rom_patch.c") + "esp32s2/spi_flash_rom_patch.c") endif() # New implementation after IDF v4.0 diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c index 277e102820..54a296fc63 100644 --- a/components/spi_flash/cache_utils.c +++ b/components/spi_flash/cache_utils.c @@ -23,9 +23,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include #include -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #endif @@ -298,7 +298,7 @@ static void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_st } #endif *saved_state = ret; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 *saved_state = Cache_Suspend_ICache(); #endif } @@ -317,7 +317,7 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL1_REG, cache_mask, saved_state, 0); } #endif -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 Cache_Resume_ICache(saved_state); #endif } @@ -329,13 +329,13 @@ IRAM_ATTR bool spi_flash_cache_enabled(void) #if portNUM_PROCESSORS == 2 result = result && (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE) != 0); #endif -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 bool result = (REG_GET_BIT(EXTMEM_PRO_ICACHE_CTRL_REG, EXTMEM_PRO_ICACHE_ENABLE) != 0); #endif return result; } -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 IRAM_ATTR void esp_config_instruction_cache_mode(void) { cache_size_t cache_size; diff --git a/components/spi_flash/cache_utils.h b/components/spi_flash/cache_utils.h index 11bf35f73a..bc3de9f964 100644 --- a/components/spi_flash/cache_utils.h +++ b/components/spi_flash/cache_utils.h @@ -60,7 +60,7 @@ void spi_flash_enable_interrupts_caches_no_os(void); bool spi_flash_check_and_flush_cache(uint32_t start_addr, uint32_t length); //config cache mode -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 //config instrcutin cache size and cache block size by menuconfig void esp_config_instruction_cache_mode(void); //config data cache size and cache block size by menuconfig diff --git a/components/spi_flash/esp32/spi_flash_rom_patch.c b/components/spi_flash/esp32/spi_flash_rom_patch.c index 125c2dfa56..ec1ade5385 100644 --- a/components/spi_flash/esp32/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32/spi_flash_rom_patch.c @@ -32,7 +32,7 @@ esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *sp } while ((REG_READ(SPI_EXT2_REG(0)) & SPI_ST)) { } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 while ((REG_READ(SPI_MEM_FSM_REG(1)) & SPI_MEM_ST)) { } while ((REG_READ(SPI_MEM_FSM_REG(0)) & SPI_MEM_ST)) { diff --git a/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c b/components/spi_flash/esp32s2/flash_ops_esp32s2.c similarity index 98% rename from components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c rename to components/spi_flash/esp32s2/flash_ops_esp32s2.c index 1a6aa109c2..b6dfe5d43a 100644 --- a/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c +++ b/components/spi_flash/esp32s2/flash_ops_esp32s2.c @@ -18,8 +18,8 @@ #include "esp_spi_flash.h" #include "soc/system_reg.h" #include "soc/soc_memory_layout.h" -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/cache.h" +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/cache.h" #include "hal/spi_flash_hal.h" #include "esp_flash.h" diff --git a/components/spi_flash/esp32s2beta/spi_flash_rom_patch.c b/components/spi_flash/esp32s2/spi_flash_rom_patch.c similarity index 99% rename from components/spi_flash/esp32s2beta/spi_flash_rom_patch.c rename to components/spi_flash/esp32s2/spi_flash_rom_patch.c index d0b08967b7..46f0ffefaa 100644 --- a/components/spi_flash/esp32s2beta/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32s2/spi_flash_rom_patch.c @@ -12,9 +12,9 @@ // See the License for the specific language governing permissions and // limitations under the License. #include "sdkconfig.h" -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/gpio.h" -#include "esp32s2beta/rom/spi_flash.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/gpio.h" +#include "esp32s2/rom/spi_flash.h" #include "soc/spi_periph.h" diff --git a/components/spi_flash/esp_flash_spi_init.c b/components/spi_flash/esp_flash_spi_init.c index 459ba16396..da8d97fe43 100644 --- a/components/spi_flash/esp_flash_spi_init.c +++ b/components/spi_flash/esp_flash_spi_init.c @@ -58,8 +58,8 @@ __attribute__((unused)) static const char TAG[] = "spi_flash"; .iomux = false, \ .input_delay_ns = 0,\ } -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/efuse.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/efuse.h" #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \ .host_id = SPI_HOST,\ .speed = DEFAULT_FLASH_SPEED, \ @@ -193,7 +193,7 @@ esp_err_t esp_flash_init_default_chip(void) { memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT(); - #ifdef CONFIG_IDF_TARGET_ESP32S2BETA + #ifdef CONFIG_IDF_TARGET_ESP32S2 // For esp32s2 spi IOs are configured as from IO MUX by default cfg.iomux = ets_efuse_get_spiconfig() == 0 ? true : false; #endif diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c index 7d6285ba48..f64a912b97 100644 --- a/components/spi_flash/flash_mmap.c +++ b/components/spi_flash/flash_mmap.c @@ -34,10 +34,10 @@ #include "esp32/rom/spi_flash.h" #include "esp32/rom/cache.h" #include "esp32/spiram.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/spiram.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/spiram.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #endif @@ -57,7 +57,7 @@ #define PAGE_IN_FLASH(page) (page) #define INVALID_ENTRY_VAL DPORT_FLASH_MMU_TABLE_INVALID_VAL #define MMU_ADDR_MASK DPORT_MMU_ADDRESS_MASK -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define REGIONS_COUNT 6 #define IROM0_PAGES_START (PRO_CACHE_IBUS0_MMU_START / sizeof(uint32_t)) #define IROM0_PAGES_END (PRO_CACHE_IBUS1_MMU_END / sizeof(uint32_t)) @@ -250,7 +250,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap_pages(const int *pages, size_t page_count, sp DPORT_APP_FLASH_MMU_TABLE[i] = pages[pageno]; #endif -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 Cache_Invalidate_Addr(region_addr + (i - region_begin) * SPI_FLASH_MMU_PAGE_SIZE, SPI_FLASH_MMU_PAGE_SIZE); #endif need_flush = true; @@ -454,7 +454,7 @@ static bool IRAM_ATTR is_page_mapped_in_cache(uint32_t phys_page, const void **o for (int j = 0; j < 2; j++) { for (int i = start[j]; i < end[j]; i++) { if (DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[i]) == PAGE_IN_FLASH(phys_page)) { -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 if (j == 0) { /* SPI_FLASH_MMAP_DATA */ *out_ptr = (const void *)(VADDR0_START_ADDR + SPI_FLASH_MMU_PAGE_SIZE * (i - start[0])); } else { /* SPI_FLASH_MMAP_INST */ @@ -495,7 +495,7 @@ IRAM_ATTR bool spi_flash_check_and_flush_cache(size_t start_addr, size_t length) Cache_Flush(1); #endif return true; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (vaddr != NULL) { Cache_Invalidate_Addr((uint32_t)vaddr, SPI_FLASH_MMU_PAGE_SIZE); ret = true; diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index fe6962f60f..d6dc2f98e0 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -33,10 +33,10 @@ #include "esp32/rom/spi_flash.h" #include "esp32/rom/cache.h" #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/spi_flash.h" -#include "esp32s2beta/rom/cache.h" -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "esp32s2/rom/cache.h" +#include "esp32s2/clk.h" #include "soc/spi_mem_reg.h" #include "soc/spi_mem_struct.h" #endif @@ -795,7 +795,7 @@ void spi_flash_dump_counters(void) #endif //CONFIG_SPI_FLASH_ENABLE_COUNTERS -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #define SPICACHE SPIMEM0 #define SPIFLASH SPIMEM1 #define FLASH_WRAP_CMD 0x77 @@ -867,7 +867,7 @@ bool spi_flash_support_wrap_size(uint32_t wrap_size) } } #endif -#if defined(CONFIG_SPI_FLASH_USE_LEGACY_IMPL) && defined(CONFIG_IDF_TARGET_ESP32S2BETA) -// TODO esp32s2beta: Remove once ESP32S2Beta has new SPI Flash API support +#if defined(CONFIG_SPI_FLASH_USE_LEGACY_IMPL) && defined(CONFIG_IDF_TARGET_ESP32S2) +// TODO esp32s2: Remove once ESP32S2 has new SPI Flash API support esp_flash_t *esp_flash_default_chip = NULL; #endif diff --git a/components/spi_flash/memspi_host_driver.c b/components/spi_flash/memspi_host_driver.c index 99a0625178..3d87f8ae7a 100644 --- a/components/spi_flash/memspi_host_driver.c +++ b/components/spi_flash/memspi_host_driver.c @@ -22,7 +22,7 @@ static const char TAG[] = "memspi"; static const spi_flash_host_driver_t esp_flash_default_host = ESP_FLASH_DEFAULT_HOST_DRIVER(); -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 extern void spi_flash_hal_gpspi_poll_cmd_done(spi_flash_host_driver_t *driver); extern esp_err_t spi_flash_hal_gpspi_device_config(spi_flash_host_driver_t *driver); esp_err_t spi_flash_hal_gpspi_configure_host_io_mode( @@ -64,7 +64,7 @@ esp_err_t memspi_host_init_pointers(spi_flash_host_driver_t *host, memspi_host_d { #ifdef CONFIG_IDF_TARGET_ESP32 memcpy(host, &esp_flash_default_host, sizeof(spi_flash_host_driver_t)); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (cfg->host_id == SPI_HOST) memcpy(host, &esp_flash_default_host, sizeof(spi_flash_host_driver_t)); else { diff --git a/components/spi_flash/spi_flash_os_func_app.c b/components/spi_flash/spi_flash_os_func_app.c index 13c6269301..032dbbe934 100644 --- a/components/spi_flash/spi_flash_os_func_app.c +++ b/components/spi_flash/spi_flash_os_func_app.c @@ -22,8 +22,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif /* @@ -117,7 +117,7 @@ static app_func_arg_t spi3_arg = { .host_id = SPI3_HOST, //for SPI3, }; -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 static app_func_arg_t spi4_arg = { .host_id = SPI4_HOST, //for SPI4, }; @@ -144,7 +144,7 @@ esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id) chip->os_func = &esp_flash_spi1_default_os_functions; chip->os_func_data = &spi1_arg; } else if (host_id == SPI2_HOST || host_id == SPI3_HOST -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 || host_id == SPI4_HOST #endif ) { @@ -152,7 +152,7 @@ esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id) chip->os_func = &esp_flash_spi23_default_os_functions; #if CONFIG_IDF_TARGET_ESP32 chip->os_func_data = (host_id == SPI2_HOST) ? &spi2_arg : &spi3_arg; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 chip->os_func_data = (host_id == SPI2_HOST) ? &spi2_arg : ((host_id == SPI3_HOST) ? &spi3_arg : &spi4_arg); #endif } else { diff --git a/components/spi_flash/spi_flash_os_func_noos.c b/components/spi_flash/spi_flash_os_func_noos.c index e1fde7db2d..b42a64eddc 100644 --- a/components/spi_flash/spi_flash_os_func_noos.c +++ b/components/spi_flash/spi_flash_os_func_noos.c @@ -20,14 +20,14 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" #include "esp32/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" -#include "esp32s2beta/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/cache.h" #endif #include "esp_attr.h" -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 typedef struct { uint32_t icache_autoload; uint32_t dcache_autoload; @@ -41,7 +41,7 @@ static IRAM_ATTR esp_err_t start(void *arg) #if CONFIG_IDF_TARGET_ESP32 Cache_Read_Disable(0); Cache_Read_Disable(1); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 spi_noos_arg_t *spi_arg = arg; spi_arg->icache_autoload = Cache_Suspend_ICache(); spi_arg->dcache_autoload = Cache_Suspend_DCache(); @@ -56,7 +56,7 @@ static IRAM_ATTR esp_err_t end(void *arg) Cache_Flush(1); Cache_Read_Enable(0); Cache_Read_Enable(1); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 spi_noos_arg_t *spi_arg = arg; Cache_Invalidate_ICache_All(); Cache_Resume_ICache(spi_arg->icache_autoload); @@ -82,7 +82,7 @@ esp_err_t IRAM_ATTR esp_flash_app_disable_os_functions(esp_flash_t* chip) { chip->os_func = &esp_flash_noos_functions; -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 chip->os_func_data = &spi_arg; #endif diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c index d0ec5ca31d..e7ab647d15 100644 --- a/components/spi_flash/test/test_esp_flash.c +++ b/components/spi_flash/test/test_esp_flash.c @@ -44,7 +44,7 @@ static uint8_t sector_buf[4096]; #define VSPI_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD #define VSPI_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP #define VSPI_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define FSPI_PIN_NUM_MOSI FSPI_IOMUX_PIN_NUM_MOSI #define FSPI_PIN_NUM_MISO FSPI_IOMUX_PIN_NUM_MISO #define FSPI_PIN_NUM_CLK FSPI_IOMUX_PIN_NUM_CLK @@ -73,7 +73,7 @@ typedef void (*flash_test_func_t)(esp_flash_t* chip); #define FLASH_TEST_CASE(STR, FUNC_TO_RUN) \ TEST_CASE(STR, "[esp_flash]") {flash_test_func(FUNC_TO_RUN, 1);} -#if defined(CONFIG_SPIRAM_SUPPORT) || TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if defined(CONFIG_SPIRAM_SUPPORT) || TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) // These tests needs external flash, right on the place of psram #define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN) #else @@ -111,7 +111,7 @@ flashtest_config_t config_list[] = { // .speed = TEST_SPI_SPEED, // .host_id = HSPI_HOST, // .cs_id = 0, - // // uses GPIO matrix on esp32s2beta regardles if FORCE_GPIO_MATRIX + // // uses GPIO matrix on esp32s2 regardles if FORCE_GPIO_MATRIX // .cs_io_num = HSPI_PIN_NUM_CS, // .input_delay_ns = 20, // }, @@ -124,10 +124,10 @@ flashtest_config_t config_list[] = { .input_delay_ns = 0, }, }; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 flashtest_config_t config_list[] = { FLASHTEST_CONFIG_COMMON, - /* No runners for esp32s2beta for these config yet */ + /* No runners for esp32s2 for these config yet */ // { // .io_mode = TEST_SPI_READ_MODE, // .speed = TEST_SPI_SPEED, @@ -142,7 +142,7 @@ flashtest_config_t config_list[] = { // .speed = TEST_SPI_SPEED, // .host_id = HSPI_HOST, // .cs_id = 0, - // // uses GPIO matrix on esp32s2beta regardles if FORCE_GPIO_MATRIX + // // uses GPIO matrix on esp32s2 regardles if FORCE_GPIO_MATRIX // .cs_io_num = HSPI_PIN_NUM_CS, // .input_delay_ns = 20, // }, @@ -185,7 +185,7 @@ static void setup_bus(spi_host_device_t host_id) .quadwp_io_num = HSPI_PIN_NUM_WP, .max_transfer_sz = 64, }; -#if !DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !DISABLED_FOR_TARGETS(ESP32S2) #ifdef FORCE_GPIO_MATRIX hspi_bus_cfg.quadhd_io_num = 23; #endif @@ -202,7 +202,7 @@ static void setup_bus(spi_host_device_t host_id) gpio_set_level(HSPI_PIN_NUM_WP, 1); #endif } -#if !DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !DISABLED_FOR_TARGETS(ESP32S2) else if (host_id == VSPI_HOST) { ESP_LOGI(TAG, "setup flash on SPI%d (VSPI) CS0...\n", host_id + 1); spi_bus_config_t vspi_bus_cfg = { @@ -219,7 +219,7 @@ static void setup_bus(spi_host_device_t host_id) esp_err_t ret = spi_bus_initialize(host_id, &vspi_bus_cfg, 0); TEST_ESP_OK(ret); } -#endif // disabled for esp32s2beta +#endif // disabled for esp32s2 else { ESP_LOGE(TAG, "invalid bus"); } @@ -229,7 +229,7 @@ static void release_bus(int host_id) { #if CONFIG_IDF_TARGET_ESP32 if (host_id == HSPI_HOST || host_id == VSPI_HOST) { -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 if (host_id == FSPI_HOST || host_id == HSPI_HOST || host_id == VSPI_HOST) { #endif spi_bus_free(host_id); @@ -612,7 +612,7 @@ TEST_CASE("SPI flash test reading with all speed/mode permutations", "[esp_flash } #ifndef CONFIG_SPIRAM_SUPPORT -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) TEST_CASE("SPI flash test reading with all speed/mode permutations, 3 chips", "[esp_flash][test_env=UT_T1_ESP_FLASH]") { for (int i = 0; i < ALL_TEST_NUM; i++) { diff --git a/components/spi_flash/test/test_partition_ext.c b/components/spi_flash/test/test_partition_ext.c index a27f6e1404..99707b369c 100644 --- a/components/spi_flash/test/test_partition_ext.c +++ b/components/spi_flash/test/test_partition_ext.c @@ -2,7 +2,7 @@ #include "esp_partition.h" #include "unity.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) TEST_CASE("Basic handling of a partition in external flash", "[partition]") { esp_flash_t flash = { diff --git a/components/spi_flash/test/test_read_write.c b/components/spi_flash/test/test_read_write.c index 38e6e82917..cfb82761d2 100644 --- a/components/spi_flash/test/test_read_write.c +++ b/components/spi_flash/test/test_read_write.c @@ -139,7 +139,7 @@ TEST_CASE("Test spi_flash_read", "[spi_flash][esp_flash]") #endif } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) static void IRAM_ATTR test_write(int dst_off, int src_off, int len) { char src_buf[64], dst_gold[64]; @@ -216,7 +216,7 @@ TEST_CASE("Test spi_flash_write", "[spi_flash][esp_flash]") * NB: At the moment these only support aligned addresses, because memcpy * is not aware of the 32-but load requirements for these regions. */ -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define TEST_SOC_IROM_ADDR (SOC_IROM_LOW) #define TEST_SOC_CACHE_RAM_BANK0_ADDR (SOC_IRAM_LOW) #define TEST_SOC_CACHE_RAM_BANK1_ADDR (SOC_IRAM_LOW + 0x2000) diff --git a/components/spi_flash/test/test_spi_flash.c b/components/spi_flash/test/test_spi_flash.c index 2139d1f5fd..7b85839e55 100644 --- a/components/spi_flash/test/test_spi_flash.c +++ b/components/spi_flash/test/test_spi_flash.c @@ -120,7 +120,7 @@ typedef struct { size_t repeat_count; } block_task_arg_t; -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define int_clr_timers int_clr #endif diff --git a/components/ulp/cmake/toolchain-esp32s2beta-ulp.cmake b/components/ulp/cmake/toolchain-esp32s2-ulp.cmake similarity index 100% rename from components/ulp/cmake/toolchain-esp32s2beta-ulp.cmake rename to components/ulp/cmake/toolchain-esp32s2-ulp.cmake diff --git a/components/ulp/include/esp32s2beta/ulp.h b/components/ulp/include/esp32s2beta/ulp.h deleted file mode 100644 index c9d32bd1b0..0000000000 --- a/components/ulp/include/esp32s2beta/ulp.h +++ /dev/null @@ -1,1259 +0,0 @@ -// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include -#include -#include -#include "sdkconfig.h" -#include "esp_err.h" -#include "soc/soc.h" -#include "ulp_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define ULP_FSM_PREPARE_SLEEP_CYCLES 2 /*!< Cycles spent by FSM preparing ULP for sleep */ -#define ULP_FSM_WAKEUP_SLEEP_CYCLES 2 /*!< Cycles spent by FSM waking up ULP from sleep */ - -/** - * @defgroup ulp_registers ULP coprocessor registers - * @{ - */ - - -#define R0 0 /*!< general purpose register 0 */ -#define R1 1 /*!< general purpose register 1 */ -#define R2 2 /*!< general purpose register 2 */ -#define R3 3 /*!< general purpose register 3 */ -/**@}*/ - -/** @defgroup ulp_opcodes ULP coprocessor opcodes, sub opcodes, and various modifiers/flags - * - * These definitions are not intended to be used directly. - * They are used in definitions of instructions later on. - * - * @{ - */ - -#define OPCODE_WR_REG 1 /*!< Instruction: write peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */ - -#define OPCODE_RD_REG 2 /*!< Instruction: read peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */ - -#define RD_REG_PERIPH_RTC_CNTL 0 /*!< Identifier of RTC_CNTL peripheral for RD_REG and WR_REG instructions */ -#define RD_REG_PERIPH_RTC_IO 1 /*!< Identifier of RTC_IO peripheral for RD_REG and WR_REG instructions */ -#define RD_REG_PERIPH_SENS 2 /*!< Identifier of SARADC peripheral for RD_REG and WR_REG instructions */ -#define RD_REG_PERIPH_RTC_I2C 3 /*!< Identifier of RTC_I2C peripheral for RD_REG and WR_REG instructions */ - -#define OPCODE_I2C 3 /*!< Instruction: read/write I2C (not implemented yet) */ - -#define OPCODE_DELAY 4 /*!< Instruction: delay (nop) for a given number of cycles */ - -#define OPCODE_ADC 5 /*!< Instruction: SAR ADC measurement (not implemented yet) */ - -#define OPCODE_ST 6 /*!< Instruction: store indirect to RTC memory */ -#define SUB_OPCODE_ST 4 /*!< Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */ - -#define OPCODE_ALU 7 /*!< Arithmetic instructions */ -#define SUB_OPCODE_ALU_REG 0 /*!< Arithmetic instruction, both source values are in register */ -#define SUB_OPCODE_ALU_IMM 1 /*!< Arithmetic instruction, one source value is an immediate */ -#define SUB_OPCODE_ALU_CNT 2 /*!< Arithmetic instruction between counter register and an immediate (not implemented yet)*/ -#define ALU_SEL_ADD 0 /*!< Addition */ -#define ALU_SEL_SUB 1 /*!< Subtraction */ -#define ALU_SEL_AND 2 /*!< Logical AND */ -#define ALU_SEL_OR 3 /*!< Logical OR */ -#define ALU_SEL_MOV 4 /*!< Copy value (immediate to destination register or source register to destination register */ -#define ALU_SEL_LSH 5 /*!< Shift left by given number of bits */ -#define ALU_SEL_RSH 6 /*!< Shift right by given number of bits */ -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA -#define ALU_SEL_INC 0 /*!< Stage_cnt = Stage_cnt + Imm */ -#define ALU_SEL_DEC 1 /*!< Stage_cnt = Stage_cnt - Imm */ -#define ALU_SEL_RST 2 /*!< Stage_cnt = 0 */ -#endif - -#define OPCODE_BRANCH 8 /*!< Branch instructions */ -#define BX_JUMP_TYPE_DIRECT 0 /*!< Unconditional jump */ -#define BX_JUMP_TYPE_ZERO 1 /*!< Branch if last ALU result is zero */ -#define BX_JUMP_TYPE_OVF 2 /*!< Branch if last ALU operation caused and overflow */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define B_CMP_L 0 /*!< Branch if R0 is less than an immediate */ -#define B_CMP_GE 1 /*!< Branch if R0 is greater than or equal to an immediate */ -#define SUB_OPCODE_BX 0 /*!< Branch to absolute PC (immediate or in register) */ -#define SUB_OPCODE_B 1 /*!< Branch to a relative offset */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -#define B_CMP_L 1 /*!< Branch if R0 is less than an immediate */ -#define B_CMP_GE 2 /*!< Branch if R0 is greater than an immediate */ -#define B_CMP_EQ 4 /*!< Branch if R0 is equal to an immediate */ -#define SUB_OPCODE_BX 1 /*!< Branch to absolute PC (immediate or in register) */ -#define SUB_OPCODE_B 0 /*!< Branch to a relative offset base on R0 */ -#define SUB_OPCODE_B_STAGE 2 /*!< Branch to a relative offset base on stage reg */ -#endif - -#define OPCODE_END 9 /*!< Stop executing the program */ -#define SUB_OPCODE_END 0 /*!< Stop executing the program and optionally wake up the chip */ -#define SUB_OPCODE_SLEEP 1 /*!< Stop executing the program and run it again after selected interval */ - -#define OPCODE_TSENS 10 /*!< Instruction: temperature sensor measurement (not implemented yet) */ - -#define OPCODE_HALT 11 /*!< Halt the coprocessor */ - -#define OPCODE_LD 13 /*!< Indirect load lower 16 bits from RTC memory */ - -#define OPCODE_MACRO 15 /*!< Not a real opcode. Used to identify labels and branches in the program */ -#define SUB_OPCODE_MACRO_LABEL 0 /*!< Label macro */ -#define SUB_OPCODE_MACRO_BRANCH 1 /*!< Branch macro */ - -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA -#define OPCODE_SLEEP_WAIT 4 -#endif -/**@}*/ - -/** - * @brief Instruction format structure - * - * All ULP instructions are 32 bit long. - * This union contains field layouts used by all of the supported instructions. - * This union also includes a special "macro" instruction layout. - * This is not a real instruction which can be executed by the CPU. It acts - * as a token which is removed from the program by the - * ulp_process_macros_and_load function. - * - * These structures are not intended to be used directly. - * Preprocessor definitions provided below fill the fields of these structure with - * the right arguments. - */ -union ulp_insn { - - struct { - uint32_t cycles : 16; /*!< Number of cycles to sleep */ - uint32_t unused : 12; /*!< Unused */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_DELAY) */ - } delay; /*!< Format of DELAY instruction */ - -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Register which contains data to store */ - uint32_t sreg : 2; /*!< Register which contains address in RTC memory (expressed in words) */ - uint32_t unused1 : 6; /*!< Unused */ - uint32_t offset : 11; /*!< Offset to add to sreg */ - uint32_t unused2 : 4; /*!< Unused */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ST) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ST) */ - } st; /*!< Format of ST instruction */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Data address register number */ - uint32_t sreg : 2; /*!< Base address register number */ - uint32_t data_label : 2; /*!< Data label */ - uint32_t upper : 1; /*!< High and low half-word Select 1: Write high half-word; 0 : write low half-word; */ - uint32_t write_way : 2; /*!< Write number Mode 0 : full word write; 1: with data_label; 3: without label; */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t offset : 11; /*!< When you select automatic storage, you need to configure the base address offset*/ - uint32_t unused2 : 4; /*!< Unused */ - uint32_t wr_auto : 1; /*!< Automatic storage selection enabled (burst mode)*/ - uint32_t offset_set : 1; /*!< Configure OFFSET enable */ - uint32_t manul_en : 1; /*!< Manual storage selection enabled */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ST) */ - } st; /*!< Format of ST instruction */ -#endif - -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Register where the data should be loaded to */ - uint32_t sreg : 2; /*!< Register which contains address in RTC memory (expressed in words) */ - uint32_t unused1 : 6; /*!< Unused */ - uint32_t offset : 11; /*!< Offset to add to sreg */ - uint32_t unused2 : 7; /*!< Unused */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_LD) */ - } ld; /*!< Format of LD instruction */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Register where the data should be loaded to */ - uint32_t sreg : 2; /*!< Register which contains address in RTC memory (expressed in words) */ - uint32_t unused1 : 6; /*!< Unused */ - uint32_t offset : 11; /*!< Offset to add to sreg */ - uint32_t unused2 : 6; /*!< Unused */ - uint32_t rd_upper: 1; - uint32_t opcode : 4; /*!< Opcode (OPCODE_LD) */ - } ld; /*!< Format of LD instruction */ -#endif - - struct { - uint32_t unused : 28; /*!< Unused */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_HALT) */ - } halt; /*!< Format of HALT instruction */ - -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Register which contains target PC, expressed in words (used if .reg == 1) */ - uint32_t addr : 11; /*!< Target PC, expressed in words (used if .reg == 0) */ - uint32_t unused : 8; /*!< Unused */ - uint32_t reg : 1; /*!< Target PC in register (1) or immediate (0) */ - uint32_t type : 3; /*!< Jump condition (BX_JUMP_TYPE_xxx) */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_BX) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */ - } bx; /*!< Format of BRANCH instruction (absolute address) */ - - struct { - uint32_t imm : 16; /*!< Immediate value to compare against */ - uint32_t cmp : 1; /*!< Comparison to perform: B_CMP_L or B_CMP_GE */ - uint32_t offset : 7; /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */ - uint32_t sign : 1; /*!< Sign of target PC offset: 0: positive, 1: negative */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_B) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */ - } b; /*!< Format of BRANCH instruction (relative address) */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Register which contains target PC, expressed in words (used if .reg == 1) */ - uint32_t addr : 11; /*!< Target PC, expressed in words (used if .reg == 0) */ - uint32_t unused : 8; /*!< Unused */ - uint32_t reg : 1; /*!< Target PC in register (1) or immediate (0) */ - uint32_t type : 3; /*!< Jump condition (BX_JUMP_TYPE_xxx) */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_BX) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */ - } bx; /*!< Format of BRANCH instruction (absolute address) */ - - struct { - uint32_t imm : 15; /*!< Immediate value to compare against */ - uint32_t cmp : 3; /*!< Comparison to perform: B_CMP_L or B_CMP_GE */ - uint32_t offset : 7; /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */ - uint32_t sign : 1; /*!< Sign of target PC offset: 0: positive, 1: negative */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_B) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */ - } b; -#endif - -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Destination register */ - uint32_t sreg : 2; /*!< Register with operand A */ - uint32_t treg : 2; /*!< Register with operand B */ - uint32_t unused : 15; /*!< Unused */ - uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ALU_REG) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */ - } alu_reg; /*!< Format of ALU instruction (both sources are registers) */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Destination register */ - uint32_t sreg : 2; /*!< Register with operand A */ - uint32_t treg : 2; /*!< Register with operand B */ - uint32_t unused : 15; /*!< Unused */ - uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_ALU_REG) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */ - } alu_reg; /*!< Format of ALU instruction (both sources are registers) */ -#endif - -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Destination register */ - uint32_t sreg : 2; /*!< Register with operand A */ - uint32_t imm : 16; /*!< Immediate value of operand B */ - uint32_t unused : 1; /*!< Unused */ - uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */ - } alu_imm; /*!< Format of ALU instruction (one source is an immediate) */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Destination register */ - uint32_t sreg : 2; /*!< Register with operand A */ - uint32_t imm : 16; /*!< Immediate value of operand B */ - uint32_t unused : 1; /*!< Unused */ - uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */ - } alu_imm; /*!< Format of ALU instruction (one source is an immediate) */ - struct { - uint32_t unused : 4; /*!< Unused */ - uint32_t imm : 16; /*!< Immediate value of operand B */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */ - uint32_t unused2 : 1; /*!< Unused */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */ - } alu_cnt; /*!< Format of ALU instruction (one source is an immediate) */ -#endif - - struct { - uint32_t addr : 8; /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */ - uint32_t periph_sel : 2; /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */ - uint32_t data : 8; /*!< 8 bits of data to write */ - uint32_t low : 5; /*!< Low bit */ - uint32_t high : 5; /*!< High bit */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_WR_REG) */ - } wr_reg; /*!< Format of WR_REG instruction */ - - struct { - uint32_t addr : 8; /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */ - uint32_t periph_sel : 2; /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */ - uint32_t unused : 8; /*!< Unused */ - uint32_t low : 5; /*!< Low bit */ - uint32_t high : 5; /*!< High bit */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_WR_REG) */ - } rd_reg; /*!< Format of RD_REG instruction */ -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t dreg : 2; /*!< Register where to store ADC result */ - uint32_t mux : 4; /*!< Select SARADC pad (mux + 1) */ - uint32_t sar_sel : 1; /*!< Select SARADC0 (0) or SARADC1 (1) */ - uint32_t unused1 : 1; /*!< Unused */ - uint32_t cycles : 16; /*!< TBD, cycles used for measurement */ - uint32_t unused2 : 4; /*!< Unused */ - uint32_t opcode: 4; /*!< Opcode (OPCODE_ADC) */ - } adc; /*!< Format of ADC instruction */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t dreg : 2; /*!< Register where to store ADC result */ - uint32_t mux : 4; /*!< Select SARADC pad (mux + 1) */ - uint32_t sar_sel : 1; /*!< Select SARADC0 (0) or SARADC1 (1) */ - uint32_t hall_phase : 1; /*!< Unused */ - uint32_t xpd_hall : 1; /*!< Unused */ - uint32_t unused1 : 19; /*!< Unused */ - uint32_t opcode: 4; /*!< Opcode (OPCODE_ADC) */ - } adc; -#endif - struct { - uint32_t dreg : 2; /*!< Register where to store temperature measurement result */ - uint32_t wait_delay: 14; /*!< Cycles to wait after measurement is done */ - uint32_t reserved: 12; /*!< Reserved, set to 0 */ - uint32_t opcode: 4; /*!< Opcode (OPCODE_TSENS) */ - } tsens; /*!< Format of TSENS instruction */ - - struct { - uint32_t i2c_addr : 8; /*!< I2C slave address */ - uint32_t data : 8; /*!< Data to read or write */ - uint32_t low_bits : 3; /*!< TBD */ - uint32_t high_bits : 3; /*!< TBD */ - uint32_t i2c_sel : 4; /*!< TBD, select reg_i2c_slave_address[7:0] */ - uint32_t unused : 1; /*!< Unused */ - uint32_t rw : 1; /*!< Write (1) or read (0) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_I2C) */ - } i2c; /*!< Format of I2C instruction */ -#ifdef CONFIG_IDF_TARGET_ESP32 - struct { - uint32_t wakeup : 1; /*!< Set to 1 to wake up chip */ - uint32_t unused : 24; /*!< Unused */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_WAKEUP) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */ - } end; /*!< Format of END instruction with wakeup */ - - struct { - uint32_t cycle_sel : 4; /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */ - uint32_t unused : 21; /*!< Unused */ - uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_SLEEP) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */ - } sleep; /*!< Format of END instruction with sleep */ -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - struct { - uint32_t wakeup : 1; /*!< Set to 1 to wake up chip */ - uint32_t unused : 25; /*!< Unused */ - uint32_t sub_opcode : 2; /*!< Sub opcode (SUB_OPCODE_WAKEUP) */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */ - } end; - - struct { - uint32_t cycle_sel : 16; /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */ - uint32_t unused : 12; /*!< Unused */ - uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */ - } sleep; -#endif - struct { - uint32_t label : 16; /*!< Label number */ - uint32_t unused : 8; /*!< Unused */ - uint32_t sub_opcode : 4; /*!< SUB_OPCODE_MACRO_LABEL or SUB_OPCODE_MACRO_BRANCH */ - uint32_t opcode: 4; /*!< Opcode (OPCODE_MACRO) */ - } macro; /*!< Format of tokens used by LABEL and BRANCH macros */ - -}; - -typedef union ulp_insn ulp_insn_t; - -_Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should be 4 bytes"); - -/** - * Delay (nop) for a given number of cycles - */ -#define I_DELAY(cycles_) { .delay = {\ - .cycles = cycles_, \ - .unused = 0, \ - .opcode = OPCODE_DELAY } } - -/** - * Halt the coprocessor. - * - * This instruction halts the coprocessor, but keeps ULP timer active. - * As such, ULP program will be restarted again by timer. - * To stop the program and prevent the timer from restarting the program, - * use I_END(0) instruction. - */ -#define I_HALT() { .halt = {\ - .unused = 0, \ - .opcode = OPCODE_HALT } } - -/** - * Map SoC peripheral register to periph_sel field of RD_REG and WR_REG - * instructions. - * - * @param reg peripheral register in RTC_CNTL_, RTC_IO_, SENS_, RTC_I2C peripherals. - * @return periph_sel value for the peripheral to which this register belongs. - */ -static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) { - uint32_t ret = 3; - if (reg < DR_REG_RTCCNTL_BASE) { - assert(0 && "invalid register base"); - } else if (reg < DR_REG_RTCIO_BASE) { - ret = RD_REG_PERIPH_RTC_CNTL; - } else if (reg < DR_REG_SENS_BASE) { - ret = RD_REG_PERIPH_RTC_IO; - } else if (reg < DR_REG_RTC_I2C_BASE){ - ret = RD_REG_PERIPH_SENS; - } else if (reg < DR_REG_IO_MUX_BASE){ - ret = RD_REG_PERIPH_RTC_I2C; - } else { - assert(0 && "invalid register base"); - } - return ret; -} - -/** - * Write literal value to a peripheral register - * - * reg[high_bit : low_bit] = val - * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. - */ -#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ - .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ - .data = val, \ - .low = low_bit, \ - .high = high_bit, \ - .opcode = OPCODE_WR_REG } } - -/** - * Read from peripheral register into R0 - * - * R0 = reg[high_bit : low_bit] - * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. - */ -#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ - .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ - .unused = 0, \ - .low = low_bit, \ - .high = high_bit, \ - .opcode = OPCODE_RD_REG } } - -/** - * Set or clear a bit in the peripheral register. - * - * Sets bit (1 << shift) of register reg to value val. - * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. - */ -#define I_WR_REG_BIT(reg, shift, val) I_WR_REG(reg, shift, shift, val) - -/** - * Wake the SoC from deep sleep. - * - * This instruction initiates wake up from deep sleep. - * Use esp_deep_sleep_enable_ulp_wakeup to enable deep sleep wakeup - * triggered by the ULP before going into deep sleep. - * Note that ULP program will still keep running until the I_HALT - * instruction, and it will still be restarted by timer at regular - * intervals, even when the SoC is woken up. - * - * To stop the ULP program, use I_HALT instruction. - * - * To disable the timer which start ULP program, use I_END() - * instruction. I_END instruction clears the - * RTC_CNTL_ULP_CP_SLP_TIMER_EN_S bit of RTC_CNTL_STATE0_REG - * register, which controls the ULP timer. - */ -#define I_WAKE() { .end = { \ - .wakeup = 1, \ - .unused = 0, \ - .sub_opcode = SUB_OPCODE_END, \ - .opcode = OPCODE_END } } - -/** - * Stop ULP program timer. - * - * This is a convenience macro which disables the ULP program timer. - * Once this instruction is used, ULP program will not be restarted - * anymore until ulp_run function is called. - * - * ULP program will continue running after this instruction. To stop - * the currently running program, use I_HALT(). - */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define I_END() \ - I_WR_REG_BIT(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0) -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -#define I_END() \ - I_WR_REG_BIT(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0) -#endif -/** - * Select the time interval used to run ULP program. - * - * This instructions selects which of the SENS_SLEEP_CYCLES_Sx - * registers' value is used by the ULP program timer. - * When the ULP program stops at I_HALT instruction, ULP program - * timer start counting. When the counter reaches the value of - * the selected SENS_SLEEP_CYCLES_Sx register, ULP program - * start running again from the start address (passed to the ulp_run - * function). - * There are 5 SENS_SLEEP_CYCLES_Sx registers, so 0 <= timer_idx < 5. - * - * By default, SENS_SLEEP_CYCLES_S0 register is used by the ULP - * program timer. - */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \ - .cycle_sel = timer_idx, \ - .unused = 0, \ - .sub_opcode = SUB_OPCODE_SLEEP, \ - .opcode = OPCODE_END } } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \ - .cycle_sel = timer_idx, \ - .unused = 0, \ - .opcode = OPCODE_SLEEP_WAIT } } -#endif -/** - * Perform temperature sensor measurement and store it into reg_dest. - * - * Delay can be set between 1 and ((1 << 14) - 1). Higher values give - * higher measurement resolution. - */ -#define I_TSENS(reg_dest, delay) { .tsens = { \ - .dreg = reg_dest, \ - .wait_delay = delay, \ - .reserved = 0, \ - .opcode = OPCODE_TSENS } } - -/** - * Perform ADC measurement and store result in reg_dest. - * - * adc_idx selects ADC (0 or 1). - * pad_idx selects ADC pad (0 - 7). - */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\ - .dreg = reg_dest, \ - .mux = pad_idx + 1, \ - .sar_sel = adc_idx, \ - .unused1 = 0, \ - .cycles = 0, \ - .unused2 = 0, \ - .opcode = OPCODE_ADC } } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\ - .dreg = reg_dest, \ - .mux = pad_idx + 1, \ - .sar_sel = adc_idx, \ - .hall_phase = 0, \ - .xpd_hall = 0, \ - .unused1 = 0, \ - .opcode = OPCODE_ADC } } -#endif - -/** - * Store value from register reg_val into RTC memory. - * - * The value is written to an offset calculated by adding value of - * reg_addr register and offset_ field (this offset is expressed in 32-bit words). - * 32 bits written to RTC memory are built as follows: - * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words - * - bits [20:16] = 5'b1 - * - bits [15:0] are assigned the contents of reg_val - * - * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] } - */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define I_ST(reg_val, reg_addr, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .sub_opcode = SUB_OPCODE_ST, \ - .opcode = OPCODE_ST } } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -/** - * burst Mode: write to consecutive address spaces. - * STW, STC instructions for the Class burst storage instructions for continuous address space write operation; - * Need to be used with the SET_OFFSET instruction, you first need to set the start address offset by SET_OFFSET, SREG is the base address, - * Where STW instruction WORD instruction, each execution time, address offset+1;STC for the half-word operation - * (First write high 16bit current address, the Second Write low 16bit current address), each performed twice, the address offset+1. - * Note: when using STC, you must write a word, that is, a burst operation instruction must be an even number. - */ -#define I_STO(offset_) { .st = { \ - .dreg = 0, \ - .sreg = 0, \ - .data_label = 0, \ - .upper = 0, \ - .write_way = 0, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -#define I_STW(reg_val, reg_addr) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = 0, \ - .upper = 0, \ - .write_way = 0, \ - .unused1 = 0, \ - .offset = 0, \ - .unused2 = 0, \ - .wr_auto = 1, \ - .offset_set = 0, \ - .manul_en = 0, \ - .opcode = OPCODE_ST } } - -#define I_STC(reg_val, reg_addr) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = 0, \ - .upper = 0, \ - .write_way = 3, \ - .unused1 = 0, \ - .offset = 0, \ - .unused2 = 0, \ - .wr_auto = 1, \ - .offset_set = 0, \ - .manul_en = 0, \ - .opcode = OPCODE_ST } } -/** - * Single mode of operation: write to a single address space. - * - * Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and - * value of offset_. - */ -/* Mem [ Rsrc1 + offset ]{31:0} = {PC[10:0], 5�d0,Rdst[15:0]} */ -#define I_ST(reg_val, reg_addr, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = 0, \ - .upper = 0, \ - .write_way = 0, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -/* Mem [ Rsrc1 + offset ]{31:16} = {Rdst[15:0]} */ -#define I_STM32U(reg_val, reg_addr, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = 0, \ - .upper = 1, \ - .write_way = 3, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused1 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -/* Mem [ Rsrc1 + offset ]{15:0} = {Rdst[15:0]} */ -#define I_STM32L(reg_val, reg_addr, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = 0, \ - .upper = 0, \ - .write_way = 3, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -/* Mem [ Rsrc1 + offset ]{31:0} = {data_label[1:0],Rdst[13:0]} */ -#define I_STMLBU(reg_val, reg_addr, label, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = label, \ - .upper = 1, \ - .write_way = 1, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused1 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -/* Mem [ Rsrc1 + offset ]{15:0} = {data_label[1:0],Rdst[13:0]} */ -#define I_STMLBL(reg_val, reg_addr, label, offset_) { .st = { \ - .dreg = reg_val, \ - .sreg = reg_addr, \ - .data_label = label, \ - .upper = 0, \ - .write_way = 1, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .wr_auto = 0, \ - .offset_set = 0, \ - .manul_en = 1, \ - .opcode = OPCODE_ST } } - -#endif - -/** - * Load value from RTC memory into reg_dest register. - * - * Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and - * value of offset_. - */ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \ - .dreg = reg_dest, \ - .sreg = reg_addr, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .opcode = OPCODE_LD } } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \ - .dreg = reg_dest, \ - .sreg = reg_addr, \ - .unused1 = 0, \ - .offset = offset_, \ - .unused2 = 0, \ - .rd_upper = 0, \ - .opcode = OPCODE_LD } } -#endif - -/** - * Branch relative if R0 less than immediate value. - * - * pc_offset is expressed in words, and can be from -127 to 127 - * imm_value is a 16-bit value to compare R0 against - */ -#define I_BL(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_L, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B, \ - .opcode = OPCODE_BRANCH } } - -#ifdef CONFIG_IDF_TARGET_ESP32 -/** - * Branch relative if R0 greater or equal than immediate value. - * - * pc_offset is expressed in words, and can be from -127 to 127 - * imm_value is a 16-bit value to compare R0 against - */ -#define I_BGE(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_GE, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B, \ - .opcode = OPCODE_BRANCH } } -#endif - -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA - -/** - * Branch relative if R0 greater than immediate value. - * - * pc_offset is expressed in words, and can be from -127 to 127 - * imm_value is a 16-bit value to compare R0 against - */ -#define I_BG(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_GE, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B, \ - .opcode = OPCODE_BRANCH } } - -/** - * Branch relative if R0 equal to immediate value. - * - * pc_offset is expressed in words, and can be from -127 to 127 - * imm_value is a 16-bit value to compare R0 against - */ -#define I_BE(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_EQ, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B, \ - .opcode = OPCODE_BRANCH } } - -/* - * Branch to a relative offset base on stage reg - * If stage reg less imm_value, PC will jump pc_offset. - */ -#define I_BRLS(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_L, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B_STAGE, \ - .opcode = OPCODE_BRANCH } } - -/* - * Branch to a relative offset base on stage reg - * If stage reg greater imm_value, PC will jump pc_offset. - */ -#define I_BRGS(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_GE, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B_STAGE, \ - .opcode = OPCODE_BRANCH } } - -/* - * Branch to a relative offset base on stage reg - * If stage reg equal to imm_value, PC will jump pc_offset. - */ -#define I_BRES(pc_offset, imm_value) { .b = { \ - .imm = imm_value, \ - .cmp = B_CMP_EQ, \ - .offset = abs(pc_offset), \ - .sign = (pc_offset >= 0) ? 0 : 1, \ - .sub_opcode = SUB_OPCODE_B_STAGE, \ - .opcode = OPCODE_BRANCH } } - -#endif -/** - * Unconditional branch to absolute PC, address in register. - * - * reg_pc is the register which contains address to jump to. - * Address is expressed in 32-bit words. - */ -#define I_BXR(reg_pc) { .bx = { \ - .dreg = reg_pc, \ - .addr = 0, \ - .unused = 0, \ - .reg = 1, \ - .type = BX_JUMP_TYPE_DIRECT, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - -/** - * Unconditional branch to absolute PC, immediate address. - * - * Address imm_pc is expressed in 32-bit words. - */ -#define I_BXI(imm_pc) { .bx = { \ - .dreg = 0, \ - .addr = imm_pc, \ - .unused = 0, \ - .reg = 0, \ - .type = BX_JUMP_TYPE_DIRECT, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - -/** - * Branch to absolute PC if ALU result is zero, address in register. - * - * reg_pc is the register which contains address to jump to. - * Address is expressed in 32-bit words. - */ -#define I_BXZR(reg_pc) { .bx = { \ - .dreg = reg_pc, \ - .addr = 0, \ - .unused = 0, \ - .reg = 1, \ - .type = BX_JUMP_TYPE_ZERO, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - -/** - * Branch to absolute PC if ALU result is zero, immediate address. - * - * Address imm_pc is expressed in 32-bit words. - */ -#define I_BXZI(imm_pc) { .bx = { \ - .dreg = 0, \ - .addr = imm_pc, \ - .unused = 0, \ - .reg = 0, \ - .type = BX_JUMP_TYPE_ZERO, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - -/** - * Branch to absolute PC if ALU overflow, address in register - * - * reg_pc is the register which contains address to jump to. - * Address is expressed in 32-bit words. - */ -#define I_BXFR(reg_pc) { .bx = { \ - .dreg = reg_pc, \ - .addr = 0, \ - .unused = 0, \ - .reg = 1, \ - .type = BX_JUMP_TYPE_OVF, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - -/** - * Branch to absolute PC if ALU overflow, immediate address - * - * Address imm_pc is expressed in 32-bit words. - */ -#define I_BXFI(imm_pc) { .bx = { \ - .dreg = 0, \ - .addr = imm_pc, \ - .unused = 0, \ - .reg = 0, \ - .type = BX_JUMP_TYPE_OVF, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_BX, \ - .opcode = OPCODE_BRANCH } } - - -/** - * Addition: dest = src1 + src2 - */ -#define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src1, \ - .treg = reg_src2, \ - .unused = 0, \ - .sel = ALU_SEL_ADD, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Subtraction: dest = src1 - src2 - */ -#define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src1, \ - .treg = reg_src2, \ - .unused = 0, \ - .sel = ALU_SEL_SUB, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Logical AND: dest = src1 & src2 - */ -#define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src1, \ - .treg = reg_src2, \ - .unused = 0, \ - .sel = ALU_SEL_AND, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Logical OR: dest = src1 | src2 - */ -#define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src1, \ - .treg = reg_src2, \ - .unused = 0, \ - .sel = ALU_SEL_OR, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Copy: dest = src - */ -#define I_MOVR(reg_dest, reg_src) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .treg = 0, \ - .unused = 0, \ - .sel = ALU_SEL_MOV, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Logical shift left: dest = src << shift - */ -#define I_LSHR(reg_dest, reg_src, reg_shift) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .treg = reg_shift, \ - .unused = 0, \ - .sel = ALU_SEL_LSH, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - - -/** - * Logical shift right: dest = src >> shift - */ -#define I_RSHR(reg_dest, reg_src, reg_shift) { .alu_reg = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .treg = reg_shift, \ - .unused = 0, \ - .sel = ALU_SEL_RSH, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_REG, \ - .opcode = OPCODE_ALU } } - -/** - * Add register and an immediate value: dest = src1 + imm - */ -#define I_ADDI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_ADD, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - - -/** - * Subtract register and an immediate value: dest = src - imm - */ -#define I_SUBI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_SUB, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - -/** - * Logical AND register and an immediate value: dest = src & imm - */ -#define I_ANDI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_AND, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - -/** - * Logical OR register and an immediate value: dest = src | imm - */ -#define I_ORI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_OR, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - -/** - * Copy an immediate value into register: dest = imm - */ -#define I_MOVI(reg_dest, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = 0, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_MOV, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - -/** - * Logical shift left register value by an immediate: dest = src << imm - */ -#define I_LSHI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_LSH, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - - -/** - * Logical shift right register value by an immediate: dest = val >> imm - */ -#define I_RSHI(reg_dest, reg_src, imm_) { .alu_imm = { \ - .dreg = reg_dest, \ - .sreg = reg_src, \ - .imm = imm_, \ - .unused = 0, \ - .sel = ALU_SEL_RSH, \ - .unused1 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_IMM, \ - .opcode = OPCODE_ALU } } - - -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA -/** - * Increments the stage counter for the subscript of the cycle count, Stage_cnt = Stage_cnt + Imm - */ -#define I_SINC(imm_) { .alu_cnt = { \ - .unused = 0, \ - .imm = imm_, \ - .unused1 = 0, \ - .sel = ALU_SEL_INC, \ - .unused2 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_CNT, \ - .opcode = OPCODE_ALU } } - -/** - * Decrements the stage counter for the subscript of the cycle count, Stage_cnt = Stage_cnt - Imm - */ -#define I_SDEC(imm_) { .alu_cnt = { \ - .unused = 0, \ - .imm = imm_, \ - .unused1 = 0, \ - .sel = ALU_SEL_DEC, \ - .unused2 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_CNT, \ - .opcode = OPCODE_ALU } } - - /** - * Phase counter is reset for the cycle count subscript, Stage_cnt = 0 - */ -#define I_SRST() { .alu_cnt = { \ - .unused = 0, \ - .imm = 0, \ - .unused1 = 0, \ - .sel = ALU_SEL_RST, \ - .unused2 = 0, \ - .sub_opcode = SUB_OPCODE_ALU_CNT, \ - .opcode = OPCODE_ALU } } -#endif - -/** - * Define a label with number label_num. - * - * This is a macro which doesn't generate a real instruction. - * The token generated by this macro is removed by ulp_process_macros_and_load - * function. Label defined using this macro can be used in branch macros defined - * below. - */ -#define M_LABEL(label_num) { .macro = { \ - .label = label_num, \ - .unused = 0, \ - .sub_opcode = SUB_OPCODE_MACRO_LABEL, \ - .opcode = OPCODE_MACRO } } - -/** - * Token macro used by M_B and M_BX macros. Not to be used directly. - */ -#define M_BRANCH(label_num) { .macro = { \ - .label = label_num, \ - .unused = 0, \ - .sub_opcode = SUB_OPCODE_MACRO_BRANCH, \ - .opcode = OPCODE_MACRO } } - -/** - * Macro: branch to label label_num if R0 is less than immediate value. - * - * This macro generates two ulp_insn_t values separated by a comma, and should - * be used when defining contents of ulp_insn_t arrays. First value is not a - * real instruction; it is a token which is removed by ulp_process_macros_and_load - * function. - */ -#define M_BL(label_num, imm_value) \ - M_BRANCH(label_num), \ - I_BL(0, imm_value) - -/** - * Macro: branch to label label_num if R0 is greater or equal than immediate value - * - * This macro generates two ulp_insn_t values separated by a comma, and should - * be used when defining contents of ulp_insn_t arrays. First value is not a - * real instruction; it is a token which is removed by ulp_process_macros_and_load - * function. - */ -#define M_BGE(label_num, imm_value) \ - M_BRANCH(label_num), \ - I_BGE(0, imm_value) - -/** - * Macro: unconditional branch to label - * - * This macro generates two ulp_insn_t values separated by a comma, and should - * be used when defining contents of ulp_insn_t arrays. First value is not a - * real instruction; it is a token which is removed by ulp_process_macros_and_load - * function. - */ -#define M_BX(label_num) \ - M_BRANCH(label_num), \ - I_BXI(0) - -/** - * Macro: branch to label if ALU result is zero - * - * This macro generates two ulp_insn_t values separated by a comma, and should - * be used when defining contents of ulp_insn_t arrays. First value is not a - * real instruction; it is a token which is removed by ulp_process_macros_and_load - * function. - */ -#define M_BXZ(label_num) \ - M_BRANCH(label_num), \ - I_BXZI(0) - -/** - * Macro: branch to label if ALU overflow - * - * This macro generates two ulp_insn_t values separated by a comma, and should - * be used when defining contents of ulp_insn_t arrays. First value is not a - * real instruction; it is a token which is removed by ulp_process_macros_and_load - * function. - */ -#define M_BXF(label_num) \ - M_BRANCH(label_num), \ - I_BXFI(0) - - - -#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< RTC slow memory, 8k size */ - -#ifdef __cplusplus -} -#endif diff --git a/components/ulp/include/ulp_common.h b/components/ulp/include/ulp_common.h index b7c773d658..cc39bd482b 100644 --- a/components/ulp/include/ulp_common.h +++ b/components/ulp/include/ulp_common.h @@ -14,7 +14,7 @@ #pragma once /* This file contains definitions that are common between esp32/ulp.h - and esp32s2beta/ulp.h + and esp32s2/ulp.h */ #ifdef __cplusplus diff --git a/components/ulp/project_include.cmake b/components/ulp/project_include.cmake index 94afe208d0..aae8218971 100644 --- a/components/ulp/project_include.cmake +++ b/components/ulp/project_include.cmake @@ -37,8 +37,8 @@ function(ulp_embed_binary app_name s_sources exp_dep_srcs) if(IDF_TARGET STREQUAL "esp32") set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-esp32-ulp.cmake) endif() - if(IDF_TARGET STREQUAL "esp32s2beta") - set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-esp32s2beta-ulp.cmake) + if(IDF_TARGET STREQUAL "esp32s2") + set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-esp32s2-ulp.cmake) endif() externalproject_add(${app_name} diff --git a/components/ulp/ulp.c b/components/ulp/ulp.c index cc460bc250..682c29bf86 100644 --- a/components/ulp/ulp.c +++ b/components/ulp/ulp.c @@ -22,9 +22,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" #include "esp32/ulp.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" -#include "esp32s2beta/ulp.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" +#include "esp32s2/ulp.h" #endif #include "soc/soc.h" @@ -65,7 +65,7 @@ esp_err_t ulp_run(uint32_t entry_point) SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_SLEEP_FOLW_8M); // enable ULP timer SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN); -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 // disable ULP timer CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN); // wait for at least 1 RTC_SLOW_CLK cycle @@ -150,7 +150,7 @@ esp_err_t ulp_set_wakeup_period(size_t period_index, uint32_t period_us) } REG_SET_FIELD(SENS_ULP_CP_SLEEP_CYC0_REG + period_index * sizeof(uint32_t), SENS_SLEEP_CYCLES_S0, (uint32_t) period_cycles); -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 if (period_index > 4) { return ESP_ERR_INVALID_ARG; } diff --git a/components/unity/include/unity_test_runner.h b/components/unity/include/unity_test_runner.h index ee092d0fbb..ac504a29ee 100644 --- a/components/unity/include/unity_test_runner.h +++ b/components/unity/include/unity_test_runner.h @@ -184,7 +184,7 @@ void unity_run_menu(void); * * Usage: * ``` - * #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA, ESP32S2) + * #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S2) * TEST_CASE("only for esp32", "") * { * } diff --git a/components/unity/unity_port_esp32.c b/components/unity/unity_port_esp32.c index dcc01156bf..a049f467af 100644 --- a/components/unity/unity_port_esp32.c +++ b/components/unity/unity_port_esp32.c @@ -18,9 +18,9 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" #include "esp32/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" -#include "esp32s2beta/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" +#include "esp32s2/rom/uart.h" #endif static uint32_t s_test_start, s_test_stop; diff --git a/components/vfs/test/test_vfs_uart.c b/components/vfs/test/test_vfs_uart.c index 255e54f83c..32896c9563 100644 --- a/components/vfs/test/test_vfs_uart.c +++ b/components/vfs/test/test_vfs_uart.c @@ -21,8 +21,8 @@ #include "unity.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/uart.h" #endif #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/vfs/vfs_uart.c b/components/vfs/vfs_uart.c index dc430b82bb..e882d5e5e4 100644 --- a/components/vfs/vfs_uart.c +++ b/components/vfs/vfs_uart.c @@ -28,8 +28,8 @@ #include "driver/uart_select.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/uart.h" #endif // TODO: make the number of UARTs chip dependent @@ -162,7 +162,7 @@ static void uart_tx_char(int fd, int c) } #if CONFIG_IDF_TARGET_ESP32 uart->fifo.rw_byte = c; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 uart->ahb_fifo.rw_byte = c; #endif } @@ -181,7 +181,7 @@ static int uart_rx_char(int fd) } #if CONFIG_IDF_TARGET_ESP32 return uart->fifo.rw_byte; -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 return READ_PERI_REG(UART_FIFO_AHB_REG(fd)); #endif } diff --git a/components/wear_levelling/test/test_wl.c b/components/wear_levelling/test/test_wl.c index 63b449518b..bc3699c811 100644 --- a/components/wear_levelling/test/test_wl.c +++ b/components/wear_levelling/test/test_wl.c @@ -9,8 +9,8 @@ #include "freertos/semphr.h" #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif defined(CONFIG_IDF_TARGET_ESP32S2BETA) -#include "esp32s2beta/clk.h" +#elif defined(CONFIG_IDF_TARGET_ESP32S2) +#include "esp32s2/clk.h" #endif #include "soc/cpu.h" diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.h b/components/wpa_supplicant/src/rsn_supp/wpa.h index f3ddd14d61..68c2b3e538 100644 --- a/components/wpa_supplicant/src/rsn_supp/wpa.h +++ b/components/wpa_supplicant/src/rsn_supp/wpa.h @@ -19,8 +19,8 @@ #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #include "utils/common.h" #include "common/defs.h" diff --git a/components/wpa_supplicant/src/utils/includes.h b/components/wpa_supplicant/src/utils/includes.h index 3f49f513b9..3b03326f62 100644 --- a/components/wpa_supplicant/src/utils/includes.h +++ b/components/wpa_supplicant/src/utils/includes.h @@ -56,8 +56,8 @@ #else #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #endif /* !__ets__ */ diff --git a/components/wpa_supplicant/src/wps/wps.h b/components/wpa_supplicant/src/wps/wps.h index 5821634193..4aace58660 100644 --- a/components/wpa_supplicant/src/wps/wps.h +++ b/components/wpa_supplicant/src/wps/wps.h @@ -11,8 +11,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif #include "wps_defs.h" #include "esp_wifi_types.h" diff --git a/components/xtensa/CMakeLists.txt b/components/xtensa/CMakeLists.txt index a360fb2ed3..1f8df4536d 100644 --- a/components/xtensa/CMakeLists.txt +++ b/components/xtensa/CMakeLists.txt @@ -10,7 +10,7 @@ else() "eri.c" ) - if(IDF_TARGET STREQUAL "esp32s2beta") + if(IDF_TARGET STREQUAL "esp32s2") list(APPEND srcs "stdatomic.c") endif() if(IDF_TARGET STREQUAL "esp32") diff --git a/components/xtensa/debug_helpers.c b/components/xtensa/debug_helpers.c index ff457c7fc0..06c7f9b23f 100644 --- a/components/xtensa/debug_helpers.c +++ b/components/xtensa/debug_helpers.c @@ -22,8 +22,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/ets_sys.h" #endif bool IRAM_ATTR esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame) diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/core-isa.h b/components/xtensa/esp32s2/include/xtensa/config/core-isa.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/core-isa.h rename to components/xtensa/esp32s2/include/xtensa/config/core-isa.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/core-matmap.h b/components/xtensa/esp32s2/include/xtensa/config/core-matmap.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/core-matmap.h rename to components/xtensa/esp32s2/include/xtensa/config/core-matmap.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/core.h b/components/xtensa/esp32s2/include/xtensa/config/core.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/core.h rename to components/xtensa/esp32s2/include/xtensa/config/core.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/defs.h b/components/xtensa/esp32s2/include/xtensa/config/defs.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/defs.h rename to components/xtensa/esp32s2/include/xtensa/config/defs.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/specreg.h b/components/xtensa/esp32s2/include/xtensa/config/specreg.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/specreg.h rename to components/xtensa/esp32s2/include/xtensa/config/specreg.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/system.h b/components/xtensa/esp32s2/include/xtensa/config/system.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/system.h rename to components/xtensa/esp32s2/include/xtensa/config/system.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/tie-asm.h b/components/xtensa/esp32s2/include/xtensa/config/tie-asm.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/tie-asm.h rename to components/xtensa/esp32s2/include/xtensa/config/tie-asm.h diff --git a/components/xtensa/esp32s2beta/include/xtensa/config/tie.h b/components/xtensa/esp32s2/include/xtensa/config/tie.h similarity index 100% rename from components/xtensa/esp32s2beta/include/xtensa/config/tie.h rename to components/xtensa/esp32s2/include/xtensa/config/tie.h diff --git a/components/xtensa/esp32s2beta/libhal.a b/components/xtensa/esp32s2/libhal.a similarity index 100% rename from components/xtensa/esp32s2beta/libhal.a rename to components/xtensa/esp32s2/libhal.a diff --git a/docs/Doxyfile b/docs/Doxyfile index 384c8a5d13..7c163f709c 100644 --- a/docs/Doxyfile +++ b/docs/Doxyfile @@ -103,7 +103,7 @@ INPUT = \ ../../components/driver/include/driver/spi_common.h \ ../../components/driver/include/driver/spi_master.h \ ../../components/driver/include/driver/spi_slave.h \ - ../../components/driver/esp32s2beta/include/temp_sensor.h \ + ../../components/driver/esp32s2/include/temp_sensor.h \ ../../components/driver/include/driver/timer.h \ ../../components/driver/include/driver/touch_pad.h \ ../../components/driver/include/driver/uart.h \ diff --git a/docs/conf_common.py b/docs/conf_common.py index 708321af77..12dae77eb1 100644 --- a/docs/conf_common.py +++ b/docs/conf_common.py @@ -95,10 +95,10 @@ kconfigs = find_component_files("../../components", "Kconfig") kconfig_projbuilds = find_component_files("../../components", "Kconfig.projbuild") sdkconfig_renames = find_component_files("../../components", "sdkconfig.rename") -# trim the esp32s2beta component, until we have proper multi-target support -kconfigs = [k for k in kconfigs if "esp32s2beta" not in k] -kconfig_projbuilds = [k for k in kconfig_projbuilds if "esp32s2beta" not in k] -sdkconfig_renames = [r for r in sdkconfig_renames if "esp32s2beta" not in r] +# trim the esp32s2 component, until we have proper multi-target support +kconfigs = [k for k in kconfigs if "esp32s2" not in k] +kconfig_projbuilds = [k for k in kconfig_projbuilds if "esp32s2" not in k] +sdkconfig_renames = [r for r in sdkconfig_renames if "esp32s2" not in r] kconfigs_source_path = '{}/inc/kconfigs_source.in'.format(builddir) kconfig_projbuilds_source_path = '{}/inc/kconfig_projbuilds_source.in'.format(builddir) diff --git a/docs/en/esp32s2beta.rst b/docs/en/esp32s2.rst similarity index 66% rename from docs/en/esp32s2beta.rst rename to docs/en/esp32s2.rst index aa5d129b73..0730511bd8 100644 --- a/docs/en/esp32s2beta.rst +++ b/docs/en/esp32s2.rst @@ -1,9 +1,7 @@ -ESP32-S2 Beta Preview Support -============================= +ESP32-S2 Preview Support +======================== -The current master branch of ESP-IDF (pre-V4.1) contains preview support for ESP32-S2 Beta. - -The ESP32-S2 Beta chip is not the same as the final ESP32-S2, the Beta chip is a limited engineering sample and as a result not all features are available. +The current master branch of ESP-IDF (pre-V4.2) contains preview support for ESP32-S2. Software support is still being developed ahead of the final ESP32-S2 release (see :ref:`esp32s2-limitations` and :ref:`esp32s2-roadmap` sections below). @@ -12,8 +10,8 @@ Documentation Except where it specifically mentions ESP32-S2, this version of the ESP-IDF Programming Guide is written for ESP32 only. Most software APIs and components are the same or very similar for ESP32-S2, but differences may not be documented yet. -Setting up for ESP32-S2 Beta -^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Setting up for ESP32-S2 +^^^^^^^^^^^^^^^^^^^^^^^ To start with, follow the :doc:`/get-started/index` guide to configure the CMake-based build system for ESP32. @@ -33,10 +31,10 @@ If not using ``install.sh`` or ``install.bat``, you can download the manual tool If installing the toolchain manually, unpack it somewhere and add the ``bin`` subdirectory to your `PATH`. -Building a project for ESP32-S2 Beta -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Building a project for ESP32-S2 +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -.. important:: Not all ESP-IDF examples support ESP32-S2 Beta. +.. important:: Not all ESP-IDF examples support ESP32-S2. For some examples this is because required hardware is not included in ESP32-S2 so it cannot be supported. For some examples this is because the example has not yet been updated for ESP32-S2. @@ -44,9 +42,9 @@ Building a project for ESP32-S2 Beta .. highlight:: bash -Before building an ESP-IDF project, run the following command to switch the target to ESP32-S2 Beta:: +Before building an ESP-IDF project, run the following command to switch the target to ESP32-S2:: - idf.py set-target esp32s2beta + idf.py set-target esp32s2 .. important:: Running ``set-target`` will clear the project configuration and create a new empty ``sdkconfig`` file for the project. The old configuration will be saved in ``sdkconfig.old``. @@ -54,7 +52,7 @@ Then configure the project:: idf.py menuconfig -.. important:: There are 3 versions of ESP32-S2 Beta engineering sample available with different Wi-Fi PHYs. They can be identified by the marking on the chip itself. The project must be configured to match the chip via the project setting "ESP32-S2 Beta chip version" (``CONFIG_ESP32S2_BETA_CHIP_VERSION``). This can be found under Component Config -> ESP32S2-specific. If the project setting doesn't match the chip then Wi-Fi performance may be very poor, or the chip may crash when initializing Wi-Fi. +.. important:: There are 3 versions of ESP32-S2 available with different Wi-Fi PHYs. They can be identified by the marking on the chip itself. The project must be configured to match the chip via the project setting "ESP32-S2 chip version" (``CONFIG_ESP32S2_CHIP_VERSION``). This can be found under Component Config -> ESP32S2-specific. If the project setting doesn't match the chip then Wi-Fi performance may be very poor, or the chip may crash when initializing Wi-Fi. Build and flash the project as usual, for example:: @@ -69,7 +67,7 @@ Consult the :doc:`/get-started/index` guide for more details on building and fla Limitations ^^^^^^^^^^^ -ESP32-S2 Beta support is currently a preview and does not support all features. Espressif firmware developers are working hard on the remaining support, so please update the ``master`` branch regularly to receive the latest code. +ESP32-S2 support is currently a preview and does not support all features. Espressif firmware developers are working hard on the remaining support, so please update the ``master`` branch regularly to receive the latest code. - The integrated USB OTG peripheral is not supported - Documentation not updated for ESP32-S2 in most places @@ -83,10 +81,10 @@ ESP32-S2 Beta support is currently a preview and does not support all features. Roadmap ^^^^^^^ -- ESP-IDF V4.1 will support ESP32-S2 Beta chip as a preview with some limitations. -- ESP-IDF V4.2 will support ESP32-S2. +- ESP-IDF V4.1 will support ESP32-S2beta chip as a preview with some limitations. +- ESP-IDF V4.2 will support ESP32-S2 (the previous ESP32-S2beta chip can't work on V4.2). -Support for ESP32-S2 Beta will be removed from ESP-IDF once ESP32-S2 is available. +Support for ESP32-S2beta will be removed from ESP-IDF once ESP32-S2 is available. Issues @@ -94,4 +92,4 @@ Issues If you find issues which are not mentioned in :ref:`esp32s2-limitations`, please `open an issue on GitHub `_. -Please make sure to mention that you are using the ESP32-S2 Beta preview support and give your exact version of ESP-IDF. +Please make sure to mention that you are using the ESP32-S2 preview support and give your exact version of ESP-IDF. diff --git a/docs/en/index.rst b/docs/en/index.rst index 7976bab04f..f9cf88b1db 100644 --- a/docs/en/index.rst +++ b/docs/en/index.rst @@ -41,7 +41,7 @@ This is the documentation for Espressif IoT Development Framework (`esp-idf API Reference H/W Reference - ESP32-S2 Preview Support + ESP32-S2 Preview Support API Guides Libraries and Frameworks Contribute diff --git a/docs/zh_CN/esp32s2.rst b/docs/zh_CN/esp32s2.rst new file mode 100644 index 0000000000..21a38a6a05 --- /dev/null +++ b/docs/zh_CN/esp32s2.rst @@ -0,0 +1 @@ +.. include:: ../en/esp32s2.rst diff --git a/docs/zh_CN/esp32s2beta.rst b/docs/zh_CN/esp32s2beta.rst deleted file mode 100644 index ca4e0016f0..0000000000 --- a/docs/zh_CN/esp32s2beta.rst +++ /dev/null @@ -1 +0,0 @@ -.. include:: ../en/esp32s2beta.rst diff --git a/docs/zh_CN/index.rst b/docs/zh_CN/index.rst index 60a74df61f..b3f2072ee7 100644 --- a/docs/zh_CN/index.rst +++ b/docs/zh_CN/index.rst @@ -42,7 +42,7 @@ ESP-IDF 编程指南 快速入门 API 参考 H/W 参考 - ESP32-S2 预览 + ESP32-S2 预览 API 指南 Libraries and Frameworks 贡献代码 diff --git a/examples/peripherals/adc/main/adc1_example_main.c b/examples/peripherals/adc/main/adc1_example_main.c index 594c05cc07..1cae709d18 100644 --- a/examples/peripherals/adc/main/adc1_example_main.c +++ b/examples/peripherals/adc/main/adc1_example_main.c @@ -22,9 +22,9 @@ #if CONFIG_IDF_TARGET_ESP32 static esp_adc_cal_characteristics_t *adc_chars; static const adc_channel_t channel = ADC_CHANNEL_6; //GPIO34 if ADC1, GPIO14 if ADC2 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 static const adc_channel_t channel = ADC_CHANNEL_6; // GPIO7 if ADC1, GPIO17 if ADC2 -#endif +#endif static const adc_atten_t atten = ADC_ATTEN_DB_0; static const adc_unit_t unit = ADC_UNIT_1; @@ -98,7 +98,7 @@ void app_main(void) //Convert adc_reading to voltage in mV uint32_t voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars); printf("Raw: %d\tVoltage: %dmV\n", adc_reading, voltage); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 printf("ADC%d CH%d Raw: %d\t\n", unit, channel, adc_reading); #endif vTaskDelay(pdMS_TO_TICKS(1000)); diff --git a/examples/peripherals/adc2/README.md b/examples/peripherals/adc2/README.md index aa5a5237f8..71f564249f 100644 --- a/examples/peripherals/adc2/README.md +++ b/examples/peripherals/adc2/README.md @@ -17,7 +17,7 @@ We use ADC1_CHANNEL_7 (GPIO27) and DAC_CHANNEL_1 (GPIO25) by default, you need t #### ESP32-S2 platform -* A development board with ESP32S2BETA SoC +* A development board with ESP32S2 SoC * A USB cable for power supply and programming We use ADC1_CHANNEL_7 (GPIO18) and DAC_CHANNEL_1 (GPIO17) by default, you need to short the two GPIOs (if you have changed the ADC2 and DAC channel, please refer to the `ESP32S2 Technical Reference Manual` to get the pin number). diff --git a/examples/peripherals/adc2/main/Kconfig.projbuild b/examples/peripherals/adc2/main/Kconfig.projbuild index 64b6aeca2e..0226be75cc 100644 --- a/examples/peripherals/adc2/main/Kconfig.projbuild +++ b/examples/peripherals/adc2/main/Kconfig.projbuild @@ -31,7 +31,7 @@ menu "Example Configuration" choice EXAMPLE_ADC2_CHANNEL bool "ADC2 Channel Num" - depends on IDF_TARGET_ESP32S2BETA + depends on IDF_TARGET_ESP32S2 default EXAMPLE_ADC2_CHANNEL_7 help The channel of ADC2 used in this example. @@ -86,7 +86,7 @@ menu "Example Configuration" choice EXAMPLE_DAC_CHANNEL bool "DAC Channel Num" - depends on IDF_TARGET_ESP32S2BETA + depends on IDF_TARGET_ESP32S2 default EXAMPLE_DAC_CHANNEL_1 help The channel of DAC used in this example. diff --git a/examples/peripherals/ledc/main/ledc_example_main.c b/examples/peripherals/ledc/main/ledc_example_main.c index 97e3a07c6c..ab476fa3da 100644 --- a/examples/peripherals/ledc/main/ledc_example_main.c +++ b/examples/peripherals/ledc/main/ledc_example_main.c @@ -43,7 +43,7 @@ #endif #define LEDC_LS_TIMER LEDC_TIMER_1 #define LEDC_LS_MODE LEDC_LOW_SPEED_MODE -#ifdef CONFIG_IDF_TARGET_ESP32S2BETA +#ifdef CONFIG_IDF_TARGET_ESP32S2 #define LEDC_LS_CH0_GPIO (18) #define LEDC_LS_CH0_CHANNEL LEDC_CHANNEL_0 #define LEDC_LS_CH1_GPIO (19) @@ -112,7 +112,7 @@ void app_main(void) .hpoint = 0, .timer_sel = LEDC_HS_TIMER }, -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 { .channel = LEDC_LS_CH0_CHANNEL, .duty = 0, diff --git a/examples/peripherals/spi_master/main/pretty_effect.c b/examples/peripherals/spi_master/main/pretty_effect.c index 96ef58e784..285a57e1ee 100644 --- a/examples/peripherals/spi_master/main/pretty_effect.c +++ b/examples/peripherals/spi_master/main/pretty_effect.c @@ -26,8 +26,8 @@ static inline uint16_t get_bgnd_pixel(int x, int y) y+=8; return pixels[y][x]; } -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA -//esp32s2beta doesn't have enough memory to hold the decoded image, calculate instead +#elif defined CONFIG_IDF_TARGET_ESP32S2 +//esp32s2 doesn't have enough memory to hold the decoded image, calculate instead static inline uint16_t get_bgnd_pixel(int x, int y) { return ((x<<3)^(y<<3)^(x*y)); @@ -69,8 +69,8 @@ esp_err_t pretty_effect_init(void) { #ifdef CONFIG_IDF_TARGET_ESP32 return decode_image(&pixels); -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA - //esp32s2beta doesn't have enough memory to hold the decoded image, calculate instead +#elif defined CONFIG_IDF_TARGET_ESP32S2 + //esp32s2 doesn't have enough memory to hold the decoded image, calculate instead return ESP_OK; #endif } diff --git a/examples/peripherals/spi_master/main/spi_master_example_main.c b/examples/peripherals/spi_master/main/spi_master_example_main.c index eda88fcf73..b83e73f8f7 100644 --- a/examples/peripherals/spi_master/main/spi_master_example_main.c +++ b/examples/peripherals/spi_master/main/spi_master_example_main.c @@ -40,7 +40,7 @@ #define PIN_NUM_DC 21 #define PIN_NUM_RST 18 #define PIN_NUM_BCKL 5 -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 #define LCD_HOST SPI2_HOST #define DMA_CHAN LCD_HOST diff --git a/examples/peripherals/spi_slave/receiver/main/app_main.c b/examples/peripherals/spi_slave/receiver/main/app_main.c index d602b58932..143ad89d65 100644 --- a/examples/peripherals/spi_slave/receiver/main/app_main.c +++ b/examples/peripherals/spi_slave/receiver/main/app_main.c @@ -59,7 +59,7 @@ Pins in use. The SPI Master can use the GPIO mux, so feel free to change these i #define RCV_HOST HSPI_HOST #define DMA_CHAN 2 -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 #define RCV_HOST SPI2_HOST #define DMA_CHAN RCV_HOST diff --git a/examples/peripherals/spi_slave/sender/main/app_main.c b/examples/peripherals/spi_slave/sender/main/app_main.c index 531421b7ec..9400bc583a 100644 --- a/examples/peripherals/spi_slave/sender/main/app_main.c +++ b/examples/peripherals/spi_slave/sender/main/app_main.c @@ -60,7 +60,7 @@ Pins in use. The SPI Master can use the GPIO mux, so feel free to change these i #define SENDER_HOST HSPI_HOST #define DMA_CHAN 2 -#elif defined CONFIG_IDF_TARGET_ESP32S2BETA +#elif defined CONFIG_IDF_TARGET_ESP32S2 #define SENDER_HOST SPI2_HOST #define DMA_CHAN SENDER_HOST diff --git a/examples/peripherals/temp_sensor_esp32s2/main/temp_sensor_main.c b/examples/peripherals/temp_sensor_esp32s2/main/temp_sensor_main.c index 32e3bd40e7..dd35d2f1f7 100644 --- a/examples/peripherals/temp_sensor_esp32s2/main/temp_sensor_main.c +++ b/examples/peripherals/temp_sensor_esp32s2/main/temp_sensor_main.c @@ -14,7 +14,7 @@ /* Note: ESP32 don't support temperature sensor */ -#if CONFIG_IDF_TARGET_ESP32S2BETA +#if CONFIG_IDF_TARGET_ESP32S2 #include "temp_sensor.h" static const char *TAG = "TempSensor"; diff --git a/examples/peripherals/touch_pad_interrupt/main/esp32s2beta/tp_interrupt_main.c b/examples/peripherals/touch_pad_interrupt/main/esp32s2/tp_interrupt_main.c similarity index 100% rename from examples/peripherals/touch_pad_interrupt/main/esp32s2beta/tp_interrupt_main.c rename to examples/peripherals/touch_pad_interrupt/main/esp32s2/tp_interrupt_main.c diff --git a/examples/peripherals/touch_pad_read/main/esp32s2beta/tp_read_main.c b/examples/peripherals/touch_pad_read/main/esp32s2/tp_read_main.c similarity index 100% rename from examples/peripherals/touch_pad_read/main/esp32s2beta/tp_read_main.c rename to examples/peripherals/touch_pad_read/main/esp32s2/tp_read_main.c diff --git a/examples/security/flash_encryption/CMakeLists.txt b/examples/security/flash_encryption/CMakeLists.txt index 33248e978d..05e3e744f8 100644 --- a/examples/security/flash_encryption/CMakeLists.txt +++ b/examples/security/flash_encryption/CMakeLists.txt @@ -2,6 +2,6 @@ # CMakeLists in this exact order for cmake to work correctly cmake_minimum_required(VERSION 3.5) -set(SUPPORTED_TARGETS esp32) # Flash encryption not currently supported for ESP32-S2beta +set(SUPPORTED_TARGETS esp32) # Flash encryption not currently supported for ESP32-S2 include($ENV{IDF_PATH}/tools/cmake/project.cmake) project(flash_encryption) diff --git a/examples/storage/ext_flash_fatfs/CMakeLists.txt b/examples/storage/ext_flash_fatfs/CMakeLists.txt index 52b78776cd..1023f764fa 100644 --- a/examples/storage/ext_flash_fatfs/CMakeLists.txt +++ b/examples/storage/ext_flash_fatfs/CMakeLists.txt @@ -2,6 +2,6 @@ # in this exact order for cmake to work correctly cmake_minimum_required(VERSION 3.5) -set(SUPPORTED_TARGETS esp32) # external SPI flash driver not currently supported for ESP32-S2beta +set(SUPPORTED_TARGETS esp32) # external SPI flash driver not currently supported for ESP32-S2 include($ENV{IDF_PATH}/tools/cmake/project.cmake) project(ext_flash_fatfs) diff --git a/examples/system/deep_sleep/main/deep_sleep_example_main.c b/examples/system/deep_sleep/main/deep_sleep_example_main.c index 646760b67b..295c6146df 100644 --- a/examples/system/deep_sleep/main/deep_sleep_example_main.c +++ b/examples/system/deep_sleep/main/deep_sleep_example_main.c @@ -168,7 +168,7 @@ void app_main(void) touch_pad_config(TOUCH_PAD_NUM9, TOUCH_THRESH_NO_USE); calibrate_touch_pad(TOUCH_PAD_NUM8); calibrate_touch_pad(TOUCH_PAD_NUM9); -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 /* Initialize touch pad peripheral. */ touch_pad_init(); /* Only support one touch channel in sleep mode. */ @@ -212,7 +212,7 @@ void app_main(void) touch_pad_sleep_channel_read_baseline(&touch_value); slp_config.sleep_pad_threshold = touch_value * 0.1; touch_pad_sleep_channel_config(&slp_config); //10% - printf("test init: touch pad [%d] slp %d, thresh %d\n", + printf("test init: touch pad [%d] slp %d, thresh %d\n", TOUCH_PAD_NUM9, touch_value, (uint32_t)(touch_value * 0.1)); #endif printf("Enabling touch pad wakeup\n"); @@ -244,7 +244,7 @@ void app_main(void) #endif esp_deep_sleep_start(); -} +} #ifdef CONFIG_ENABLE_TOUCH_WAKEUP #if CONFIG_IDF_TARGET_ESP32 diff --git a/tools/ci/check_public_headers_exceptions.txt b/tools/ci/check_public_headers_exceptions.txt index 45d808c7ab..7e6b38c74e 100644 --- a/tools/ci/check_public_headers_exceptions.txt +++ b/tools/ci/check_public_headers_exceptions.txt @@ -15,7 +15,7 @@ components/soc/esp32/include/soc/* components/soc/include/hal/* components/soc/include/soc/* -components/esp_rom/include/esp32s2beta/rom/rsa_pss.h +components/esp_rom/include/esp32s2/rom/rsa_pss.h components/esp_common/include/esp_private/* diff --git a/tools/ci/config/build.yml b/tools/ci/config/build.yml index cc98e4e3db..2edfa6ec8f 100644 --- a/tools/ci/config/build.yml +++ b/tools/ci/config/build.yml @@ -48,7 +48,7 @@ build_ssc_esp32: variables: TARGET_NAME: "ESP32" -build_ssc_esp32s2beta: +build_ssc_esp32s2: extends: .build_ssc_template parallel: 2 variables: @@ -182,7 +182,7 @@ build_examples_cmake_esp32: build_examples_cmake_esp32s2: extends: .build_examples_cmake variables: - IDF_TARGET: esp32s2beta + IDF_TARGET: esp32s2 # If you want to add new build example jobs, please add it into dependencies of `.example_test_template` diff --git a/tools/ci/config/deploy.yml b/tools/ci/config/deploy.yml index 6671981732..c7118b7486 100644 --- a/tools/ci/config/deploy.yml +++ b/tools/ci/config/deploy.yml @@ -56,7 +56,6 @@ push_to_github: - master - /^release\/v/ - /^v\d+\.\d+(\.\d+)?($|-)/ - - feature/esp32s2beta when: on_success dependencies: [] extends: .before_script_lesser diff --git a/tools/ci/config/host-test.yml b/tools/ci/config/host-test.yml index 41cc45779c..b56cf23323 100644 --- a/tools/ci/config/host-test.yml +++ b/tools/ci/config/host-test.yml @@ -233,19 +233,19 @@ test_esp32_efuse_table_on_host: - cd ${IDF_PATH}/components/efuse/test_efuse_host - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh ./efuse_tests.py -test_esp32s2beta_efuse_table_on_host: +test_esp32s2_efuse_table_on_host: extends: .host_test_template artifacts: when: on_failure paths: - - components/efuse/esp32s2beta/esp_efuse_table.c + - components/efuse/esp32s2/esp_efuse_table.c expire_in: 1 week script: - cd ${IDF_PATH}/components/efuse/ - - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 2.7.15 ./efuse_table_gen.py -t "esp32s2beta" ${IDF_PATH}/components/efuse/esp32s2beta/esp_efuse_table.csv - - git diff --exit-code -- esp32s2beta/esp_efuse_table.c || { echo 'Differences found for esp32s2beta target. Please run make efuse_common_table or idf.py efuse_common_table and commit the changes.'; exit 1; } - - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 3.4.8 ./efuse_table_gen.py -t "esp32s2beta" ${IDF_PATH}/components/efuse/esp32s2beta/esp_efuse_table.csv - - git diff --exit-code -- esp32s2beta/esp_efuse_table.c || { echo 'Differences found between running under Python 2 and 3.'; exit 1; } + - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 2.7.15 ./efuse_table_gen.py -t "esp32s2" ${IDF_PATH}/components/efuse/esp32s2/esp_efuse_table.csv + - git diff --exit-code -- esp32s2/esp_efuse_table.c || { echo 'Differences found for esp32s2 target. Please run make efuse_common_table or idf.py efuse_common_table and commit the changes.'; exit 1; } + - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 3.4.8 ./efuse_table_gen.py -t "esp32s2" ${IDF_PATH}/components/efuse/esp32s2/esp_efuse_table.csv + - git diff --exit-code -- esp32s2/esp_efuse_table.c || { echo 'Differences found between running under Python 2 and 3.'; exit 1; } - cd ${IDF_PATH}/components/efuse/test_efuse_host - ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh ./efuse_tests.py diff --git a/tools/ci/config/pre_check.yml b/tools/ci/config/pre_check.yml index 855eb2e9d5..2acb320eff 100644 --- a/tools/ci/config/pre_check.yml +++ b/tools/ci/config/pre_check.yml @@ -85,7 +85,7 @@ check_wifi_lib_md5: dependencies: [] script: - IDF_TARGET=esp32 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh - - IDF_TARGET=esp32s2beta $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh + - IDF_TARGET=esp32s2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh .build_with_make_and_cmake: &build_with_make_and_cmake | echo -e "section_end:"`date +%s`":build_script\r\e[0Ksection_start:"`date +%s`":build_make\r\e[0KBuild with Make" @@ -148,8 +148,8 @@ build_template_app: # Check if there are any stray printf/ets_printf references in WiFi libs - pushd ../components/esp_wifi/lib - - for dir in esp32 esp32s2beta; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w printf | wc -l) -eq 0; done; - - for dir in esp32 esp32s2beta; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w ets_printf | wc -l) -eq 0; done; + - for dir in esp32 esp32s2; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w printf | wc -l) -eq 0; done; + - for dir in esp32 esp32s2; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w ets_printf | wc -l) -eq 0; done; - popd check_public_headers: diff --git a/tools/ci/config/target-test.yml b/tools/ci/config/target-test.yml index eff4e3d8b9..2901656675 100644 --- a/tools/ci/config/target-test.yml +++ b/tools/ci/config/target-test.yml @@ -462,7 +462,7 @@ UT_035: extends: .unit_test_template parallel: 24 tags: - - ESP32S2BETA_IDF + - ESP32S2_IDF - UT_T1_1 UT_036: @@ -472,11 +472,12 @@ UT_036: - UT_T1_PSRAMV0 - psram -UT_037: - extends: .unit_test_template - tags: - - ESP32S2BETA_IDF - - UT_T1_LEDC +# ToDo: re-enable this job when ESP32-S2 LEDC runner installed +# UT_037: +# extends: .unit_test_template +# tags: +# - ESP32S2_IDF +# - UT_T1_LEDC UT_041: extends: .unit_test_template diff --git a/tools/ci/python_packages/ttfw_idf/CIAssignUnitTest.py b/tools/ci/python_packages/ttfw_idf/CIAssignUnitTest.py index ef84103bdb..7b7fcb1b56 100644 --- a/tools/ci/python_packages/ttfw_idf/CIAssignUnitTest.py +++ b/tools/ci/python_packages/ttfw_idf/CIAssignUnitTest.py @@ -24,7 +24,7 @@ class Group(CIAssignTest.Group): CI_JOB_MATCH_KEYS = ["test environment"] DUT_CLS_NAME = { "esp32": "ESP32DUT", - "esp32s2beta": "ESP32S2DUT", + "esp32s2": "ESP32S2DUT", "esp8266": "ESP8266DUT", } diff --git a/tools/ci/python_packages/ttfw_idf/IDFDUT.py b/tools/ci/python_packages/ttfw_idf/IDFDUT.py index bd47648537..3a337b67c1 100644 --- a/tools/ci/python_packages/ttfw_idf/IDFDUT.py +++ b/tools/ci/python_packages/ttfw_idf/IDFDUT.py @@ -427,7 +427,7 @@ class ESP32DUT(IDFDUT): class ESP32S2DUT(IDFDUT): - TARGET = "esp32s2beta" + TARGET = "esp32s2" TOOLCHAIN_PREFIX = "xtensa-esp32s2-elf-" @classmethod diff --git a/tools/ci/test_build_system_cmake.sh b/tools/ci/test_build_system_cmake.sh index 71e5497228..339aa008e8 100755 --- a/tools/ci/test_build_system_cmake.sh +++ b/tools/ci/test_build_system_cmake.sh @@ -307,8 +307,8 @@ function run_tests() rm sdkconfig rm sdkconfig.defaults - # the next four tests use the esp32s2beta target - export other_target=esp32s2beta + # the next four tests use the esp32s2 target + export other_target=esp32s2 print_status "Can override IDF_TARGET from environment" clean_build_dir diff --git a/tools/cmake/toolchain-esp32s2beta.cmake b/tools/cmake/toolchain-esp32s2beta.cmake deleted file mode 100644 index b776daacf9..0000000000 --- a/tools/cmake/toolchain-esp32s2beta.cmake +++ /dev/null @@ -1,8 +0,0 @@ -set(CMAKE_SYSTEM_NAME Generic) - -set(CMAKE_C_COMPILER xtensa-esp32s2-elf-gcc) -set(CMAKE_CXX_COMPILER xtensa-esp32s2-elf-g++) -set(CMAKE_ASM_COMPILER xtensa-esp32s2-elf-gcc) - -set(CMAKE_C_FLAGS "-mlongcalls" CACHE STRING "C Compiler Base Flags") -set(CMAKE_CXX_FLAGS "-mlongcalls" CACHE STRING "C++ Compiler Base Flags") diff --git a/tools/idf_py_actions/constants.py b/tools/idf_py_actions/constants.py index 0534f6c11a..d86a6fa99f 100644 --- a/tools/idf_py_actions/constants.py +++ b/tools/idf_py_actions/constants.py @@ -35,4 +35,4 @@ GENERATORS = { } } -SUPPORTED_TARGETS = ["esp32", "esp32s2beta", "esp32s2"] +SUPPORTED_TARGETS = ["esp32", "esp32s2"] diff --git a/tools/unit-test-app/components/test_utils/ccomp_timer.c b/tools/unit-test-app/components/test_utils/ccomp_timer.c index 89a701888d..cb60569aad 100644 --- a/tools/unit-test-app/components/test_utils/ccomp_timer.c +++ b/tools/unit-test-app/components/test_utils/ccomp_timer.c @@ -26,8 +26,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif diff --git a/tools/unit-test-app/components/test_utils/ccomp_timer_impl.c b/tools/unit-test-app/components/test_utils/ccomp_timer_impl.c index 5eed28abf4..c260f46b4f 100644 --- a/tools/unit-test-app/components/test_utils/ccomp_timer_impl.c +++ b/tools/unit-test-app/components/test_utils/ccomp_timer_impl.c @@ -31,8 +31,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif #define D_STALL_COUNTER_ID 0 diff --git a/tools/unit-test-app/components/test_utils/include/test_utils.h b/tools/unit-test-app/components/test_utils/include/test_utils.h index d01e45cdc3..971edf0360 100644 --- a/tools/unit-test-app/components/test_utils/include/test_utils.h +++ b/tools/unit-test-app/components/test_utils/include/test_utils.h @@ -46,7 +46,7 @@ //Add more targets here, and corresponding performance requirements for that target in idf_performance.h #ifdef CONFIG_IDF_TARGET_ESP32 #define PERFORMANCE_TARGET_SUFFIX _ESP32 -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define PERFORMANCE_TARGET_SUFFIX _ESP32S2 #else #error target surfix not defined! diff --git a/tools/unit-test-app/components/test_utils/ref_clock.c b/tools/unit-test-app/components/test_utils/ref_clock.c index a0ecd887b6..905c8c23dc 100644 --- a/tools/unit-test-app/components/test_utils/ref_clock.c +++ b/tools/unit-test-app/components/test_utils/ref_clock.c @@ -62,7 +62,7 @@ static int get_pcnt_sig(void) PCNT_SIG_CH0_IN0_IDX + 4 * REF_CLOCK_PCNT_UNIT : PCNT_SIG_CH0_IN5_IDX + 4 * (REF_CLOCK_PCNT_UNIT - 5); } -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 #define REF_CLOCK_RMT_CHANNEL 3 static int get_pcnt_sig(void) diff --git a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c index c7cf8dd7a8..61c8e9100b 100644 --- a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c +++ b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c @@ -13,8 +13,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2BETA -#include "esp32s2beta/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" #endif #include "unity.h" @@ -29,7 +29,7 @@ static const char* TAG = "test_ccomp_timer"; #define CACHE_SIZE (1 << 15) // Only test half due to lack of memory #define TEST_SIZE (CACHE_SIZE / 2) -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // Default cache configuration - no override specified on // test_utils config #define CACHE_WAYS 8 diff --git a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_inst.c b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_inst.c index 31dc99f5d3..4db9f85e90 100644 --- a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_inst.c +++ b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_inst.c @@ -18,7 +18,7 @@ #define CACHE_LINE_SIZE 32 #define CACHE_SIZE (1 << 15) // Only test half due to lack of memory -#elif CONFIG_IDF_TARGET_ESP32S2BETA +#elif CONFIG_IDF_TARGET_ESP32S2 // Default cache configuration - no override specified on // test_utils config #define CACHE_WAYS 8 diff --git a/tools/unit-test-app/configs/aes_no_hw_s2 b/tools/unit-test-app/configs/aes_no_hw_s2 index 3a1d6d71c3..8d6305bf27 100644 --- a/tools/unit-test-app/configs/aes_no_hw_s2 +++ b/tools/unit-test-app/configs/aes_no_hw_s2 @@ -1,4 +1,4 @@ TEST_EXCLUDE_COMPONENTS=libsodium bt app_update test_utils TEST_COMPONENTS=mbedtls CONFIG_MBEDTLS_HARDWARE_AES=n -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/default_2_s2 b/tools/unit-test-app/configs/default_2_s2 index c07c0833cf..dc4067ac84 100644 --- a/tools/unit-test-app/configs/default_2_s2 +++ b/tools/unit-test-app/configs/default_2_s2 @@ -1,2 +1,2 @@ -TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2beta driver heap pthread soc spi_flash vfs -CONFIG_IDF_TARGET="esp32s2beta" \ No newline at end of file +TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2 driver heap pthread soc spi_flash vfs +CONFIG_IDF_TARGET="esp32s2" \ No newline at end of file diff --git a/tools/unit-test-app/configs/default_s2 b/tools/unit-test-app/configs/default_s2 index e55c68be0a..77f6779be4 100644 --- a/tools/unit-test-app/configs/default_s2 +++ b/tools/unit-test-app/configs/default_s2 @@ -1,2 +1,2 @@ -TEST_COMPONENTS=freertos esp32s2beta driver heap pthread soc spi_flash vfs -CONFIG_IDF_TARGET="esp32s2beta" \ No newline at end of file +TEST_COMPONENTS=freertos esp32s2 driver heap pthread soc spi_flash vfs +CONFIG_IDF_TARGET="esp32s2" \ No newline at end of file diff --git a/tools/unit-test-app/configs/freertos_compliance_s2 b/tools/unit-test-app/configs/freertos_compliance_s2 index e94fa8863b..f70df4a079 100644 --- a/tools/unit-test-app/configs/freertos_compliance_s2 +++ b/tools/unit-test-app/configs/freertos_compliance_s2 @@ -1,3 +1,3 @@ -TEST_COMPONENTS=driver esp32s2beta spi_flash +TEST_COMPONENTS=driver esp32s2 spi_flash CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/libsodium_s2 b/tools/unit-test-app/configs/libsodium_s2 index 9485da494f..0c2e946b7e 100644 --- a/tools/unit-test-app/configs/libsodium_s2 +++ b/tools/unit-test-app/configs/libsodium_s2 @@ -1,4 +1,4 @@ TEST_COMPONENTS=libsodium TEST_EXCLUDE_COMPONENTS=bt app_update CONFIG_UNITY_FREERTOS_STACK_SIZE=12288 -CONFIG_IDF_TARGET="esp32s2beta" \ No newline at end of file +CONFIG_IDF_TARGET="esp32s2" \ No newline at end of file diff --git a/tools/unit-test-app/configs/release_2_s2 b/tools/unit-test-app/configs/release_2_s2 index d6e2bbfca2..3bcc868d19 100644 --- a/tools/unit-test-app/configs/release_2_s2 +++ b/tools/unit-test-app/configs/release_2_s2 @@ -1,4 +1,4 @@ -TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2beta driver heap pthread soc spi_flash vfs test_utils +TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2 driver heap pthread soc spi_flash vfs test_utils CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/release_s2 b/tools/unit-test-app/configs/release_s2 index aaa50b0ce4..9c3c22f867 100644 --- a/tools/unit-test-app/configs/release_s2 +++ b/tools/unit-test-app/configs/release_s2 @@ -1,4 +1,4 @@ -TEST_COMPONENTS=freertos esp32s2beta driver heap pthread soc spi_flash vfs +TEST_COMPONENTS=freertos esp32s2 driver heap pthread soc spi_flash vfs CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/single_core_2_s2 b/tools/unit-test-app/configs/single_core_2_s2 index b9bbf882da..ef5cc2cbc2 100644 --- a/tools/unit-test-app/configs/single_core_2_s2 +++ b/tools/unit-test-app/configs/single_core_2_s2 @@ -1,5 +1,5 @@ -TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2beta driver heap pthread soc spi_flash vfs +TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s2 driver heap pthread soc spi_flash vfs CONFIG_MEMMAP_SMP=n CONFIG_FREERTOS_UNICORE=y CONFIG_ESP32_RTCDATA_IN_FAST_MEM=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/single_core_s2 b/tools/unit-test-app/configs/single_core_s2 index 9a7da0e131..5a29a501e4 100644 --- a/tools/unit-test-app/configs/single_core_s2 +++ b/tools/unit-test-app/configs/single_core_s2 @@ -1,5 +1,5 @@ -TEST_COMPONENTS=freertos esp32s2beta driver heap pthread soc spi_flash vfs test_utils +TEST_COMPONENTS=freertos esp32s2 driver heap pthread soc spi_flash vfs test_utils CONFIG_MEMMAP_SMP=n CONFIG_FREERTOS_UNICORE=y CONFIG_ESP32_RTCDATA_IN_FAST_MEM=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/spi_flash_legacy_s2 b/tools/unit-test-app/configs/spi_flash_legacy_s2 index 7da54e6baa..c222db3c92 100644 --- a/tools/unit-test-app/configs/spi_flash_legacy_s2 +++ b/tools/unit-test-app/configs/spi_flash_legacy_s2 @@ -1,4 +1,4 @@ TEST_COMPONENTS=spi_flash CONFIG_ESP32_SPIRAM_SUPPORT=y CONFIG_SPI_FLASH_USE_LEGACY_IMPL=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/configs/test_utils_s2 b/tools/unit-test-app/configs/test_utils_s2 index 1a16c517b4..ce1cda2ff4 100644 --- a/tools/unit-test-app/configs/test_utils_s2 +++ b/tools/unit-test-app/configs/test_utils_s2 @@ -1,5 +1,5 @@ # The test is isolated as it requires particular memory layout TEST_COMPONENTS=test_utils CONFIG_ESP_IPC_TASK_STACK_SIZE=2048 -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" diff --git a/tools/unit-test-app/disabled_configs/app_update_s2 b/tools/unit-test-app/disabled_configs/app_update_s2 index 9a714628db..fd65d7e189 100644 --- a/tools/unit-test-app/disabled_configs/app_update_s2 +++ b/tools/unit-test-app/disabled_configs/app_update_s2 @@ -11,4 +11,4 @@ CONFIG_BOOTLOADER_HOLD_TIME_GPIO=2 CONFIG_BOOTLOADER_OTA_DATA_ERASE=y CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4 CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=32 -CONFIG_IDF_TARGET="esp32s2beta" \ No newline at end of file +CONFIG_IDF_TARGET="esp32s2" \ No newline at end of file diff --git a/tools/unit-test-app/disabled_configs/psram_2_s2 b/tools/unit-test-app/disabled_configs/psram_2_s2 index 97952546cf..0ca3b77bae 100644 --- a/tools/unit-test-app/disabled_configs/psram_2_s2 +++ b/tools/unit-test-app/disabled_configs/psram_2_s2 @@ -1,4 +1,4 @@ -TEST_COMPONENTS=driver esp32s2beta spi_flash +TEST_COMPONENTS=driver esp32s2 spi_flash CONFIG_ESP32S2_SPIRAM_SUPPORT=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" CONFIG_SPIRAM_OCCUPY_NO_HOST=y diff --git a/tools/unit-test-app/disabled_configs/psram_8m_s2 b/tools/unit-test-app/disabled_configs/psram_8m_s2 index d928fe36bc..67b2bb42c9 100644 --- a/tools/unit-test-app/disabled_configs/psram_8m_s2 +++ b/tools/unit-test-app/disabled_configs/psram_8m_s2 @@ -1,6 +1,6 @@ -TEST_COMPONENTS=esp32s2beta +TEST_COMPONENTS=esp32s2 CONFIG_ESP32S2_SPIRAM_SUPPORT=y CONFIG_SPIRAM_BANKSWITCH_ENABLE=y CONFIG_SPIRAM_BANKSWITCH_RESERVE=8 -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" CONFIG_SPIRAM_OCCUPY_NO_HOST=y diff --git a/tools/unit-test-app/disabled_configs/psram_s2 b/tools/unit-test-app/disabled_configs/psram_s2 index 4b6012e74e..c322a709da 100644 --- a/tools/unit-test-app/disabled_configs/psram_s2 +++ b/tools/unit-test-app/disabled_configs/psram_s2 @@ -1,4 +1,4 @@ -TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32s2beta spi_flash +TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32s2 spi_flash CONFIG_ESP32S2_SPIRAM_SUPPORT=y -CONFIG_IDF_TARGET="esp32s2beta" +CONFIG_IDF_TARGET="esp32s2" CONFIG_SPIRAM_OCCUPY_NO_HOST=y diff --git a/tools/unit-test-app/sdkconfig.defaults.esp32s2beta b/tools/unit-test-app/sdkconfig.defaults.esp32s2 similarity index 100% rename from tools/unit-test-app/sdkconfig.defaults.esp32s2beta rename to tools/unit-test-app/sdkconfig.defaults.esp32s2 diff --git a/tools/unit-test-app/tools/ConfigDependency.yml b/tools/unit-test-app/tools/ConfigDependency.yml index e998cd28a9..2a3f70e06f 100644 --- a/tools/unit-test-app/tools/ConfigDependency.yml +++ b/tools/unit-test-app/tools/ConfigDependency.yml @@ -1,4 +1,4 @@ "psram": '{CONFIG_ESP32_SPIRAM_SUPPORT=y} and not {CONFIG_SPIRAM_BANKSWITCH_ENABLE=y}' "8Mpsram": "CONFIG_SPIRAM_BANKSWITCH_ENABLE=y" "ESP32_IDF": "CONFIG_IDF_TARGET_ESP32=y" -"ESP32S2BETA_IDF": "CONFIG_IDF_TARGET_ESP32S2BETA=y" \ No newline at end of file +"ESP32S2_IDF": "CONFIG_IDF_TARGET_ESP32S2=y" \ No newline at end of file diff --git a/tools/unit-test-app/tools/UnitTestParser.py b/tools/unit-test-app/tools/UnitTestParser.py index edb04c4ab8..6d27e90d10 100644 --- a/tools/unit-test-app/tools/UnitTestParser.py +++ b/tools/unit-test-app/tools/UnitTestParser.py @@ -73,7 +73,7 @@ class Parser(object): tags = self.parse_tags(os.path.join(config_output_folder, self.SDKCONFIG_FILE)) print("Tags of config %s: %s" % (config_name, tags)) # Search in tags to set the target - target_tag_dict = {"ESP32_IDF": "esp32", "ESP32S2BETA_IDF": "esp32s2beta"} + target_tag_dict = {"ESP32_IDF": "esp32", "ESP32S2_IDF": "esp32s2"} for tag in target_tag_dict: if tag in tags: target = target_tag_dict[tag] @@ -81,7 +81,7 @@ class Parser(object): else: target = "esp32" - if target == "esp32s2beta": + if target == "esp32s2": # Unit tests temporarily disabled for beta chip return []