mirror of
https://github.com/espressif/esp-idf.git
synced 2026-05-19 23:45:28 +02:00
esp_flash: add initialization interface for SPI devices
This commit is contained in:
Michael (XIAO Xufeng)
@@ -6,7 +6,8 @@
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#include <unity.h>
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#include "esp_flash.h"
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#include "spi_flash_chip_generic.h"
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#include "driver/spi_common.h"
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#include "esp_flash_spi_init.h"
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#include <esp_attr.h>
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#include "esp_log.h"
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@@ -14,7 +15,6 @@
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#include "unity.h"
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#include "driver/spi_common.h"
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#include "memspi_host_driver.h"
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#include "driver/gpio.h"
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#include "soc/io_mux_reg.h"
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@@ -30,38 +30,43 @@ static uint8_t sector_buf[4096];
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#define TEST_SPI_READ_MODE SPI_FLASH_FASTRD
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//#define FORCE_GPIO_MATRIX
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#ifdef TEST_SPI2_CS0
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#define TEST_HOST HSPI_HOST
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#define TEST_CS 0
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#define TEST_CS_PIN HSPI_IOMUX_PIN_NUM_CS
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#define HSPI_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
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#define TEST_INPUT_DELAY 20
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#elif defined TEST_SPI3_CS0
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#define TEST_HOST VSPI_HOST
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#define TEST_CS 0
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#define TEST_CS_PIN VSPI_IOMUX_PIN_NUM_CS
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#define VSPI_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
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#define VSPI_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
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#define VSPI_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
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#define VSPI_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
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#define VSPI_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
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#define TEST_INPUT_DELAY 0
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#elif defined TEST_SPI1_CS1
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#define TEST_HOST SPI_HOST
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#define TEST_CS 1
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// #define TEST_CS_PIN 14
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#define TEST_CS_PIN 16 //the pin which is usually used by the PSRAM
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// #define TEST_CS_PIN 27
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#define TEST_INPUT_DELAY 25
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#define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk
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#if defined TEST_SPI1_CS1
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# define TEST_HOST SPI_HOST
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# define TEST_CS 1
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// #define TEST_CS_PIN 14
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# define TEST_CS_PIN 16 //the pin which is usually used by the PSRAM
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// #define TEST_CS_PIN 27
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# define TEST_INPUT_DELAY 0
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# define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk
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#elif defined TEST_SPI2_CS0
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# define TEST_HOST HSPI_HOST
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# define TEST_CS 0
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# define TEST_CS_PIN HSPI_IOMUX_PIN_NUM_CS
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# define TEST_INPUT_DELAY 20
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#elif defined TEST_SPI3_CS0
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# define TEST_HOST VSPI_HOST
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# define TEST_CS 0
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# define TEST_CS_PIN VSPI_IOMUX_PIN_NUM_CS
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# define TEST_INPUT_DELAY 0
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#else
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#define SKIP_EXTENDED_CHIP_TEST
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# define SKIP_EXTENDED_CHIP_TEST
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#endif
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@@ -71,141 +76,82 @@ static const char TAG[] = "test_esp_flash";
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#ifndef SKIP_EXTENDED_CHIP_TEST
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static esp_flash_t *test_chip = NULL;
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static esp_flash_t chip_init;
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static spi_flash_host_driver_t chip_host_driver;
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static memspi_host_data_t driver_data = {};
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static void IRAM_ATTR cs_initialize(spi_host_device_t host, int cs_io_num, int cs_num, bool use_iomux)
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static void setup_bus(spi_host_device_t host_id)
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{
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int spics_in = spi_periph_signal[host].spics_in;
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int spics_out = spi_periph_signal[host].spics_out[cs_num];
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uint32_t iomux_reg = GPIO_PIN_MUX_REG[TEST_CS_PIN];
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//to avoid the panic caused by flash data line conflicts during cs line initialization, disable the cache temporarily
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//some data from flash to be used should be read before the cache disabling
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g_flash_guard_default_ops.start();
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if (use_iomux) {
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GPIO.func_in_sel_cfg[spics_in].sig_in_sel = 0;
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PIN_INPUT_ENABLE(iomux_reg);
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GPIO.func_out_sel_cfg[spics_out].oen_sel = 0;
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GPIO.func_out_sel_cfg[spics_out].oen_inv_sel = false;
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PIN_FUNC_SELECT(iomux_reg, FUNC_SPI);
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if (host_id == SPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI1 CS1...\n");
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//no need to initialize the bus, however the CLK may need one more output if it's on the usual place of PSRAM
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#ifdef EXTRA_SPI1_CLK_IO
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gpio_matrix_out(EXTRA_SPI1_CLK_IO, SPICLK_OUT_IDX, 0, 0);
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#endif
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//currently the SPI bus for main flash chip is initialized through GPIO matrix
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} else if (host_id == HSPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI2 (HSPI) CS0...\n");
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spi_bus_config_t hspi_bus_cfg = {
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.mosi_io_num = HSPI_PIN_NUM_MOSI,
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.miso_io_num = HSPI_PIN_NUM_MISO,
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.sclk_io_num = HSPI_PIN_NUM_CLK,
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.quadhd_io_num = HSPI_PIN_NUM_HD,
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.quadwp_io_num = HSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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hspi_bus_cfg.quadhd_io_num = 23;
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#endif
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esp_err_t ret = spi_bus_initialize(host_id, &hspi_bus_cfg, 0);
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TEST_ESP_OK(ret);
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} else if (host_id == VSPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI3 (VSPI) CS0...\n");
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spi_bus_config_t vspi_bus_cfg = {
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.mosi_io_num = VSPI_PIN_NUM_MOSI,
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.miso_io_num = VSPI_PIN_NUM_MISO,
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.sclk_io_num = VSPI_PIN_NUM_CLK,
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.quadhd_io_num = VSPI_PIN_NUM_HD,
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.quadwp_io_num = VSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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vspi_bus_cfg.quadhd_io_num = 23;
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#endif
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esp_err_t ret = spi_bus_initialize(host_id, &vspi_bus_cfg, 0);
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TEST_ESP_OK(ret);
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} else {
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PIN_INPUT_ENABLE(iomux_reg);
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if (cs_io_num < 32) {
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GPIO.enable_w1ts = (0x1 << cs_io_num);
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} else {
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GPIO.enable1_w1ts.data = (0x1 << (cs_io_num - 32));
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}
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GPIO.pin[cs_io_num].pad_driver = 0;
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gpio_matrix_out(cs_io_num, spics_out, false, false);
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if (cs_num == 0) {
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gpio_matrix_in(cs_io_num, spics_in, false);
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}
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PIN_FUNC_SELECT(iomux_reg, PIN_FUNC_GPIO);
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ESP_LOGE(TAG, "invalid bus");
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}
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}
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static void release_bus(int host_id)
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{
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if (host_id == HSPI_HOST || host_id == VSPI_HOST) {
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spi_bus_free(host_id);
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}
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g_flash_guard_default_ops.end();
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}
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static void setup_new_chip(esp_flash_read_mode_t io_mode, esp_flash_speed_t speed)
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{
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chip_init = (esp_flash_t) {
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.read_mode = io_mode,
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};
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//the bus should be initialized before the flash is attached to the bus
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setup_bus(TEST_HOST);
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#ifdef TEST_SPI2_CS0
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bool spi_chan_claimed = spicommon_periph_claim(HSPI_HOST, "spi flash");
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TEST_ASSERT(spi_chan_claimed);
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spi_bus_config_t hspi_bus_cfg = {
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.mosi_io_num = HSPI_PIN_NUM_MOSI,
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.miso_io_num = HSPI_PIN_NUM_MISO,
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.sclk_io_num = HSPI_PIN_NUM_CLK,
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.quadhd_io_num = HSPI_PIN_NUM_HD,
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.quadwp_io_num = HSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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hspi_bus_cfg.quadhd_io_num = 23;
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#endif
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uint32_t flags;
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esp_err_t ret = spicommon_bus_initialize_io(HSPI_HOST, &hspi_bus_cfg, 0, SPICOMMON_BUSFLAG_MASTER | (&hspi_bus_cfg)->flags, &flags);
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TEST_ESP_OK(ret);
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bool use_iomux = (flags & SPICOMMON_BUSFLAG_NATIVE_PINS) ? 1 : 0;
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printf("setup flash on SPI2 (HSPI) CS0...\n");
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printf("use iomux:%d\n", use_iomux);
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memspi_host_config_t cfg = {
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.host_id = 2,
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esp_flash_spi_device_config_t dev_cfg = {
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.host_id = TEST_HOST,
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.io_mode = io_mode,
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.speed = speed,
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.iomux = use_iomux,
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.cs_num = TEST_CS,
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.cs_id = TEST_CS,
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.cs_io_num = TEST_CS_PIN,
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.input_delay_ns = TEST_INPUT_DELAY,
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};
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#elif defined TEST_SPI3_CS0
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bool spi_chan_claimed = spicommon_periph_claim(VSPI_HOST, "spi flash");
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TEST_ASSERT(spi_chan_claimed);
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spi_bus_config_t vspi_bus_cfg = {
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.mosi_io_num = VSPI_PIN_NUM_MOSI,
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.miso_io_num = VSPI_PIN_NUM_MISO,
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.sclk_io_num = VSPI_PIN_NUM_CLK,
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.quadhd_io_num = VSPI_PIN_NUM_HD,
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.quadwp_io_num = VSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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vspi_bus_cfg.quadhd_io_num = 23;
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#endif
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uint32_t flags;
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esp_err_t ret = spicommon_bus_initialize_io(VSPI_HOST, &vspi_bus_cfg, 0, SPICOMMON_BUSFLAG_MASTER | (&vspi_bus_cfg)->flags, &flags);
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TEST_ESP_OK(ret);
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bool use_iomux = (flags & SPICOMMON_BUSFLAG_NATIVE_PINS) ? 1 : 0;
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//TEST_ASSERT(use_iomux);
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printf("setup flash on SPI3 (VSPI) CS0...\n");
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printf("use iomux:%d\n", use_iomux);
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memspi_host_config_t cfg = {
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.host_id = 3,
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.speed = speed,
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.iomux = use_iomux,
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.cs_num = TEST_CS,
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.input_delay_ns = TEST_INPUT_DELAY,
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};
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#elif defined TEST_SPI1_CS1
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printf("setup flash on SPI1 CS1...\n");
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memspi_host_config_t cfg = {
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.host_id = 1,
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.speed = speed,
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.iomux = true,
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.cs_num = TEST_CS,
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.input_delay_ns = TEST_INPUT_DELAY,
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};
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bool use_iomux = (TEST_CS_PIN == spi_periph_signal[TEST_HOST].spics0_iomux_pin) && (driver_data.cs_num == 0);
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# ifdef EXTRA_SPI1_CLK_IO
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gpio_matrix_out(EXTRA_SPI1_CLK_IO, SPICLK_OUT_IDX, 0, 0);
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# endif
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#endif
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esp_err_t err = memspi_host_init_pointers(&chip_host_driver, &driver_data, &cfg);
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cs_initialize(TEST_HOST, TEST_CS_PIN, driver_data.cs_num, use_iomux);
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esp_err_t err = spi_bus_add_flash_device(&test_chip, &dev_cfg);
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TEST_ESP_OK(err);
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chip_init.host = &chip_host_driver;
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esp_flash_init_os_functions(&chip_init, TEST_HOST);
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err = esp_flash_init(&chip_init);
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err = esp_flash_init(test_chip);
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TEST_ESP_OK(err);
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test_chip = &chip_init;
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}
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void teardown_test_chip()
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{
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if (TEST_HOST == HSPI_HOST || TEST_HOST == VSPI_HOST) {
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spicommon_periph_free(TEST_HOST);
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}
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spi_bus_remove_flash_device(test_chip);
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test_chip = NULL;
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release_bus(TEST_HOST);
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}
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#endif
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