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Merge branch 'feat/spi_check_length_buffer' into 'master'
spi: add checks for slave buffer valid and master length See merge request idf/esp-idf!3744
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@@ -7,7 +7,7 @@ Overview
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The ESP32 has four SPI peripheral devices, called SPI0, SPI1, HSPI and VSPI. SPI0 is entirely dedicated to
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the flash cache the ESP32 uses to map the SPI flash device it is connected to into memory. SPI1 is
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connected to the same hardware lines as SPI0 and is used to write to the flash chip. HSPI and VSPI
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are free to use, and with the spi_slave driver, these can be used as a SPI slave, driven from a
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are free to use, and with the spi_slave driver, these can be used as a SPI slave, driven from a
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connected SPI master.
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The spi_slave driver
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@@ -21,9 +21,9 @@ Terminology
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The spi_slave driver uses the following terms:
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* Host: The SPI peripheral inside the ESP32 initiating the SPI transmissions. One of HSPI or VSPI.
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* Host: The SPI peripheral inside the ESP32 initiating the SPI transmissions. One of HSPI or VSPI.
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* Bus: The SPI bus, common to all SPI devices connected to a master. In general the bus consists of the
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miso, mosi, sclk and optionally quadwp and quadhd signals. The SPI slaves are connected to these
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miso, mosi, sclk and optionally quadwp and quadhd signals. The SPI slaves are connected to these
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signals in parallel. Each SPI slave is also connected to one CS signal.
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- miso - Also known as q, this is the output of the serial stream from the ESP32 to the SPI master
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@@ -50,15 +50,15 @@ the master makes CS high again.
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Using the spi_slave driver
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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- Initialize a SPI peripheral as a slave by calling ``spi_slave_initialize``. Make sure to set the
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- Initialize a SPI peripheral as a slave by calling ``spi_slave_initialize``. Make sure to set the
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correct IO pins in the ``bus_config`` struct. Take care to set signals that are not needed to -1.
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A DMA channel (either 1 or 2) must be given if transactions will be larger than 32 bytes, if not
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the dma_chan parameter may be 0.
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- To set up a transaction, fill one or more spi_transaction_t structure with any transaction
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- To set up a transaction, fill one or more spi_transaction_t structure with any transaction
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parameters you need. Either queue all transactions by calling ``spi_slave_queue_trans``, later
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quering the result using ``spi_slave_get_trans_result``, or handle all requests synchroneously
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by feeding them into ``spi_slave_transmit``. The latter two functions will block until the
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by feeding them into ``spi_slave_transmit``. The latter two functions will block until the
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master has initiated and finished a transaction, causing the queued data to be sent and received.
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- Optional: to unload the SPI slave driver, call ``spi_slave_free``.
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@@ -69,7 +69,7 @@ Transaction data and master/slave length mismatches
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Normally, data to be transferred to or from a device will be read from or written to a chunk of memory
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indicated by the ``rx_buffer`` and ``tx_buffer`` members of the transaction structure. The SPI driver
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may decide to use DMA for transfers, so these buffers should be allocated in DMA-capable memory using
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may decide to use DMA for transfers, so these buffers should be allocated in DMA-capable memory using
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``pvPortMallocCaps(size, MALLOC_CAP_DMA)``.
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The amount of data written to the buffers is limited by the ``length`` member of the transaction structure:
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@@ -78,13 +78,23 @@ length of the SPI transaction; this is determined by the master as it drives the
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transferred can be read from the ``trans_len`` member of the ``spi_slave_transaction_t`` structure after transaction.
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In case the length of the transmission is larger than the buffer length, only the start of the transmission
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will be sent and received, and the ``trans_len`` is set to ``length`` instead of the actual length. It's recommended to
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set ``length`` longer than the maximum length expected if the ``trans_len`` is required. In case the transmission
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set ``length`` longer than the maximum length expected if the ``trans_len`` is required. In case the transmission
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length is shorter than the buffer length, only data up to the length of the buffer will be exchanged.
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Warning: Due to a design peculiarity in the ESP32, if the amount of bytes sent by the master or the length
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of the transmission queues in the slave driver, in bytes, is not both larger than eight and dividable by
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Warning: Due to a design peculiarity in the ESP32, if the amount of bytes sent by the master or the length
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of the transmission queues in the slave driver, in bytes, is not both larger than eight and dividable by
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four, the SPI hardware can fail to write the last one to seven bytes to the receive buffer.
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Restrictions and Known issues
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-------------------------------
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1. If the DMA is enabled, the rx buffer should be WORD aligned, i.e. Start
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from the boundary of 32-bit and have length of multiples of 4 bytes. Or the
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DMA may write incorrectly or out of the boundary.The driver will check for
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this.
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Also, master should write lengths which are a multiple of 4 bytes. Data
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longer than that will be discarded.
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Application Example
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-------------------
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