From d9fdab14d0e60fe6fd6e85e9bdeb4a37f5ec6519 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 20 Mar 2025 17:59:35 +0800 Subject: [PATCH] fix(esp_hw_support): iomux slp_sel is not avaliable to isolate mspi pin leakage on esp32p4 --- components/esp_hw_support/sleep_gpio.c | 6 +++--- components/soc/esp32p4/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32p4/include/soc/soc_caps.h | 1 + 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c index 9ecd5f27f0..c1d2fa918e 100644 --- a/components/esp_hw_support/sleep_gpio.c +++ b/components/esp_hw_support/sleep_gpio.c @@ -63,7 +63,7 @@ void esp_sleep_config_gpio_isolate(void) } } -#if CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU +#if CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU && !SOC_MSPI_HAS_INDEPENT_IOMUX gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_CLK), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_Q), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D), GPIO_PULLUP_ONLY); @@ -103,14 +103,14 @@ void esp_sleep_enable_gpio_switch(bool enable) } #endif /* If the PSRAM is disable in ESP32xx chips equipped with PSRAM, there will be a large current leakage. */ -#if CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM +#if CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM & !SOC_MSPI_HAS_INDEPENT_IOMUX if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS1)) { gpio_sleep_sel_dis(gpio_num); continue; } #endif // CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM -#if CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND +#if CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND & !SOC_MSPI_HAS_INDEPENT_IOMUX if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS0)) { gpio_sleep_sel_dis(gpio_num); continue; diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index a0b1ad8c89..fd744f363b 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -1515,6 +1515,10 @@ config SOC_SPI_SUPPORT_CLK_SPLL bool default y +config SOC_MSPI_HAS_INDEPENT_IOMUX + bool + default y + config SOC_MEMSPI_IS_INDEPENDENT bool default y diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index 121038c30f..0b6609042b 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -564,6 +564,7 @@ // host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2, #define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id) ({(void)host_id; 1;}) +#define SOC_MSPI_HAS_INDEPENT_IOMUX 1 #define SOC_MEMSPI_IS_INDEPENDENT 1 #define SOC_SPI_MAX_PRE_DIVIDER 16