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Merge branch 'fix/fix_sdmmc_dma_desc_placement_issue_on_s3' into 'master'
sdmmc: fixed dma desc on psram issue on s3 Closes IDF-13550 See merge request espressif/esp-idf!40307
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@@ -37,6 +37,12 @@ extern "C" {
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#define SD_HOST_SDMMC_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#endif
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#if SOC_SDMMC_PSRAM_DMA_CAPABLE
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#define SD_HOST_SDMMC_DMA_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#else
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#define SD_HOST_SDMMC_DMA_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#endif
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#if !SOC_RCC_IS_INDEPENDENT
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// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
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#define SD_HOST_SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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@@ -94,7 +94,7 @@ esp_err_t sd_host_create_sdmmc_controller(const sd_host_sdmmc_cfg_t *config, sd_
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ESP_LOGD(TAG, "size: %d, alignment: %d", sizeof(sdmmc_desc_t), alignment);
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ctlr->dma_desc_num = config->dma_desc_num ? config->dma_desc_num : SD_HOST_SDMMC_DMA_DESC_CNT;
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ctlr->dma_desc = heap_caps_aligned_calloc(alignment, 1, sizeof(sdmmc_desc_t) * ctlr->dma_desc_num, SD_HOST_SDMMC_MEM_ALLOC_CAPS);
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ctlr->dma_desc = heap_caps_aligned_calloc(alignment, 1, sizeof(sdmmc_desc_t) * ctlr->dma_desc_num, SD_HOST_SDMMC_DMA_ALLOC_CAPS);
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ESP_LOGD(TAG, "ctlr->dma_desc addr: %p", ctlr->dma_desc);
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ESP_RETURN_ON_FALSE(ctlr->dma_desc, ESP_ERR_NO_MEM, TAG, "no mem for dma descriptors");
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