From dc6d6f225eb1ff5254b40598e5c369336459039a Mon Sep 17 00:00:00 2001 From: "Michael (XIAO Xufeng)" Date: Fri, 4 Jun 2021 15:19:45 +0800 Subject: [PATCH] spi_flash: reverted unwilling cs_setup argument Partially reverted 08f1bbe0c75382f1702e40c941e93314285105d4. The host should have this flexibility, which is consistent to the cs_hold argument. However, the user should know as less as possible about the host. So the wrapper layer (esp_flash_spi_init.c) should cover this, helping to set cs_setup to 1, to meet the common requirements. --- components/driver/test/test_spi_bus_lock.c | 1 - components/spi_flash/include/esp_flash_spi_init.h | 1 - components/spi_flash/test/test_esp_flash.c | 7 ------- .../ext_flash_fatfs/main/ext_flash_fatfs_example_main.c | 1 - 4 files changed, 10 deletions(-) diff --git a/components/driver/test/test_spi_bus_lock.c b/components/driver/test/test_spi_bus_lock.c index 84b10e038e..e4ac40adb0 100644 --- a/components/driver/test/test_spi_bus_lock.c +++ b/components/driver/test/test_spi_bus_lock.c @@ -242,7 +242,6 @@ static void test_bus_lock(bool test_flash) .io_mode = SPI_FLASH_DIO, .speed = ESP_FLASH_5MHZ, .input_delay_ns = 0, - .cs_setup = 1, }; //Clamp the WP and HD pins to VDD to make it work in DIO mode diff --git a/components/spi_flash/include/esp_flash_spi_init.h b/components/spi_flash/include/esp_flash_spi_init.h index e586a8778c..85334d3ea5 100644 --- a/components/spi_flash/include/esp_flash_spi_init.h +++ b/components/spi_flash/include/esp_flash_spi_init.h @@ -34,7 +34,6 @@ typedef struct { * automatically assigned by the SPI bus lock. */ int cs_id; - uint32_t cs_setup; ///< (cycles-1) of prepare phase by spi clock } esp_flash_spi_device_config_t; /** diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c index 457c4d6875..ce1151dd20 100644 --- a/components/spi_flash/test/test_esp_flash.c +++ b/components/spi_flash/test/test_esp_flash.c @@ -186,7 +186,6 @@ static const char TAG[] = "test_esp_flash"; /* the pin which is usually used by the PSRAM */ \ .cs_io_num = SPI1_CS_IO, \ .input_delay_ns = 0, \ - .cs_setup = 1,\ } #if CONFIG_IDF_TARGET_ESP32 @@ -209,7 +208,6 @@ flashtest_config_t config_list[] = { .cs_id = 0, .cs_io_num = VSPI_PIN_NUM_CS, .input_delay_ns = 0, - .cs_setup = 1,\ }, }; #elif CONFIG_IDF_TARGET_ESP32S2 @@ -222,7 +220,6 @@ flashtest_config_t config_list[] = { .cs_id = 0, .cs_io_num = FSPI_PIN_NUM_CS, .input_delay_ns = 0, - .cs_setup = 1,\ }, { .io_mode = TEST_SPI_READ_MODE, @@ -232,7 +229,6 @@ flashtest_config_t config_list[] = { // uses GPIO matrix on esp32s2 regardless of FORCE_GPIO_MATRIX .cs_io_num = HSPI_PIN_NUM_CS, .input_delay_ns = 0, - .cs_setup = 1,\ }, }; #elif CONFIG_IDF_TARGET_ESP32S3 @@ -246,7 +242,6 @@ flashtest_config_t config_list[] = { .cs_id = 0, .cs_io_num = FSPI_PIN_NUM_CS, .input_delay_ns = 0, - .cs_setup = 1,\ }, }; #elif CONFIG_IDF_TARGET_ESP32C3 @@ -263,7 +258,6 @@ flashtest_config_t config_list[] = { .cs_id = 0, .cs_io_num = FSPI_PIN_NUM_CS, .input_delay_ns = 0, - .cs_setup = 1,\ }, }; #endif @@ -400,7 +394,6 @@ static void setup_new_chip(const flashtest_config_t* test_cfg, esp_flash_t** out .cs_id = test_cfg->cs_id, .cs_io_num = test_cfg->cs_io_num, .input_delay_ns = test_cfg->input_delay_ns, - .cs_setup = test_cfg->cs_setup, }; esp_flash_t* init_chip; esp_err_t err = spi_bus_add_flash_device(&init_chip, &dev_cfg); diff --git a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c index 13913cb0b4..f4ceff3f4a 100644 --- a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c +++ b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c @@ -104,7 +104,6 @@ static esp_flash_t* example_init_ext_flash(void) .cs_io_num = VSPI_IOMUX_PIN_NUM_CS, .io_mode = SPI_FLASH_DIO, .speed = ESP_FLASH_40MHZ, - .cs_setup = 1, }; ESP_LOGI(TAG, "Initializing external SPI Flash");