Merge branch 'fix/fix_writeback_psram_after_vo2_powerdown_v5.3' into 'release/v5.3'

fix(esp_hw_support): fix writeback cache to psram after vo2 powerdown (v5.3)

See merge request espressif/esp-idf!34580
This commit is contained in:
Michael (XIAO Xufeng)
2024-11-07 21:24:24 +08:00
4 changed files with 20 additions and 14 deletions

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@ -71,7 +71,7 @@ menu "Hardware Settings"
config ESP_SLEEP_POWER_DOWN_FLASH config ESP_SLEEP_POWER_DOWN_FLASH
bool "Power down flash in light sleep when there is no SPIRAM or SPIRAM has independent power supply" bool "Power down flash in light sleep when there is no SPIRAM or SPIRAM has independent power supply"
depends on !SPIRAM || ESP_LDO_RESERVE_PSRAM depends on !SPIRAM || ESP_LDO_RESERVE_PSRAM
depends on !(IDF_TARGET_ESP32P4 && (ESP32P4_REV_MIN_FULL >= 100)) depends on !(IDF_TARGET_ESP32P4 && (ESP32P4_REV_MIN_FULL < 100))
default n default n
help help
If enabled, chip will try to power down flash as part of esp_light_sleep_start(), which costs If enabled, chip will try to power down flash as part of esp_light_sleep_start(), which costs

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@ -34,6 +34,9 @@
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "esp_rom_uart.h" #include "esp_rom_uart.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"
#if CONFIG_SPIRAM
#include "hal/ldo_ll.h"
#endif
#define HP(state) (PMU_MODE_HP_ ## state) #define HP(state) (PMU_MODE_HP_ ## state)
#define LP(state) (PMU_MODE_LP_ ## state) #define LP(state) (PMU_MODE_LP_ ## state)
@ -350,6 +353,14 @@ TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt,
rtc_clk_mpll_disable(); rtc_clk_mpll_disable();
} }
#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
// Disable PSRAM chip power supply
if (dslp) {
ldo_ll_enable(LDO_ID2UNIT(CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN), false);
}
#endif
/* Start entry into sleep mode */ /* Start entry into sleep mode */
pmu_ll_hp_set_sleep_enable(PMU_instance()->hal->dev); pmu_ll_hp_set_sleep_enable(PMU_instance()->hal->dev);
@ -358,6 +369,13 @@ TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt,
; ;
} }
#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
// Enable PSRAM chip power supply after deepsleep request rejected
if (dslp) {
ldo_ll_enable(LDO_ID2UNIT(CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN), true);
}
#endif
return pmu_sleep_finish(dslp); return pmu_sleep_finish(dslp);
} }

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@ -325,7 +325,7 @@ typedef struct {
#define PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(pd_flags) { \ #define PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(pd_flags) { \
.syscntl = { \ .syscntl = { \
.dig_pad_slp_sel = 0, \ .dig_pad_slp_sel = 0, \
.lp_pad_hold_all = 0, \ .lp_pad_hold_all = (pd_flags & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \
} \ } \
} }

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@ -62,10 +62,6 @@
#include "hal/touch_sensor_hal.h" #include "hal/touch_sensor_hal.h"
#endif #endif
#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
#include "hal/ldo_ll.h"
#endif
#include "sdkconfig.h" #include "sdkconfig.h"
#include "esp_rom_uart.h" #include "esp_rom_uart.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
@ -1114,10 +1110,6 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
portENTER_CRITICAL(&spinlock_rtc_deep_sleep); portENTER_CRITICAL(&spinlock_rtc_deep_sleep);
esp_ipc_isr_stall_other_cpu(); esp_ipc_isr_stall_other_cpu();
esp_ipc_isr_stall_pause(); esp_ipc_isr_stall_pause();
#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
// Disable PSRAM chip power supply
ldo_ll_enable(LDO_ID2UNIT(CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN), false);
#endif
// record current RTC time // record current RTC time
s_config.rtc_ticks_at_sleep_start = rtc_time_get(); s_config.rtc_ticks_at_sleep_start = rtc_time_get();
@ -1183,10 +1175,6 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
; ;
} }
} }
#if CONFIG_SPIRAM && CONFIG_ESP_LDO_RESERVE_PSRAM
// Enable PSRAM chip power supply
ldo_ll_enable(LDO_ID2UNIT(CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN), true);
#endif
// Never returns here, except that the sleep is rejected. // Never returns here, except that the sleep is rejected.
esp_ipc_isr_stall_resume(); esp_ipc_isr_stall_resume();
esp_ipc_isr_release_other_cpu(); esp_ipc_isr_release_other_cpu();