fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration

This commit is contained in:
wuzhenghui
2025-04-10 20:29:07 +08:00
parent b4c907e36d
commit deffa33d5f
6 changed files with 10 additions and 26 deletions

View File

@@ -92,11 +92,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
} }
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
if (slow_clk == SLOW_CLK_32K_XTAL) { rtc_clk_32k_enable(false);
rtc_clk_32k_enable(false); rtc_clk_32k_disable_external();
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
rtc_clk_32k_disable_external();
}
} }
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup. /* TODO: 32k XTAL oscillator has some frequency drift at startup.

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@@ -175,11 +175,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
} }
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
if (slow_clk == SLOW_CLK_32K_XTAL) { rtc_clk_32k_enable(false);
rtc_clk_32k_enable(false); rtc_clk_32k_disable_external();
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
rtc_clk_32k_disable_external();
}
} }
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup. /* TODO: 32k XTAL oscillator has some frequency drift at startup.

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@@ -165,10 +165,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
// Disable unused clock sources after clock source switching is complete. // Disable unused clock sources after clock source switching is complete.
// Regardless of the clock source selection, the internal 136K clock source will always keep on. // Regardless of the clock source selection, the internal 136K clock source will always keep on.
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
rtc_clk_32k_enable(false); rtc_clk_32k_enable(false);
}
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
rtc_clk_32k_disable_external(); rtc_clk_32k_disable_external();
} }
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {

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@@ -166,10 +166,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
// Disable unused clock sources after clock source switching is complete. // Disable unused clock sources after clock source switching is complete.
// Regardless of the clock source selection, the internal 136K clock source will always keep on. // Regardless of the clock source selection, the internal 136K clock source will always keep on.
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
rtc_clk_32k_enable(false); rtc_clk_32k_enable(false);
}
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
rtc_clk_32k_disable_external(); rtc_clk_32k_disable_external();
} }
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {

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@@ -181,11 +181,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
} }
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
if (slow_clk == SLOW_CLK_32K_XTAL) { rtc_clk_32k_enable(false);
rtc_clk_32k_enable(false); rtc_clk_32k_disable_external();
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
rtc_clk_32k_disable_external();
}
} }
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup. /* TODO: 32k XTAL oscillator has some frequency drift at startup.

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@@ -177,11 +177,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
} }
rtc_clk_slow_src_set(rtc_slow_clk_src); rtc_clk_slow_src_set(rtc_slow_clk_src);
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
if (slow_clk == SLOW_CLK_32K_XTAL) { rtc_clk_32k_enable(false);
rtc_clk_32k_enable(false); rtc_clk_32k_disable_external();
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
rtc_clk_32k_disable_external();
}
} }
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup. /* TODO: 32k XTAL oscillator has some frequency drift at startup.