fix(sdmmc): fixed dma desc on psram issue on s3

This commit is contained in:
armando
2025-07-02 17:15:35 +08:00
parent 6de2b7a58d
commit df7b39da34
2 changed files with 11 additions and 5 deletions

View File

@@ -32,21 +32,27 @@ extern "C" {
#if SOC_SDMMC_HOST_SUPPORTED #if SOC_SDMMC_HOST_SUPPORTED
#if CONFIG_SD_HOST_SDMMC_ISR_CACHE_SAFE #if CONFIG_SD_HOST_SDMMC_ISR_CACHE_SAFE
#define SD_HOST_SDMMC_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) #define SD_HOST_SDMMC_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else #else
#define SD_HOST_SDMMC_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT #define SD_HOST_SDMMC_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
#if SOC_SDMMC_PSRAM_DMA_CAPABLE
#define SD_HOST_SDMMC_DMA_ALLOC_CAPS MALLOC_CAP_DEFAULT
#else
#define SD_HOST_SDMMC_DMA_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#endif #endif
#if !SOC_RCC_IS_INDEPENDENT #if !SOC_RCC_IS_INDEPENDENT
// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section // Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
#define SD_HOST_SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC() #define SD_HOST_SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else #else
#define SD_HOST_SDMMC_RCC_ATOMIC() #define SD_HOST_SDMMC_RCC_ATOMIC()
#endif #endif
#if SOC_PERIPH_CLK_CTRL_SHARED #if SOC_PERIPH_CLK_CTRL_SHARED
// Clock source and related clock settings are mixing with other peripherals, so we need to use a critical section // Clock source and related clock settings are mixing with other peripherals, so we need to use a critical section
#define SD_HOST_SDMMC_CLK_SRC_ATOMIC() PERIPH_RCC_ATOMIC() #define SD_HOST_SDMMC_CLK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
#else #else
#define SD_HOST_SDMMC_CLK_SRC_ATOMIC() #define SD_HOST_SDMMC_CLK_SRC_ATOMIC()
#endif #endif

View File

@@ -94,7 +94,7 @@ esp_err_t sd_host_create_sdmmc_controller(const sd_host_sdmmc_cfg_t *config, sd_
ESP_LOGD(TAG, "size: %d, alignment: %d", sizeof(sdmmc_desc_t), alignment); ESP_LOGD(TAG, "size: %d, alignment: %d", sizeof(sdmmc_desc_t), alignment);
ctlr->dma_desc_num = config->dma_desc_num ? config->dma_desc_num : SD_HOST_SDMMC_DMA_DESC_CNT; ctlr->dma_desc_num = config->dma_desc_num ? config->dma_desc_num : SD_HOST_SDMMC_DMA_DESC_CNT;
ctlr->dma_desc = heap_caps_aligned_calloc(alignment, 1, sizeof(sdmmc_desc_t) * ctlr->dma_desc_num, SD_HOST_SDMMC_MEM_ALLOC_CAPS); ctlr->dma_desc = heap_caps_aligned_calloc(alignment, 1, sizeof(sdmmc_desc_t) * ctlr->dma_desc_num, SD_HOST_SDMMC_DMA_ALLOC_CAPS);
ESP_LOGD(TAG, "ctlr->dma_desc addr: %p", ctlr->dma_desc); ESP_LOGD(TAG, "ctlr->dma_desc addr: %p", ctlr->dma_desc);
ESP_RETURN_ON_FALSE(ctlr->dma_desc, ESP_ERR_NO_MEM, TAG, "no mem for dma descriptors"); ESP_RETURN_ON_FALSE(ctlr->dma_desc, ESP_ERR_NO_MEM, TAG, "no mem for dma descriptors");