From e26018d8ee17b33ab61b7a0a0d271a357ac98d21 Mon Sep 17 00:00:00 2001 From: Sachin Parekh Date: Tue, 21 Mar 2023 10:04:17 +0530 Subject: [PATCH] h2/clk_gate: Clear reset signal of ECDSA peripheral before enabling SHA, RSA or ECC --- components/hal/esp32h2/include/hal/clk_gate_ll.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h index 4a858474bf..08b7894c55 100644 --- a/components/hal/esp32h2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h @@ -141,6 +141,10 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en case PERIPH_TEMPSENSOR_MODULE: return PCR_TSENS_RST_EN; case PERIPH_ECC_MODULE: + if (enable == true) { + // Clear reset on ECDSA, otherwise ECC is held in reset + CLEAR_PERI_REG_MASK(PCR_ECDSA_CONF_REG, PCR_ECDSA_RST_EN); + } return PCR_ECC_RST_EN; case PERIPH_AES_MODULE: if (enable == true) { @@ -150,15 +154,17 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en return PCR_AES_RST_EN; case PERIPH_SHA_MODULE: if (enable == true) { - // Clear reset on digital signature and HMAC, otherwise SHA is held in reset + // Clear reset on digital signature, HMAC, and ECDSA, otherwise SHA is held in reset CLEAR_PERI_REG_MASK(PCR_DS_CONF_REG, PCR_DS_RST_EN); CLEAR_PERI_REG_MASK(PCR_HMAC_CONF_REG, PCR_HMAC_RST_EN); + CLEAR_PERI_REG_MASK(PCR_ECDSA_CONF_REG, PCR_ECDSA_RST_EN); } return PCR_SHA_RST_EN; case PERIPH_RSA_MODULE: if (enable == true) { - // Clear reset on digital signature, otherwise RSA is held in reset + // Clear reset on digital signature, and ECDSA, otherwise RSA is held in reset CLEAR_PERI_REG_MASK(PCR_DS_CONF_REG, PCR_DS_RST_EN); + CLEAR_PERI_REG_MASK(PCR_ECDSA_CONF_REG, PCR_ECDSA_RST_EN); } return PCR_RSA_RST_EN; case PERIPH_HMAC_MODULE: