From c6d13ec757e339797d460a967553d337396948b4 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 8 Jul 2025 15:18:54 +0800 Subject: [PATCH 1/2] fix(esp_hw_support): fix MODEM_ADC_COMMON_FE destroyed by modem powerdown lightsleep --- components/esp_adc/adc_oneshot.c | 22 ++++++++++++++++++++- components/esp_hw_support/modem_clock.c | 1 - components/hal/esp32c6/include/hal/adc_ll.h | 2 ++ components/hal/esp32h2/include/hal/adc_ll.h | 2 ++ 4 files changed, 25 insertions(+), 2 deletions(-) diff --git a/components/esp_adc/adc_oneshot.c b/components/esp_adc/adc_oneshot.c index dba3fd6b1c..1dfd367c44 100644 --- a/components/esp_adc/adc_oneshot.c +++ b/components/esp_adc/adc_oneshot.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -16,6 +16,7 @@ #include "driver/rtc_io.h" #include "esp_adc/adc_oneshot.h" #include "esp_clk_tree.h" +#include "esp_sleep.h" #include "esp_private/adc_private.h" #include "esp_private/adc_share_hw_ctrl.h" #include "esp_private/sar_periph_ctrl.h" @@ -125,6 +126,16 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a ESP_LOGD(TAG, "new adc unit%"PRId32" is created", unit->unit_id); *ret_unit = unit; + +#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP + //TODO: IDF-8475: Depends to SLEEP_RETENTION_MODULE_CLOCK_MODEM retention module after ADC retention supported. +#if SOC_PM_SUPPORT_MODEM_PD + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_MODEM, ESP_PD_OPTION_ON)); + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_TOP, ESP_PD_OPTION_ON)); +#endif +#elif ADC_LL_ADC_FE_ON_MODEM_DOMAIN + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_MODEM, ESP_PD_OPTION_ON)); +#endif return ESP_OK; err: @@ -235,6 +246,15 @@ esp_err_t adc_oneshot_del_unit(adc_oneshot_unit_handle_t handle) _lock_release(&s_ctx.mutex); #endif +#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP + //TODO: IDF-8475: Depends to SLEEP_RETENTION_MODULE_CLOCK_MODEM retention module after ADC retention supported. +#if SOC_PM_SUPPORT_MODEM_PD + esp_sleep_pd_config(ESP_PD_DOMAIN_MODEM, ESP_PD_OPTION_OFF); + esp_sleep_pd_config(ESP_PD_DOMAIN_TOP, ESP_PD_OPTION_OFF); +#endif +#elif ADC_LL_ADC_FE_ON_MODEM_DOMAIN + esp_sleep_pd_config(ESP_PD_DOMAIN_MODEM, ESP_PD_OPTION_OFF); +#endif return ESP_OK; } diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 2450806798..7eb34dcab3 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -204,7 +204,6 @@ static void IRAM_ATTR modem_clock_device_enable(modem_clock_context_t *ctx, uint } } portEXIT_CRITICAL_SAFE(&ctx->lock); - assert(refs >= 0); } static void IRAM_ATTR modem_clock_device_disable(modem_clock_context_t *ctx, uint32_t dev_map) diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h index d7d689e74a..3897b56e25 100644 --- a/components/hal/esp32c6/include/hal/adc_ll.h +++ b/components/hal/esp32c6/include/hal/adc_ll.h @@ -38,6 +38,8 @@ extern "C" { #define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M) #define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M) +#define ADC_LL_ADC_FE_ON_MODEM_DOMAIN (1) + /*--------------------------------------------------------------- Oneshot ---------------------------------------------------------------*/ diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index dd9c811379..24f6b1cea5 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -38,6 +38,8 @@ extern "C" { #define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M) #define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M) +#define ADC_LL_ADC_FE_ON_MODEM_DOMAIN (1) + /*--------------------------------------------------------------- Oneshot ---------------------------------------------------------------*/ From ee7ba6673650ce7a21cd7995aa7f809508d6116e Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 8 Jul 2025 15:32:45 +0800 Subject: [PATCH 2/2] change(esp_hw_support): always do hardware clock enable in modem module enabling --- components/esp_hw_support/modem_clock.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 7eb34dcab3..728fb9223c 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -193,14 +193,11 @@ esp_err_t modem_clock_domain_clk_gate_disable(modem_clock_domain_t domain, pmu_h static void IRAM_ATTR modem_clock_device_enable(modem_clock_context_t *ctx, uint32_t dev_map) { - int16_t refs = 0; portENTER_CRITICAL_SAFE(&ctx->lock); for (int i = 0; dev_map; dev_map >>= 1, i++) { if (dev_map & BIT(0)) { - refs = ctx->dev[i].refs++; - if (refs == 0) { - (*ctx->dev[i].configure)(ctx, true); - } + ctx->dev[i].refs++; + (*ctx->dev[i].configure)(ctx, true); } } portEXIT_CRITICAL_SAFE(&ctx->lock);