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spi_flash: fix the issue that ext flash hold is not controlled properly

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This commit is contained in:
Cao Sen Miao
2021-02-04 14:37:07 +08:00
parent cc1c6c30be
commit e38326d715
2 changed files with 5 additions and 5 deletions
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1
components/hal/esp32c3/include/hal/gpspi_flash_ll.h
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@@ -148,6 +148,7 @@ static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *bu
*/ */
static inline void gpspi_flash_ll_user_start(spi_dev_t *dev) static inline void gpspi_flash_ll_user_start(spi_dev_t *dev)
{ {
dev->ctrl.hold_pol = 1;
dev->cmd.update = 1; dev->cmd.update = 1;
while (dev->cmd.update); while (dev->cmd.update);
dev->cmd.usr = 1; dev->cmd.usr = 1;

9
components/spi_flash/test/test_esp_flash.c
View File

@@ -141,21 +141,21 @@ typedef void (*flash_test_func_t)(const esp_partition_t *part);
#define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN) #define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN)
#define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN) #define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN)
#else #else //CONFIG_SPIRAM
#if !CONFIG_IDF_TARGET_ESP32C3 #if !CONFIG_IDF_TARGET_ESP32C3
#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ #define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \
TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ #define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \
TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
#else #else //CONFIG_IDF_TARGET_ESP32C3
#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ #define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \
TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ #define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \
TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
#endif // !CONFIG_IDF_TARGET_ESP32C3 #endif // !CONFIG_IDF_TARGET_ESP32C3
#endif #endif //CONFIG_SPIRAM
//currently all the configs are the same with esp_flash_spi_device_config_t, no more information required //currently all the configs are the same with esp_flash_spi_device_config_t, no more information required
typedef esp_flash_spi_device_config_t flashtest_config_t; typedef esp_flash_spi_device_config_t flashtest_config_t;
@@ -204,7 +204,6 @@ flashtest_config_t config_list[] = {
#elif CONFIG_IDF_TARGET_ESP32S2 #elif CONFIG_IDF_TARGET_ESP32S2
flashtest_config_t config_list[] = { flashtest_config_t config_list[] = {
FLASHTEST_CONFIG_COMMON, FLASHTEST_CONFIG_COMMON,
/* No runners for esp32s2 for these config yet */
{ {
.io_mode = TEST_SPI_READ_MODE, .io_mode = TEST_SPI_READ_MODE,
.speed = TEST_SPI_SPEED, .speed = TEST_SPI_SPEED,
@@ -238,7 +237,7 @@ flashtest_config_t config_list[] = {
}; };
#elif CONFIG_IDF_TARGET_ESP32C3 #elif CONFIG_IDF_TARGET_ESP32C3
flashtest_config_t config_list[] = { flashtest_config_t config_list[] = {
/* No runners for esp32c3 for these config yet */ /* No SPI1 CS1 flash on esp32c3 test */
{ {
/* no need to init */ /* no need to init */
.host_id = -1, .host_id = -1,