From 1bbefc3e5d2ae21a1183973ad622a7771baf9903 Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Thu, 16 Sep 2021 00:06:10 +0300 Subject: [PATCH 1/5] debug_stubs: Refactor and add support for RISCV --- components/app_trace/port/riscv/port.c | 23 +++------- components/esp32c3/Kconfig | 8 ---- components/esp32h2/Kconfig | 8 ---- components/esp32s2/Kconfig | 8 ---- components/esp32s3/Kconfig | 8 ---- components/esp_system/CMakeLists.txt | 7 +-- components/esp_system/Kconfig | 2 +- .../esp_system/{dbg_stubs.c => debug_stubs.c} | 29 ++++-------- .../esp_system/port/arch/riscv/debug_stubs.c | 34 ++++++++++++++ .../esp_system/port/arch/xtensa/debug_stubs.c | 23 ++++++++++ .../esp_system/port/soc/esp32/CMakeLists.txt | 1 + .../port/soc/esp32c3/CMakeLists.txt | 3 +- .../port/soc/esp32h2/CMakeLists.txt | 4 +- .../port/soc/esp32s2/CMakeLists.txt | 1 + .../port/soc/esp32s3/CMakeLists.txt | 1 + components/hal/esp32c3/include/hal/cpu_ll.h | 46 +++++++++++++------ components/hal/esp32h2/include/hal/cpu_ll.h | 46 +++++++++++++------ components/hal/include/hal/cpu_hal.h | 23 ++++------ examples/system/gcov/README.md | 2 +- 19 files changed, 160 insertions(+), 117 deletions(-) rename components/esp_system/{dbg_stubs.c => debug_stubs.c} (77%) create mode 100644 components/esp_system/port/arch/riscv/debug_stubs.c create mode 100644 components/esp_system/port/arch/xtensa/debug_stubs.c diff --git a/components/app_trace/port/riscv/port.c b/components/app_trace/port/riscv/port.c index 119154ded5..7986e81508 100644 --- a/components/app_trace/port/riscv/port.c +++ b/components/app_trace/port/riscv/port.c @@ -1,3 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + #include "esp_log.h" #include "esp_app_trace_membufs_proto.h" #include "esp_app_trace_port.h" @@ -94,25 +100,10 @@ esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data) e.g. OpenOCD flasher stub use own implementation of it. */ __attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr) { - register int sys_nr = RISCV_APPTRACE_SYSNR; - register int host_ret = 0; - if (!esp_cpu_in_ocd_debug_mode()) { return 0; } - __asm__ volatile ( \ - ".option push\n" \ - ".option norvc\n" \ - "mv a0, %[sys_nr]\n" \ - "mv a1, %[arg1]\n" \ - "slli zero,zero,0x1f\n" \ - "ebreak\n" \ - "srai zero,zero,0x7\n" \ - "mv %[host_ret], a0\n" \ - ".option pop\n" \ - :[host_ret]"=r"(host_ret) - :[sys_nr]"r"(sys_nr),[arg1]"r"(ctrl_block_addr):"a0","a1"); - return host_ret; + return cpu_hal_syscall(RISCV_APPTRACE_SYSNR, (int)ctrl_block_addr, 0, 0, 0, NULL); } /* Returns up buffers config. diff --git a/components/esp32c3/Kconfig b/components/esp32c3/Kconfig index 706968f604..5d1b9ce8d1 100644 --- a/components/esp32c3/Kconfig +++ b/components/esp32c3/Kconfig @@ -56,14 +56,6 @@ menu "ESP32C3-Specific" The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. - config ESP32C3_DEBUG_STUBS_ENABLE - bool "OpenOCD debug stubs" - default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32C3_TRAX - help - Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, - e.g. GCOV data dump. - config ESP32C3_BROWNOUT_DET bool "Hardware brownout detect & reset" depends on !IDF_ENV_FPGA diff --git a/components/esp32h2/Kconfig b/components/esp32h2/Kconfig index 9144e0d96e..46c70d0867 100644 --- a/components/esp32h2/Kconfig +++ b/components/esp32h2/Kconfig @@ -53,14 +53,6 @@ menu "ESP32H2-Specific" The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. - config ESP32H2_DEBUG_STUBS_ENABLE - bool "OpenOCD debug stubs" - default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32H2_TRAX - help - Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, - e.g. GCOV data dump. - config ESP32H2_BROWNOUT_DET bool "Hardware brownout detect & reset" default y diff --git a/components/esp32s2/Kconfig b/components/esp32s2/Kconfig index 997c553ddc..806a7186c7 100644 --- a/components/esp32s2/Kconfig +++ b/components/esp32s2/Kconfig @@ -256,14 +256,6 @@ menu "ESP32S2-specific" The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. - config ESP32S2_DEBUG_STUBS_ENABLE - bool "OpenOCD debug stubs" - default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32S2_TRAX - help - Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, - e.g. GCOV data dump. - config ESP32S2_BROWNOUT_DET bool "Hardware brownout detect & reset" depends on !IDF_ENV_FPGA diff --git a/components/esp32s3/Kconfig b/components/esp32s3/Kconfig index 725659b551..cfdebd2c5e 100644 --- a/components/esp32s3/Kconfig +++ b/components/esp32s3/Kconfig @@ -328,14 +328,6 @@ menu "ESP32S3-Specific" The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. - config ESP32S3_DEBUG_STUBS_ENABLE - bool "OpenOCD debug stubs" - default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32S3_TRAX - help - Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, - e.g. GCOV data dump. - config ESP32S3_BROWNOUT_DET bool "Hardware brownout detect & reset" depends on !IDF_ENV_FPGA diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index 0aa60f72a7..966fcb121a 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -22,11 +22,8 @@ else() "stack_check.c" "task_wdt.c" "ubsan.c" - "xt_wdt.c") - - if(NOT (${target} STREQUAL "esp32c3") AND NOT (${target} STREQUAL "esp32h2")) - list(APPEND srcs "dbg_stubs.c") - endif() + "xt_wdt.c" + "debug_stubs.c") if(CONFIG_ESP_SYSTEM_USE_EH_FRAME) list(APPEND srcs "eh_frame_parser.c") diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 62b5bf8f6a..6ec849a7c0 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -474,7 +474,7 @@ menu "ESP System Settings" is triggered. config ESP_DEBUG_STUBS_ENABLE - bool + bool "OpenOCD debug stubs" default COMPILER_OPTIMIZATION_LEVEL_DEBUG depends on !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX help diff --git a/components/esp_system/dbg_stubs.c b/components/esp_system/debug_stubs.c similarity index 77% rename from components/esp_system/dbg_stubs.c rename to components/esp_system/debug_stubs.c index b564c5b6f2..7d1a255278 100644 --- a/components/esp_system/dbg_stubs.c +++ b/components/esp_system/debug_stubs.c @@ -1,27 +1,16 @@ -// Copyright 2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD // Currently one stub is used for GCOV functionality // -#include "eri.h" -#include "xtensa-debug-module.h" #include "esp_private/dbg_stubs.h" #include "esp_attr.h" -#if CONFIG_ESP_DEBUG_STUBS_ENABLE /* Debug stubs is actually a table of 4-byte entries. Every entry is equal to zero or must contain meaningfull data. The first entry is a service one and has the followinf format: @@ -35,7 +24,6 @@ #include "esp_log.h" const static char *TAG = "esp_dbg_stubs"; -#define ESP_DBG_STUBS_TRAX_REG ERI_TRAX_TRIGGERPC #define ESP_DBG_STUBS_CODE_BUF_SIZE 32 #define ESP_DBG_STUBS_STACK_MIN_SIZE 2048 @@ -52,6 +40,8 @@ static uint32_t s_stub_entry[ESP_DBG_STUB_ENTRY_MAX]; static uint8_t s_stub_min_stack[ESP_DBG_STUBS_STACK_MIN_SIZE]; static DBG_STUB_TRAMP_ATTR uint8_t s_stub_code_buf[ESP_DBG_STUBS_CODE_BUF_SIZE]; +extern void esp_dbg_stubs_ll_init(void *stub_table_addr); + // TODO: all called funcs should be in IRAM to work with disabled flash cache static void * esp_dbg_stubs_data_alloc(uint32_t size) { @@ -78,8 +68,7 @@ void esp_dbg_stubs_init(void) s_stub_entry[ESP_DBG_STUB_MAGIC_NUM] = ESP_DBG_STUB_MAGIC_NUM_VAL; s_stub_entry[ESP_DBG_STUB_TABLE_SIZE] = ESP_DBG_STUB_ENTRY_MAX; s_stub_entry[ESP_DBG_STUB_CONTROL_DATA] = (uint32_t)&s_dbg_stubs_ctl_data; - eri_write(ESP_DBG_STUBS_TRAX_REG, (uint32_t)s_stub_entry); - ESP_LOGV(TAG, "%s stubs %x", __func__, eri_read(ESP_DBG_STUBS_TRAX_REG)); + esp_dbg_stubs_ll_init(s_stub_entry); } // TODO: add lock mechanism. Not now but in the future ESP_DBG_STUB_ENTRY_CAPABILITIES can be set from different places. @@ -104,5 +93,3 @@ esp_err_t esp_dbg_stub_entry_get(esp_dbg_stub_id_t id, uint32_t *entry) return ESP_OK; } - -#endif diff --git a/components/esp_system/port/arch/riscv/debug_stubs.c b/components/esp_system/port/arch/riscv/debug_stubs.c new file mode 100644 index 0000000000..a8b0ddd0b2 --- /dev/null +++ b/components/esp_system/port/arch/riscv/debug_stubs.c @@ -0,0 +1,34 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD +// Currently one stub is used for GCOV functionality +// + +#include "esp_cpu.h" +#include "hal/cpu_hal.h" + +#include "esp_log.h" +const static char *TAG = "esp_dbg_stubs"; + +#define RISCV_DBG_STUBS_SYSNR 0x65 + +/* Advertises apptrace control block address to host */ +static int esp_dbg_stubs_advertise_table(void *stub_table_addr) +{ + if (!esp_cpu_in_ocd_debug_mode()) { + return 0; + } + return cpu_hal_syscall(RISCV_DBG_STUBS_SYSNR, (int)stub_table_addr, 0, 0, 0, NULL); +} + +void esp_dbg_stubs_ll_init(void *stub_table_addr) +{ + // notify host about control block address + int res = esp_dbg_stubs_advertise_table(stub_table_addr); + assert(res == 0 && "Falied to send debug stubs table address to host!"); + ESP_LOGV(TAG, "%s stubs %x", __func__, stub_table_addr); +} diff --git a/components/esp_system/port/arch/xtensa/debug_stubs.c b/components/esp_system/port/arch/xtensa/debug_stubs.c new file mode 100644 index 0000000000..b80eaf2f99 --- /dev/null +++ b/components/esp_system/port/arch/xtensa/debug_stubs.c @@ -0,0 +1,23 @@ +/* + * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD +// Currently one stub is used for GCOV functionality +// + +#include "eri.h" +#include "xtensa-debug-module.h" + +#include "esp_log.h" +const static char *TAG = "esp_dbg_stubs"; + +#define ESP_DBG_STUBS_TRAX_REG ERI_TRAX_TRIGGERPC + +void esp_dbg_stubs_ll_init(void *stub_table) +{ + eri_write(ESP_DBG_STUBS_TRAX_REG, (uint32_t)stub_table); + ESP_LOGV(TAG, "%s stubs %x", __func__, eri_read(ESP_DBG_STUBS_TRAX_REG)); +} diff --git a/components/esp_system/port/soc/esp32/CMakeLists.txt b/components/esp_system/port/soc/esp32/CMakeLists.txt index e66f3d9234..33ac3aa47c 100644 --- a/components/esp_system/port/soc/esp32/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32/CMakeLists.txt @@ -9,6 +9,7 @@ set(srcs "highint_hdl.S" "../../arch/xtensa/expression_with_stack_asm.S" "../../arch/xtensa/debug_helpers.c" "../../arch/xtensa/debug_helpers_asm.S" + "../../arch/xtensa/debug_stubs.c" "../../arch/xtensa/trax.c" ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) diff --git a/components/esp_system/port/soc/esp32c3/CMakeLists.txt b/components/esp_system/port/soc/esp32c3/CMakeLists.txt index 6f1bf116c0..a8034a3b9d 100644 --- a/components/esp_system/port/soc/esp32c3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32c3/CMakeLists.txt @@ -5,7 +5,8 @@ set(srcs "clk.c" "apb_backup_dma.c" "../../arch/riscv/expression_with_stack.c" "../../arch/riscv/expression_with_stack_asm.S" - "../../arch/riscv/panic_arch.c") + "../../arch/riscv/panic_arch.c" + "../../arch/riscv/debug_stubs.c") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) diff --git a/components/esp_system/port/soc/esp32h2/CMakeLists.txt b/components/esp_system/port/soc/esp32h2/CMakeLists.txt index 0725e3f02a..a8034a3b9d 100644 --- a/components/esp_system/port/soc/esp32h2/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32h2/CMakeLists.txt @@ -5,7 +5,9 @@ set(srcs "clk.c" "apb_backup_dma.c" "../../arch/riscv/expression_with_stack.c" "../../arch/riscv/expression_with_stack_asm.S" - "../../arch/riscv/panic_arch.c") + "../../arch/riscv/panic_arch.c" + "../../arch/riscv/debug_stubs.c") + add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_system/port/soc/esp32s2/CMakeLists.txt b/components/esp_system/port/soc/esp32s2/CMakeLists.txt index d606f3e661..82b838c8bc 100644 --- a/components/esp_system/port/soc/esp32s2/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s2/CMakeLists.txt @@ -9,6 +9,7 @@ set(srcs "highint_hdl.S" "../../arch/xtensa/expression_with_stack_asm.S" "../../arch/xtensa/debug_helpers.c" "../../arch/xtensa/debug_helpers_asm.S" + "../../arch/xtensa/debug_stubs.c" "../../arch/xtensa/trax.c" ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) diff --git a/components/esp_system/port/soc/esp32s3/CMakeLists.txt b/components/esp_system/port/soc/esp32s3/CMakeLists.txt index b944b7f875..7604fe31a4 100644 --- a/components/esp_system/port/soc/esp32s3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s3/CMakeLists.txt @@ -10,6 +10,7 @@ set(srcs "highint_hdl.S" "../../arch/xtensa/expression_with_stack_asm.S" "../../arch/xtensa/debug_helpers.c" "../../arch/xtensa/debug_helpers_asm.S" + "../../arch/xtensa/debug_stubs.c" "../../arch/xtensa/trax.c" ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) diff --git a/components/hal/esp32c3/include/hal/cpu_ll.h b/components/hal/esp32c3/include/hal/cpu_ll.h index fe0f11d434..bce6757911 100644 --- a/components/hal/esp32c3/include/hal/cpu_ll.h +++ b/components/hal/esp32c3/include/hal/cpu_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -151,6 +143,34 @@ static inline void cpu_ll_break(void) return; } +static inline int cpu_ll_syscall(int sys_nr, int arg1, int arg2, int arg3, int arg4, int* ret_errno) +{ + int host_ret, host_errno; + + asm volatile ( \ + ".option push\n" \ + ".option norvc\n" \ + "mv a0, %[sys_nr]\n" \ + "mv a1, %[arg1]\n" \ + "mv a2, %[arg2]\n" \ + "mv a3, %[arg3]\n" \ + "mv a4, %[arg4]\n" \ + "slli zero,zero,0x1f\n" \ + "ebreak\n" \ + "srai zero,zero,0x7\n" \ + "mv %[host_ret], a0\n" \ + "mv %[host_errno], a1\n" \ + ".option pop\n" \ + :[host_ret]"=r"(host_ret),[host_errno]"=r"(host_errno) + :[sys_nr]"r"(sys_nr),[arg1]"r"(arg1),[arg2]"r"(arg2),[arg3]"r"(arg3),[arg4]"r"(arg4) + :"a0","a1","a2","a3","a4"); + + if (ret_errno) { + *ret_errno = host_errno; + } + return host_ret; +} + static inline void cpu_ll_set_vecbase(const void* vecbase) { uintptr_t vecbase_int = (uintptr_t)vecbase; diff --git a/components/hal/esp32h2/include/hal/cpu_ll.h b/components/hal/esp32h2/include/hal/cpu_ll.h index dec049a30c..b3e1d88721 100644 --- a/components/hal/esp32h2/include/hal/cpu_ll.h +++ b/components/hal/esp32h2/include/hal/cpu_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -149,6 +141,34 @@ static inline void cpu_ll_break(void) return; } +static inline int cpu_ll_syscall(int sys_nr, int arg1, int arg2, int arg3, int arg4, int* ret_errno) +{ + int host_ret, host_errno; + + asm volatile ( \ + ".option push\n" \ + ".option norvc\n" \ + "mv a0, %[sys_nr]\n" \ + "mv a1, %[arg1]\n" \ + "mv a2, %[arg2]\n" \ + "mv a3, %[arg3]\n" \ + "mv a4, %[arg4]\n" \ + "slli zero,zero,0x1f\n" \ + "ebreak\n" \ + "srai zero,zero,0x7\n" \ + "mv %[host_ret], a0\n" \ + "mv %[host_errno], a1\n" \ + ".option pop\n" \ + :[host_ret]"=r"(host_ret),[host_errno]"=r"(host_errno) + :[sys_nr]"r"(sys_nr),[arg1]"r"(arg1),[arg2]"r"(arg2),[arg3]"r"(arg3),[arg4]"r"(arg4) + :"a0","a1","a2","a3","a4"); + + if (ret_errno) { + *ret_errno = host_errno; + } + return host_ret; +} + static inline void cpu_ll_set_vecbase(const void* vecbase) { uintptr_t vecbase_int = (uintptr_t)vecbase; diff --git a/components/hal/include/hal/cpu_hal.h b/components/hal/include/hal/cpu_hal.h index e6b7c62d2f..824095871d 100644 --- a/components/hal/include/hal/cpu_hal.h +++ b/components/hal/include/hal/cpu_hal.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -78,6 +70,11 @@ extern "C" { */ #define cpu_hal_waiti() cpu_ll_waiti() +/** + * Trigger a syscall. + */ +#define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno) cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno) + #if SOC_CPU_BREAKPOINTS_NUM > 0 /** diff --git a/examples/system/gcov/README.md b/examples/system/gcov/README.md index 256ae5cdb2..f07673320d 100644 --- a/examples/system/gcov/README.md +++ b/examples/system/gcov/README.md @@ -43,7 +43,7 @@ The example will enable the following options by default: * Enable the Application Tracing Module under `Component config -> Application Level Tracing -> Data Destination` by choosing `Trace memory`. * Enable GCOV to host interface under `Component config -> Application Level Tracing -> GCOV to Host Enable`. -* Enable OpenOCD Debug Stubs under `Component config -> ESP32-specific -> OpenOCD debug stubs` +* Enable OpenOCD Debug Stubs under `Component config -> ESP System Settings -> OpenOCD debug stubs` ### Build, Flash, and Run From 792f510d0d4382734b7c3a19cf0a4d0c69ed0586 Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Tue, 21 Sep 2021 23:35:53 +0300 Subject: [PATCH 2/5] gcov: Do not use shrunk ROM's fake stdout and stderr FILE struct --- components/app_trace/gcov/gcov_rtio.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/components/app_trace/gcov/gcov_rtio.c b/components/app_trace/gcov/gcov_rtio.c index bd470c9a4f..70c30cf8e6 100644 --- a/components/app_trace/gcov/gcov_rtio.c +++ b/components/app_trace/gcov/gcov_rtio.c @@ -52,18 +52,11 @@ void gcov_dump_task(void *pvParameter) } ESP_EARLY_LOGV(TAG, "Config apptrace down buf"); esp_apptrace_down_buffer_config(down_buf, ESP_GCOV_DOWN_BUF_SIZE); - /* we are directing the std outputs to the fake ones in order to reduce stack usage */ - FILE *old_stderr = stderr; - FILE *old_stdout = stdout; - stderr = (FILE *) &__sf_fake_stderr; - stdout = (FILE *) &__sf_fake_stdout; ESP_EARLY_LOGV(TAG, "Dump data..."); __gcov_dump(); // reset dump status to allow incremental data accumulation __gcov_reset(); free(down_buf); - stderr = old_stderr; - stdout = old_stdout; ESP_EARLY_LOGV(TAG, "Finish file transfer session"); dump_result = esp_apptrace_fstop(ESP_APPTRACE_DEST_TRAX); if (dump_result != ESP_OK) { From 89fe956ebcc09ad7435c68e318b0296f01b6802f Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Tue, 21 Sep 2021 23:41:27 +0300 Subject: [PATCH 3/5] gcov: Fixes interference of gcov dump with normal IPC calls --- components/esp_ipc/src/esp_ipc.c | 45 +++++++++++++++++++++----------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/components/esp_ipc/src/esp_ipc.c b/components/esp_ipc/src/esp_ipc.c index fbf7e83d9c..c68c36303f 100644 --- a/components/esp_ipc/src/esp_ipc.c +++ b/components/esp_ipc/src/esp_ipc.c @@ -1,16 +1,8 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -65,6 +57,8 @@ static void IRAM_ATTR ipc_task(void* arg) if (s_gcov_func) { (*s_gcov_func)(s_gcov_func_arg); s_gcov_func = NULL; + /* we can not interfer with IPC calls so no need for further processing */ + continue; } #endif if (s_func[cpuid]) { @@ -171,14 +165,35 @@ esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg) #if CONFIG_APPTRACE_GCOV_ENABLE esp_err_t esp_ipc_start_gcov_from_isr(uint32_t cpu_id, esp_ipc_func_t func, void* arg) { + portBASE_TYPE ret = pdFALSE; + if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) { return ESP_ERR_INVALID_STATE; } + + /* Lock IPC to avoid interferring with normal IPC calls, e.g. + avoid situation when esp_ipc_start_gcov_from_isr() is called from IRQ + in the middle of IPC call between `s_func` and `s_func_arg` modification. See esp_ipc_call_and_wait() */ +#ifdef CONFIG_ESP_IPC_USES_CALLERS_PRIORITY + ret = xSemaphoreTakeFromISR(s_ipc_mutex[cpu_id], NULL); +#else + ret = xSemaphoreTakeFromISR(s_ipc_mutex[0], NULL); +#endif + if (ret != pdTRUE) { + return ESP_ERR_TIMEOUT; + } + s_gcov_func = func; s_gcov_func_arg = arg; - xSemaphoreGiveFromISR(s_ipc_sem[cpu_id], NULL); + ret = xSemaphoreGiveFromISR(s_ipc_sem[cpu_id], NULL); - return ESP_OK; +#ifdef CONFIG_ESP_IPC_USES_CALLERS_PRIORITY + xSemaphoreGiveFromISR(s_ipc_mutex[cpu_id], NULL); +#else + xSemaphoreGiveFromISR(s_ipc_mutex[0], NULL); +#endif + + return ret == pdTRUE ? ESP_OK : ESP_FAIL; } #endif // CONFIG_APPTRACE_GCOV_ENABLE From e366d569d8d1cd13345e4773ccce7bc7c2b51fcd Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Tue, 21 Sep 2021 23:43:12 +0300 Subject: [PATCH 4/5] example/gcov: Adds support for esp32s2, esp32s3, esp32c3 and esp32h2 --- examples/system/gcov/main/Kconfig.projbuild | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/examples/system/gcov/main/Kconfig.projbuild b/examples/system/gcov/main/Kconfig.projbuild index 09f282c826..7fe6fb784e 100644 --- a/examples/system/gcov/main/Kconfig.projbuild +++ b/examples/system/gcov/main/Kconfig.projbuild @@ -2,13 +2,13 @@ menu "Example Configuration" config BLINK_GPIO int "Blink GPIO number" - range 0 34 + range 0 48 + default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H2 + default 18 if IDF_TARGET_ESP32S2 + default 48 if IDF_TARGET_ESP32S3 default 5 help - GPIO number (IOxx) to blink on and off. - + GPIO number (IOxx) to blink on and off or the RMT signal for the addressable LED. Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to blink. - GPIOs 35-39 are input-only so cannot be used as outputs. - endmenu From 54e416d3b85ee0c4b79d93fe51052caa58f94441 Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Tue, 21 Sep 2021 23:46:33 +0300 Subject: [PATCH 5/5] docs: Updates apptrace menuconfig options in examples --- examples/network/simple_sniffer/README.md | 4 ++-- examples/system/gcov/README.md | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/network/simple_sniffer/README.md b/examples/network/simple_sniffer/README.md index 154a644348..72c3b1fd19 100644 --- a/examples/network/simple_sniffer/README.md +++ b/examples/network/simple_sniffer/README.md @@ -29,7 +29,7 @@ Open the project configuration menu (`idf.py menuconfig`). Then go into `Example - Select where to save the pcap file in `Select destination to store pcap file` menu item. - `SD Card` means saving packets (pcap format) into the SD card you plug in. The default SD card work mode is set to SDMMC for target ESP32 and ESP32S3, but SPI is the only choice for other targets. - `Memory` means saving packets in memory and can parse packets in place. - - `JTAG (App Trace)` means sending packets (pcap format) to host via JTAG interface. This feature depends on [app trace component](https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/app_trace.html), Component config -> Application Lelvel Tracing -> Data Destination -> Trace memory should be enabled to choose `JTAG (App Trace)` as destination. + - `JTAG (App Trace)` means sending packets (pcap format) to host via JTAG interface. This feature depends on [app trace component](https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/app_trace.html), Component config -> Application Level Tracing -> Data Destination -> JTAG should be enabled to choose `JTAG (App Trace)` as destination. - Set the mount point in your filesystem in `SD card mount point in the filesystem` menu item. This configuration only takes effect when you choose to save packets into SD card. - Set max name length of pcap file in `Max name length of pcap file` menu item. - Set the length of sniffer work queue in `Length of sniffer work queue` menu item. @@ -135,7 +135,7 @@ Press TAB when typing command name to auto-complete. sniffer> mount sd I (12653) example: Initializing SD card I (12653) example: Using SDMMC peripheral -I (12663) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 +I (12663) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 Name: SC64G Type: SDHC/SDXC Speed: 20 MHz diff --git a/examples/system/gcov/README.md b/examples/system/gcov/README.md index f07673320d..1aeaee631a 100644 --- a/examples/system/gcov/README.md +++ b/examples/system/gcov/README.md @@ -41,7 +41,7 @@ idf.py menuconfig The example will enable the following options by default: -* Enable the Application Tracing Module under `Component config -> Application Level Tracing -> Data Destination` by choosing `Trace memory`. +* Enable the Application Tracing Module under `Component config -> Application Level Tracing -> Data Destination` by choosing `JTAG`. * Enable GCOV to host interface under `Component config -> Application Level Tracing -> GCOV to Host Enable`. * Enable OpenOCD Debug Stubs under `Component config -> ESP System Settings -> OpenOCD debug stubs`