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https://github.com/espressif/esp-idf.git
synced 2025-08-11 16:44:35 +02:00
spi: formate test_spi_param.c
This commit is contained in:
@@ -104,7 +104,9 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p
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devcfg.cs_ena_posttrans = cs_posttrans_max;
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devcfg.cs_ena_posttrans = cs_posttrans_max;
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devcfg.input_delay_ns = pset->slave_tv_ns;
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devcfg.input_delay_ns = pset->slave_tv_ns;
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devcfg.clock_speed_hz = freq;
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devcfg.clock_speed_hz = freq;
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if (pset->master_limit != 0 && freq > pset->master_limit) devcfg.flags |= SPI_DEVICE_NO_DUMMY;
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if (pset->master_limit != 0 && freq > pset->master_limit) {
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devcfg.flags |= SPI_DEVICE_NO_DUMMY;
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}
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//slave config
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//slave config
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slvcfg.mode = pset->mode;
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slvcfg.mode = pset->mode;
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@@ -160,17 +162,25 @@ static void local_test_loop(const void* arg1, void* arg2)
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ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
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ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
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for (int i = 0; ; i++) {
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for (int i = 0; ; i++) {
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const int freq = timing_speed_array[i];
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const int freq = timing_speed_array[i];
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if (freq==0) break;
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if (freq == 0) {
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if (pset->freq_limit && freq > pset->freq_limit) break;
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break;
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}
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if (pset->freq_limit && freq > pset->freq_limit) {
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break;
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}
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ESP_LOGI(MASTER_TAG, "==> %dkHz", freq / 1000);
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ESP_LOGI(MASTER_TAG, "==> %dkHz", freq / 1000);
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bool check_master_data = (pset->dup != HALF_DUPLEX_MOSI &&
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bool check_master_data = (pset->dup != HALF_DUPLEX_MOSI &&
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(pset->master_limit == 0 || freq <= pset->master_limit));
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(pset->master_limit == 0 || freq <= pset->master_limit));
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if (!check_master_data) ESP_LOGI(MASTER_TAG, "skip master data check");
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if (!check_master_data) {
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ESP_LOGI(MASTER_TAG, "skip master data check");
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}
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bool check_slave_data = (pset->dup != HALF_DUPLEX_MISO);
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bool check_slave_data = (pset->dup != HALF_DUPLEX_MISO);
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if (!check_slave_data) ESP_LOGI(SLAVE_TAG, "skip slave data check");
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if (!check_slave_data) {
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ESP_LOGI(SLAVE_TAG, "skip slave data check");
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}
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local_test_start(&spi, freq, pset, context);
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local_test_start(&spi, freq, pset, context);
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@@ -238,7 +248,8 @@ static void local_test_loop(const void* arg1, void* arg2)
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static spitest_param_set_t timing_pgroup[] = {
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static spitest_param_set_t timing_pgroup[] = {
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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{ .pset_name = "FULL_DUP, MASTER IOMUX",
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{
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.pset_name = "FULL_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -246,7 +257,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_iomux = false,
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.slave_iomux = false,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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},
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},
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{ .pset_name = "FULL_DUP, SLAVE IOMUX",
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{
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.pset_name = "FULL_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -255,7 +267,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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#endif
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#endif
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{ .pset_name = "FULL_DUP, BOTH GPIO",
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{
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.pset_name = "FULL_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.master_limit = 10 * 1000 * 1000,
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.master_limit = 10 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -265,7 +278,8 @@ static spitest_param_set_t timing_pgroup[] = {
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},
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},
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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{ .pset_name = "MISO_DUP, MASTER IOMUX",
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{
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.pset_name = "MISO_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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@@ -273,7 +287,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_iomux = false,
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.slave_iomux = false,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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},
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},
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{ .pset_name = "MISO_DUP, SLAVE IOMUX",
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{
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.pset_name = "MISO_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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@@ -282,7 +297,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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#endif
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#endif
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{ .pset_name = "MISO_DUP, BOTH GPIO",
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{
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.pset_name = "MISO_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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@@ -292,7 +308,8 @@ static spitest_param_set_t timing_pgroup[] = {
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},
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},
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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//signals are not fed to peripherals through iomux if the functions are not selected to iomux
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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{ .pset_name = "MOSI_DUP, MASTER IOMUX",
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{
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.pset_name = "MOSI_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MOSI,
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.dup = HALF_DUPLEX_MOSI,
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@@ -300,7 +317,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_iomux = false,
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.slave_iomux = false,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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.slave_tv_ns = TV_INT_CONNECT_GPIO,
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},
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},
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{ .pset_name = "MOSI_DUP, SLAVE IOMUX",
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{
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.pset_name = "MOSI_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MOSI,
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.dup = HALF_DUPLEX_MOSI,
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@@ -309,7 +327,8 @@ static spitest_param_set_t timing_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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#endif
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#endif
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{ .pset_name = "MOSI_DUP, BOTH GPIO",
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{
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.pset_name = "MOSI_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
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.dup = HALF_DUPLEX_MOSI,
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.dup = HALF_DUPLEX_MOSI,
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@@ -361,7 +380,8 @@ static int test_freq_mode_local[]={
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static spitest_param_set_t mode_pgroup[] = {
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static spitest_param_set_t mode_pgroup[] = {
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{ .pset_name = "Mode 0",
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{
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.pset_name = "Mode 0",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -370,7 +390,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "Mode 1",
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{
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.pset_name = "Mode 1",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.freq_limit = 26 * 1000 * 1000,
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.freq_limit = 26 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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@@ -380,7 +401,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "Mode 2",
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{
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.pset_name = "Mode 2",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -389,7 +411,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "Mode 3",
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{
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.pset_name = "Mode 3",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.freq_limit = 26 * 1000 * 1000,
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.freq_limit = 26 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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@@ -399,7 +422,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "Mode 0, DMA",
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{
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.pset_name = "Mode 0, DMA",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -410,7 +434,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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.length_aligned = true,
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.length_aligned = true,
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},
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},
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{ .pset_name = "Mode 1, DMA",
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{
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.pset_name = "Mode 1, DMA",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.freq_limit = 26 * 1000 * 1000,
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.freq_limit = 26 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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@@ -422,7 +447,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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.length_aligned = true,
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.length_aligned = true,
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},
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},
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{ .pset_name = "Mode 2, DMA",
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{
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.pset_name = "Mode 2, DMA",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.dup = FULL_DUPLEX,
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.dup = FULL_DUPLEX,
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@@ -433,7 +459,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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.length_aligned = true,
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.length_aligned = true,
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},
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},
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{ .pset_name = "Mode 3, DMA",
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{
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.pset_name = "Mode 3, DMA",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.freq_limit = 26 * 1000 * 1000,
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.freq_limit = 26 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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.master_limit = 13 * 1000 * 1000,
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@@ -446,7 +473,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.length_aligned = true,
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.length_aligned = true,
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},
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},
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/////////////////////////// MISO ////////////////////////////////////
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/////////////////////////// MISO ////////////////////////////////////
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{ .pset_name = "MISO, Mode 0",
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{
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.pset_name = "MISO, Mode 0",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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.mode = 0,
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.mode = 0,
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@@ -454,7 +482,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "MISO, Mode 1",
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{
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.pset_name = "MISO, Mode 1",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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.mode = 1,
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.mode = 1,
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@@ -462,7 +491,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "MISO, Mode 2",
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{
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.pset_name = "MISO, Mode 2",
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.freq_list = test_freq_mode_local,
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.freq_list = test_freq_mode_local,
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.dup = HALF_DUPLEX_MISO,
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.dup = HALF_DUPLEX_MISO,
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.mode = 2,
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.mode = 2,
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@@ -470,7 +500,8 @@ static spitest_param_set_t mode_pgroup[] = {
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
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.slave_tv_ns = TV_INT_CONNECT,
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.slave_tv_ns = TV_INT_CONNECT,
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},
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},
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{ .pset_name = "MISO, Mode 3",
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{
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.pset_name = "MISO, Mode 3",
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.freq_list = test_freq_mode_local,
|
.freq_list = test_freq_mode_local,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.mode = 3,
|
.mode = 3,
|
||||||
@@ -478,7 +509,8 @@ static spitest_param_set_t mode_pgroup[] = {
|
|||||||
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
|
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
|
||||||
.slave_tv_ns = TV_INT_CONNECT,
|
.slave_tv_ns = TV_INT_CONNECT,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO, Mode 0, DMA",
|
{
|
||||||
|
.pset_name = "MISO, Mode 0, DMA",
|
||||||
.freq_list = test_freq_mode_local,
|
.freq_list = test_freq_mode_local,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.mode = 0,
|
.mode = 0,
|
||||||
@@ -488,7 +520,8 @@ static spitest_param_set_t mode_pgroup[] = {
|
|||||||
.slave_tv_ns = TV_INT_CONNECT + SLAVE_EXTRA_DELAY_DMA,
|
.slave_tv_ns = TV_INT_CONNECT + SLAVE_EXTRA_DELAY_DMA,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO, Mode 1, DMA",
|
{
|
||||||
|
.pset_name = "MISO, Mode 1, DMA",
|
||||||
.freq_list = test_freq_mode_local,
|
.freq_list = test_freq_mode_local,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.mode = 1,
|
.mode = 1,
|
||||||
@@ -498,7 +531,8 @@ static spitest_param_set_t mode_pgroup[] = {
|
|||||||
.slave_tv_ns = TV_INT_CONNECT,
|
.slave_tv_ns = TV_INT_CONNECT,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO, Mode 2, DMA",
|
{
|
||||||
|
.pset_name = "MISO, Mode 2, DMA",
|
||||||
.freq_list = test_freq_mode_local,
|
.freq_list = test_freq_mode_local,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.mode = 2,
|
.mode = 2,
|
||||||
@@ -508,7 +542,8 @@ static spitest_param_set_t mode_pgroup[] = {
|
|||||||
.slave_tv_ns = TV_INT_CONNECT + SLAVE_EXTRA_DELAY_DMA,
|
.slave_tv_ns = TV_INT_CONNECT + SLAVE_EXTRA_DELAY_DMA,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO, Mode 3, DMA",
|
{
|
||||||
|
.pset_name = "MISO, Mode 3, DMA",
|
||||||
.freq_list = test_freq_mode_local,
|
.freq_list = test_freq_mode_local,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.mode = 3,
|
.mode = 3,
|
||||||
@@ -696,7 +731,9 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_
|
|||||||
//master config
|
//master config
|
||||||
spi_bus_config_t buspset = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buspset = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
//this does nothing, but avoid the driver from using native pins
|
//this does nothing, but avoid the driver from using native pins
|
||||||
if (!pset->master_iomux) buspset.quadhd_io_num = UNCONNECTED_PIN;
|
if (!pset->master_iomux) {
|
||||||
|
buspset.quadhd_io_num = UNCONNECTED_PIN;
|
||||||
|
}
|
||||||
spi_device_interface_config_t devpset = SPI_DEVICE_TEST_DEFAULT_CONFIG();
|
spi_device_interface_config_t devpset = SPI_DEVICE_TEST_DEFAULT_CONFIG();
|
||||||
devpset.spics_io_num = SPI2_IOMUX_PIN_NUM_CS;
|
devpset.spics_io_num = SPI2_IOMUX_PIN_NUM_CS;
|
||||||
devpset.mode = pset->mode;
|
devpset.mode = pset->mode;
|
||||||
@@ -714,7 +751,9 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_
|
|||||||
devpset.cs_ena_posttrans = cs_posttrans_max;
|
devpset.cs_ena_posttrans = cs_posttrans_max;
|
||||||
devpset.input_delay_ns = pset->slave_tv_ns;
|
devpset.input_delay_ns = pset->slave_tv_ns;
|
||||||
devpset.clock_speed_hz = freq;
|
devpset.clock_speed_hz = freq;
|
||||||
if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
|
if (pset->master_limit != 0 && freq > pset->master_limit) {
|
||||||
|
devpset.flags |= SPI_DEVICE_NO_DUMMY;
|
||||||
|
}
|
||||||
|
|
||||||
int dma_chan = (pset->master_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
|
int dma_chan = (pset->master_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
|
||||||
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, dma_chan));
|
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, dma_chan));
|
||||||
@@ -758,8 +797,12 @@ static void test_master_loop(const void *arg1, void* arg2)
|
|||||||
ESP_LOGI(MASTER_TAG, "****************** %s ***************", test_cfg->pset_name);
|
ESP_LOGI(MASTER_TAG, "****************** %s ***************", test_cfg->pset_name);
|
||||||
for (int i = 0; ; i++ ) {
|
for (int i = 0; ; i++ ) {
|
||||||
const int freq = timing_speed_array[i];
|
const int freq = timing_speed_array[i];
|
||||||
if (freq==0) break;
|
if (freq == 0) {
|
||||||
if (test_cfg->freq_limit && freq > test_cfg->freq_limit) break;
|
break;
|
||||||
|
}
|
||||||
|
if (test_cfg->freq_limit && freq > test_cfg->freq_limit) {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
ESP_LOGI(MASTER_TAG, "==============> %dk", freq / 1000);
|
ESP_LOGI(MASTER_TAG, "==============> %dk", freq / 1000);
|
||||||
test_master_start(&spi, freq, test_cfg, context);
|
test_master_start(&spi, freq, test_cfg, context);
|
||||||
@@ -832,7 +875,9 @@ static void timing_slave_start(int speed, const spitest_param_set_t* pset, spite
|
|||||||
//slave config
|
//slave config
|
||||||
spi_bus_config_t slv_buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t slv_buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
//this does nothing, but avoid the driver from using native pins
|
//this does nothing, but avoid the driver from using native pins
|
||||||
if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = UNCONNECTED_PIN;
|
if (!pset->slave_iomux) {
|
||||||
|
slv_buscfg.quadhd_io_num = UNCONNECTED_PIN;
|
||||||
|
}
|
||||||
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
||||||
slvcfg.spics_io_num = SPI2_IOMUX_PIN_NUM_CS;
|
slvcfg.spics_io_num = SPI2_IOMUX_PIN_NUM_CS;
|
||||||
slvcfg.mode = pset->mode;
|
slvcfg.mode = pset->mode;
|
||||||
@@ -862,8 +907,12 @@ static void test_slave_loop(const void *arg1, void* arg2)
|
|||||||
const int *timing_speed_array = pset->freq_list;
|
const int *timing_speed_array = pset->freq_list;
|
||||||
for (int i = 0; ; i++ ) {
|
for (int i = 0; ; i++ ) {
|
||||||
const int freq = timing_speed_array[i];
|
const int freq = timing_speed_array[i];
|
||||||
if (freq==0) break;
|
if (freq == 0) {
|
||||||
if (pset->freq_limit != 0 && freq > pset->freq_limit) break;
|
break;
|
||||||
|
}
|
||||||
|
if (pset->freq_limit != 0 && freq > pset->freq_limit) {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
ESP_LOGI(MASTER_TAG, "==============> %dk", timing_speed_array[i] / 1000);
|
ESP_LOGI(MASTER_TAG, "==============> %dk", timing_speed_array[i] / 1000);
|
||||||
//Initialize SPI slave interface
|
//Initialize SPI slave interface
|
||||||
@@ -910,7 +959,8 @@ static void test_slave_loop(const void *arg1, void* arg2)
|
|||||||
|
|
||||||
/************ Timing Test ***********************************************/
|
/************ Timing Test ***********************************************/
|
||||||
static spitest_param_set_t timing_conf[] = {
|
static spitest_param_set_t timing_conf[] = {
|
||||||
{ .pset_name = "FULL_DUP, BOTH IOMUX",
|
{
|
||||||
|
.pset_name = "FULL_DUP, BOTH IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.master_limit = 16 * 1000 * 1000,
|
.master_limit = 16 * 1000 * 1000,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -918,7 +968,8 @@ static spitest_param_set_t timing_conf[] = {
|
|||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "FULL_DUP, MASTER IOMUX",
|
{
|
||||||
|
.pset_name = "FULL_DUP, MASTER IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.master_limit = 11 * 1000 * 1000,
|
.master_limit = 11 * 1000 * 1000,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -926,7 +977,8 @@ static spitest_param_set_t timing_conf[] = {
|
|||||||
.slave_iomux = false,
|
.slave_iomux = false,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "FULL_DUP, SLAVE IOMUX",
|
{
|
||||||
|
.pset_name = "FULL_DUP, SLAVE IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.master_limit = 11 * 1000 * 1000,
|
.master_limit = 11 * 1000 * 1000,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -934,7 +986,8 @@ static spitest_param_set_t timing_conf[] = {
|
|||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "FULL_DUP, BOTH GPIO",
|
{
|
||||||
|
.pset_name = "FULL_DUP, BOTH GPIO",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.master_limit = 9 * 1000 * 1000,
|
.master_limit = 9 * 1000 * 1000,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -942,56 +995,64 @@ static spitest_param_set_t timing_conf[] = {
|
|||||||
.slave_iomux = false,
|
.slave_iomux = false,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MOSI_DUP, BOTH IOMUX",
|
{
|
||||||
|
.pset_name = "MOSI_DUP, BOTH IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MOSI,
|
.dup = HALF_DUPLEX_MOSI,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MOSI_DUP, MASTER IOMUX",
|
{
|
||||||
|
.pset_name = "MOSI_DUP, MASTER IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MOSI,
|
.dup = HALF_DUPLEX_MOSI,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
.slave_iomux = false,
|
.slave_iomux = false,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MOSI_DUP, SLAVE IOMUX",
|
{
|
||||||
|
.pset_name = "MOSI_DUP, SLAVE IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MOSI,
|
.dup = HALF_DUPLEX_MOSI,
|
||||||
.master_iomux = false,
|
.master_iomux = false,
|
||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MOSI_DUP, BOTH GPIO",
|
{
|
||||||
|
.pset_name = "MOSI_DUP, BOTH GPIO",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MOSI,
|
.dup = HALF_DUPLEX_MOSI,
|
||||||
.master_iomux = false,
|
.master_iomux = false,
|
||||||
.slave_iomux = false,
|
.slave_iomux = false,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO_DUP, BOTH IOMUX",
|
{
|
||||||
|
.pset_name = "MISO_DUP, BOTH IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO_DUP, MASTER IOMUX",
|
{
|
||||||
|
.pset_name = "MISO_DUP, MASTER IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
.slave_iomux = false,
|
.slave_iomux = false,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO_DUP, SLAVE IOMUX",
|
{
|
||||||
|
.pset_name = "MISO_DUP, SLAVE IOMUX",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = false,
|
.master_iomux = false,
|
||||||
.slave_iomux = true,
|
.slave_iomux = true,
|
||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
},
|
},
|
||||||
{ .pset_name = "MISO_DUP, BOTH GPIO",
|
{
|
||||||
|
.pset_name = "MISO_DUP, BOTH GPIO",
|
||||||
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = false,
|
.master_iomux = false,
|
||||||
@@ -1026,7 +1087,8 @@ static int test_freq_20M_only[]={
|
|||||||
|
|
||||||
spitest_param_set_t mode_conf[] = {
|
spitest_param_set_t mode_conf[] = {
|
||||||
//non-DMA tests
|
//non-DMA tests
|
||||||
{ .pset_name = "mode 0, no DMA",
|
{
|
||||||
|
.pset_name = "mode 0, no DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1035,7 +1097,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 0,
|
.mode = 0,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 1, no DMA",
|
{
|
||||||
|
.pset_name = "mode 1, no DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1044,7 +1107,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 1,
|
.mode = 1,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 2, no DMA",
|
{
|
||||||
|
.pset_name = "mode 2, no DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1053,7 +1117,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 2,
|
.mode = 2,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 3, no DMA",
|
{
|
||||||
|
.pset_name = "mode 3, no DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1063,7 +1128,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.mode = 3,
|
.mode = 3,
|
||||||
},
|
},
|
||||||
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
||||||
{ .pset_name = "mode 0, no DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 0, no DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1071,7 +1137,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 0,
|
.mode = 0,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 1, no DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 1, no DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1079,7 +1146,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 1,
|
.mode = 1,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 2, no DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 2, no DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1087,7 +1155,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
||||||
.mode = 2,
|
.mode = 2,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 3, no DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 3, no DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1096,7 +1165,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.mode = 3,
|
.mode = 3,
|
||||||
},
|
},
|
||||||
//DMA tests
|
//DMA tests
|
||||||
{ .pset_name = "mode 0, DMA",
|
{
|
||||||
|
.pset_name = "mode 0, DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1108,7 +1178,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 1, DMA",
|
{
|
||||||
|
.pset_name = "mode 1, DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1120,7 +1191,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 2, DMA",
|
{
|
||||||
|
.pset_name = "mode 2, DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1132,7 +1204,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 3, DMA",
|
{
|
||||||
|
.pset_name = "mode 3, DMA",
|
||||||
.freq_list = test_freq_mode_ms,
|
.freq_list = test_freq_mode_ms,
|
||||||
.master_limit = FREQ_LIMIT_MODE,
|
.master_limit = FREQ_LIMIT_MODE,
|
||||||
.dup = FULL_DUPLEX,
|
.dup = FULL_DUPLEX,
|
||||||
@@ -1145,7 +1218,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.length_aligned = true,
|
.length_aligned = true,
|
||||||
},
|
},
|
||||||
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
||||||
{ .pset_name = "mode 0, DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 0, DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1155,7 +1229,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.master_dma_chan = SPI_DMA_CH_AUTO,
|
.master_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 1, DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 1, DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1165,7 +1240,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.master_dma_chan = SPI_DMA_CH_AUTO,
|
.master_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 2, DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 2, DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1175,7 +1251,8 @@ spitest_param_set_t mode_conf[] = {
|
|||||||
.master_dma_chan = SPI_DMA_CH_AUTO,
|
.master_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
.slave_dma_chan = SPI_DMA_CH_AUTO,
|
||||||
},
|
},
|
||||||
{ .pset_name = "mode 3, DMA, 20M",
|
{
|
||||||
|
.pset_name = "mode 3, DMA, 20M",
|
||||||
.freq_list = test_freq_20M_only,
|
.freq_list = test_freq_20M_only,
|
||||||
.dup = HALF_DUPLEX_MISO,
|
.dup = HALF_DUPLEX_MISO,
|
||||||
.master_iomux = true,
|
.master_iomux = true,
|
||||||
@@ -1204,7 +1281,8 @@ static int s_spi_bus_freq[] = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
//------------------------------------------- Full Duplex with DMA Freq test --------------------------------------
|
//------------------------------------------- Full Duplex with DMA Freq test --------------------------------------
|
||||||
static void test_master_fd_dma(void){
|
static void test_master_fd_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
@@ -1213,7 +1291,9 @@ static void test_master_fd_dma(void){
|
|||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
|
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
|
||||||
|
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
@@ -1224,7 +1304,9 @@ static void test_master_fd_dma(void){
|
|||||||
.clock_speed_hz = s_spi_bus_freq[speed_level],
|
.clock_speed_hz = s_spi_bus_freq[speed_level],
|
||||||
};
|
};
|
||||||
#if CONFIG_IDF_TARGET_ESP32
|
#if CONFIG_IDF_TARGET_ESP32
|
||||||
if(is_gpio && (s_spi_bus_freq[speed_level] >= 10*1000*1000)) continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
if (is_gpio && (s_spi_bus_freq[speed_level] >= 10 * 1000 * 1000)) {
|
||||||
|
continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
||||||
|
}
|
||||||
devcfg.cs_ena_pretrans = 2;
|
devcfg.cs_ena_pretrans = 2;
|
||||||
devcfg.input_delay_ns = 12.5 * 2;
|
devcfg.input_delay_ns = 12.5 * 2;
|
||||||
#endif
|
#endif
|
||||||
@@ -1260,21 +1342,26 @@ static void test_master_fd_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_fd_dma(void){
|
static void test_slave_fd_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
||||||
|
|
||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
||||||
slvcfg.mode = mode;
|
slvcfg.mode = mode;
|
||||||
TEST_ESP_OK(spi_slave_initialize(TEST_SPI_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
|
TEST_ESP_OK(spi_slave_initialize(TEST_SPI_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
#if CONFIG_IDF_TARGET_ESP32
|
#if CONFIG_IDF_TARGET_ESP32
|
||||||
if(is_gpio && (s_spi_bus_freq[speed_level] >= 10*1000*1000)) continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
if (is_gpio && (s_spi_bus_freq[speed_level] >= 10 * 1000 * 1000)) {
|
||||||
|
continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
printf("Next trans: %s\tmode:%d\t@%.2f MHz\n", (is_gpio) ? "GPIO_Matrix" : "IOMUX", mode, s_spi_bus_freq[speed_level] / 1000000.f);
|
printf("Next trans: %s\tmode:%d\t@%.2f MHz\n", (is_gpio) ? "GPIO_Matrix" : "IOMUX", mode, s_spi_bus_freq[speed_level] / 1000000.f);
|
||||||
unity_wait_for_signal("Master ready");
|
unity_wait_for_signal("Master ready");
|
||||||
@@ -1309,7 +1396,8 @@ TEST_CASE_MULTIPLE_DEVICES("TEST_SPI_Freq_FD_DMA", "[spi_ms][timeout=30]", test_
|
|||||||
|
|
||||||
|
|
||||||
//------------------------------------------- Full Duplex no DMA Freq test --------------------------------------
|
//------------------------------------------- Full Duplex no DMA Freq test --------------------------------------
|
||||||
static void test_master_fd_no_dma(void){
|
static void test_master_fd_no_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
@@ -1318,7 +1406,9 @@ static void test_master_fd_no_dma(void){
|
|||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_DISABLED));
|
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_DISABLED));
|
||||||
|
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
@@ -1329,7 +1419,9 @@ static void test_master_fd_no_dma(void){
|
|||||||
.clock_speed_hz = s_spi_bus_freq[speed_level],
|
.clock_speed_hz = s_spi_bus_freq[speed_level],
|
||||||
};
|
};
|
||||||
#if CONFIG_IDF_TARGET_ESP32
|
#if CONFIG_IDF_TARGET_ESP32
|
||||||
if(is_gpio && (s_spi_bus_freq[speed_level] >= 10*1000*1000)) continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
if (is_gpio && (s_spi_bus_freq[speed_level] >= 10 * 1000 * 1000)) {
|
||||||
|
continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
||||||
|
}
|
||||||
devcfg.cs_ena_pretrans = 2,
|
devcfg.cs_ena_pretrans = 2,
|
||||||
devcfg.input_delay_ns = 12.5 * 2,
|
devcfg.input_delay_ns = 12.5 * 2,
|
||||||
#endif
|
#endif
|
||||||
@@ -1365,14 +1457,17 @@ static void test_master_fd_no_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_fd_no_dma(void){
|
static void test_slave_fd_no_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
||||||
|
|
||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
|
||||||
slvcfg.mode = mode;
|
slvcfg.mode = mode;
|
||||||
@@ -1380,7 +1475,9 @@ static void test_slave_fd_no_dma(void){
|
|||||||
|
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
#if CONFIG_IDF_TARGET_ESP32
|
#if CONFIG_IDF_TARGET_ESP32
|
||||||
if(is_gpio && (s_spi_bus_freq[speed_level] >= 10*1000*1000)) continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
if (is_gpio && (s_spi_bus_freq[speed_level] >= 10 * 1000 * 1000)) {
|
||||||
|
continue; //On esp32 with GPIO Matrix, clk freq <= 10MHz
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
printf("Next trans: %s\tmode:%d\t@%.2f MHz\n", (is_gpio) ? "GPIO_Matrix" : "IOMUX", mode, s_spi_bus_freq[speed_level] / 1000000.f);
|
printf("Next trans: %s\tmode:%d\t@%.2f MHz\n", (is_gpio) ? "GPIO_Matrix" : "IOMUX", mode, s_spi_bus_freq[speed_level] / 1000000.f);
|
||||||
unity_wait_for_signal("Master ready");
|
unity_wait_for_signal("Master ready");
|
||||||
@@ -1416,7 +1513,8 @@ TEST_CASE_MULTIPLE_DEVICES("TEST_SPI_Freq_FD_no_DMA", "[spi_ms][timeout=30]", te
|
|||||||
|
|
||||||
#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
|
#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
|
||||||
//------------------------------------------- Half Duplex with DMA Freq test --------------------------------------
|
//------------------------------------------- Half Duplex with DMA Freq test --------------------------------------
|
||||||
static void test_master_hd_dma(void){
|
static void test_master_hd_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
@@ -1425,7 +1523,9 @@ static void test_master_hd_dma(void){
|
|||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
|
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
|
||||||
|
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
@@ -1461,14 +1561,17 @@ static void test_master_hd_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_hd_dma(void){
|
static void test_slave_hd_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
||||||
|
|
||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_slave_hd_slot_config_t hd_slvcfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
|
spi_slave_hd_slot_config_t hd_slvcfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
|
||||||
hd_slvcfg.mode = mode;
|
hd_slvcfg.mode = mode;
|
||||||
@@ -1511,7 +1614,8 @@ TEST_CASE_MULTIPLE_DEVICES("TEST_SPI_Freq_HD_DMA", "[spi_ms][timeout=30]", test_
|
|||||||
|
|
||||||
|
|
||||||
//------------------------------------------- Half Duplex no DMA Freq test --------------------------------------
|
//------------------------------------------- Half Duplex no DMA Freq test --------------------------------------
|
||||||
static void test_master_hd_no_dma(void){
|
static void test_master_hd_no_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
@@ -1520,7 +1624,9 @@ static void test_master_hd_no_dma(void){
|
|||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_DISABLED));
|
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_DISABLED));
|
||||||
|
|
||||||
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
for (uint8_t speed_level = 0; speed_level < sizeof(s_spi_bus_freq) / sizeof(int); speed_level++) {
|
||||||
@@ -1556,14 +1662,17 @@ static void test_master_hd_no_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_hd_no_dma(void){
|
static void test_slave_hd_no_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
||||||
|
|
||||||
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
for (uint8_t is_gpio = 0; is_gpio < 2; is_gpio++) {
|
||||||
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||||
if (is_gpio) buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
if (is_gpio) {
|
||||||
|
buscfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
|
||||||
|
}
|
||||||
for (uint8_t mode = 0; mode < 4; mode++) {
|
for (uint8_t mode = 0; mode < 4; mode++) {
|
||||||
spi_slave_hd_slot_config_t hd_slvcfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
|
spi_slave_hd_slot_config_t hd_slvcfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
|
||||||
hd_slvcfg.mode = mode;
|
hd_slvcfg.mode = mode;
|
||||||
@@ -1611,7 +1720,8 @@ TEST_CASE_MULTIPLE_DEVICES("TEST_SPI_Freq_HD_no_DMA", "[spi_ms][timeout=30]", te
|
|||||||
static int s_master_input_delay[] = {12.5, 12.5 * 2, 12.5 * 2, 12.5 * 5, 12.5 * 5};
|
static int s_master_input_delay[] = {12.5, 12.5 * 2, 12.5 * 2, 12.5 * 5, 12.5 * 5};
|
||||||
#endif
|
#endif
|
||||||
//------------------------------------------- SIO with DMA Freq test --------------------------------------
|
//------------------------------------------- SIO with DMA Freq test --------------------------------------
|
||||||
static void test_master_sio_dma(void){
|
static void test_master_sio_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
@@ -1685,7 +1795,8 @@ static void test_master_sio_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_sio_dma(void){
|
static void test_slave_sio_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(TEST_STEP_LEN, MALLOC_CAP_DEFAULT);
|
||||||
@@ -1740,7 +1851,8 @@ TEST_CASE_MULTIPLE_DEVICES("TEST_SPI_Freq_SIO_DMA", "[spi_ms][timeout=30]", test
|
|||||||
|
|
||||||
|
|
||||||
//------------------------------------------- SIO no DMA Freq test --------------------------------------
|
//------------------------------------------- SIO no DMA Freq test --------------------------------------
|
||||||
static void test_master_sio_no_dma(void){
|
static void test_master_sio_no_dma(void)
|
||||||
|
{
|
||||||
spi_device_handle_t dev0;
|
spi_device_handle_t dev0;
|
||||||
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *master_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
@@ -1815,7 +1927,8 @@ static void test_master_sio_no_dma(void){
|
|||||||
free(master_expect);
|
free(master_expect);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void test_slave_sio_no_dma(void){
|
static void test_slave_sio_no_dma(void)
|
||||||
|
{
|
||||||
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_send = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
uint8_t *slave_recive = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DMA);
|
||||||
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
uint8_t *slave_expect = heap_caps_malloc(SOC_SPI_MAXIMUM_BUFFER_SIZE, MALLOC_CAP_DEFAULT);
|
||||||
|
Reference in New Issue
Block a user