diff --git a/components/bt/controller/esp32h2/bt.c b/components/bt/controller/esp32h2/bt.c
index a97ef0f0d1..2ce34023e3 100644
--- a/components/bt/controller/esp32h2/bt.c
+++ b/components/bt/controller/esp32h2/bt.c
@@ -235,8 +235,8 @@ struct ext_funcs_t ext_funcs_ro = {
 
 static void IRAM_ATTR esp_reset_rpa_moudle(void)
 {
-    DPORT_SET_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
-    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_BAH_RST);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_BAH_RST);
 
 }
 
diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h
index 6cbd50965e..25e4674d84 100644
--- a/components/hal/esp32h2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h
@@ -68,7 +68,7 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
     case PERIPH_ETM_MODULE:
         return SYSTEM_ETM_CLK_EN;
     case PERIPH_MODEM_RPA_MODULE:
-        return SYSTEM_BLE_SEC_AAR_CLK_EN;
+        return SYSTEM_BLE_SEC_BAH_CLK_EN;
     default:
         return 0;
     }
@@ -145,7 +145,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
     case PERIPH_ETM_MODULE:
         return SYSTEM_ETM_RST;
     case PERIPH_MODEM_RPA_MODULE:
-        return SYSTEM_BLE_SEC_AAR_RST;
+        return SYSTEM_BLE_SEC_BAH_RST;
     default:
         return 0;
     }
diff --git a/components/soc/esp32h2/include/rev1/soc/clkrst_reg.h b/components/soc/esp32h2/include/rev1/soc/clkrst_reg.h
index 569de9b2da..727ce1e34e 100644
--- a/components/soc/esp32h2/include/rev1/soc/clkrst_reg.h
+++ b/components/soc/esp32h2/include/rev1/soc/clkrst_reg.h
@@ -171,12 +171,12 @@ extern "C" {
 #define SYSTEM_BLE_SEC_CLK_EN_M  (BIT(17))
 #define SYSTEM_BLE_SEC_CLK_EN_V  0x1
 #define SYSTEM_BLE_SEC_CLK_EN_S  17
-/* SYSTEM_BLE_SEC_AAR_CLK_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
+/* SYSTEM_BLE_SEC_BAH_CLK_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
 /*description: */
-#define SYSTEM_BLE_SEC_AAR_CLK_EN  (BIT(16))
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_M  (BIT(16))
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_V  0x1
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_S  16
+#define SYSTEM_BLE_SEC_BAH_CLK_EN  (BIT(16))
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_M  (BIT(16))
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_V  0x1
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_S  16
 /* SYSTEM_BLE_SEC_CCM_CLK_EN : R/W ;bitpos:[15] ;default: 1'b0 ; */
 /*description: */
 #define SYSTEM_BLE_SEC_CCM_CLK_EN  (BIT(15))
@@ -293,12 +293,12 @@ extern "C" {
 #define SYSTEM_BLE_SEC_RST_M  (BIT(18))
 #define SYSTEM_BLE_SEC_RST_V  0x1
 #define SYSTEM_BLE_SEC_RST_S  18
-/* SYSTEM_BLE_SEC_AAR_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
+/* SYSTEM_BLE_SEC_BAH_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
 /*description: */
-#define SYSTEM_BLE_SEC_AAR_RST  (BIT(17))
-#define SYSTEM_BLE_SEC_AAR_RST_M  (BIT(17))
-#define SYSTEM_BLE_SEC_AAR_RST_V  0x1
-#define SYSTEM_BLE_SEC_AAR_RST_S  17
+#define SYSTEM_BLE_SEC_BAH_RST  (BIT(17))
+#define SYSTEM_BLE_SEC_BAH_RST_M  (BIT(17))
+#define SYSTEM_BLE_SEC_BAH_RST_V  0x1
+#define SYSTEM_BLE_SEC_BAH_RST_S  17
 /* SYSTEM_BLE_SEC_CCM_RST : R/W ;bitpos:[16] ;default: 1'b0 ; */
 /*description: */
 #define SYSTEM_BLE_SEC_CCM_RST  (BIT(16))
diff --git a/components/soc/esp32h2/include/rev2/soc/clkrst_reg.h b/components/soc/esp32h2/include/rev2/soc/clkrst_reg.h
index 5ab1aad5ea..66da37e850 100644
--- a/components/soc/esp32h2/include/rev2/soc/clkrst_reg.h
+++ b/components/soc/esp32h2/include/rev2/soc/clkrst_reg.h
@@ -327,13 +327,13 @@ extern "C" {
 #define SYSTEM_BLE_SEC_CCM_CLK_EN_M  (SYSTEM_BLE_SEC_CCM_CLK_EN_V << SYSTEM_BLE_SEC_CCM_CLK_EN_S)
 #define SYSTEM_BLE_SEC_CCM_CLK_EN_V  0x00000001U
 #define SYSTEM_BLE_SEC_CCM_CLK_EN_S  15
-/** SYSTEM_BLE_SEC_AAR_CLK_EN : R/W; bitpos: [16]; default: 0;
+/** SYSTEM_BLE_SEC_BAH_CLK_EN : R/W; bitpos: [16]; default: 0;
  *  Need add description
  */
-#define SYSTEM_BLE_SEC_AAR_CLK_EN    (BIT(16))
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_M  (SYSTEM_BLE_SEC_AAR_CLK_EN_V << SYSTEM_BLE_SEC_AAR_CLK_EN_S)
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_V  0x00000001U
-#define SYSTEM_BLE_SEC_AAR_CLK_EN_S  16
+#define SYSTEM_BLE_SEC_BAH_CLK_EN    (BIT(16))
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_M  (SYSTEM_BLE_SEC_BAH_CLK_EN_V << SYSTEM_BLE_SEC_BAH_CLK_EN_S)
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_V  0x00000001U
+#define SYSTEM_BLE_SEC_BAH_CLK_EN_S  16
 /** SYSTEM_BLE_SEC_CLK_EN : R/W; bitpos: [17]; default: 0;
  *  Need add description
  */
@@ -500,13 +500,13 @@ extern "C" {
 #define SYSTEM_BLE_SEC_CCM_RST_M  (SYSTEM_BLE_SEC_CCM_RST_V << SYSTEM_BLE_SEC_CCM_RST_S)
 #define SYSTEM_BLE_SEC_CCM_RST_V  0x00000001U
 #define SYSTEM_BLE_SEC_CCM_RST_S  16
-/** SYSTEM_BLE_SEC_AAR_RST : R/W; bitpos: [17]; default: 0;
+/** SYSTEM_BLE_SEC_BAH_RST : R/W; bitpos: [17]; default: 0;
  *  Need add description
  */
-#define SYSTEM_BLE_SEC_AAR_RST    (BIT(17))
-#define SYSTEM_BLE_SEC_AAR_RST_M  (SYSTEM_BLE_SEC_AAR_RST_V << SYSTEM_BLE_SEC_AAR_RST_S)
-#define SYSTEM_BLE_SEC_AAR_RST_V  0x00000001U
-#define SYSTEM_BLE_SEC_AAR_RST_S  17
+#define SYSTEM_BLE_SEC_BAH_RST    (BIT(17))
+#define SYSTEM_BLE_SEC_BAH_RST_M  (SYSTEM_BLE_SEC_BAH_RST_V << SYSTEM_BLE_SEC_BAH_RST_S)
+#define SYSTEM_BLE_SEC_BAH_RST_V  0x00000001U
+#define SYSTEM_BLE_SEC_BAH_RST_S  17
 /** SYSTEM_BLE_SEC_RST : R/W; bitpos: [18]; default: 0;
  *  Need add description
  */