diff --git a/components/esp_system/port/soc/esp32c2/reset_reason.c b/components/esp_system/port/soc/esp32c2/reset_reason.c
index 98798860d0..e82c27a6fe 100644
--- a/components/esp_system/port/soc/esp32c2/reset_reason.c
+++ b/components/esp_system/port/soc/esp32c2/reset_reason.c
@@ -34,7 +34,7 @@ static esp_reset_reason_t get_reset_reason(soc_reset_reason_t rtc_reset_reason,
         return ESP_RST_DEEPSLEEP;
 
     case RESET_REASON_CORE_MWDT0:
-        return ESP_RST_TASK_WDT;
+        return ESP_RST_INT_WDT;
 
     case RESET_REASON_CORE_RTC_WDT:
     case RESET_REASON_SYS_RTC_WDT:
diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c b/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
index 72b70eb943..d5d7ef1f23 100644
--- a/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
+++ b/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
@@ -19,6 +19,9 @@
 
 #define CHECK_VALUE 0x89abcdef
 
+#if CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED
+#define CHECK_RTC_MEM 1
+#endif //CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED
 
 #if CONFIG_IDF_TARGET_ESP32
 #define DEEPSLEEP           "DEEPSLEEP_RESET"
@@ -44,7 +47,7 @@
 #define BROWNOUT            "BROWN_OUT_RST"
 #define STORE_ERROR         "StoreProhibited"
 
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 #define DEEPSLEEP           "DSLEEP"
 #define LOAD_STORE_ERROR    "Store access fault"
 #define RESET               "RTC_SW_CPU_RST"
@@ -53,6 +56,15 @@
 #define RTC_WDT             "RTCWDT_RTC_RST"
 #define BROWNOUT            "BROWNOUT_RST"
 #define STORE_ERROR         LOAD_STORE_ERROR
+#elif CONFIG_IDF_TARGET_ESP32C2
+#define DEEPSLEEP           "DSLEEP"
+#define LOAD_STORE_ERROR    "Store access fault"
+#define RESET               "RTC_SW_CPU_RST"
+#define INT_WDT_PANIC       "Interrupt wdt timeout on CPU0"
+#define INT_WDT             "TG0WDT_SYS_RST"
+#define RTC_WDT             "RTCWDT_RTC_RST"
+#define BROWNOUT            "BROWNOUT_RST"
+#define STORE_ERROR         LOAD_STORE_ERROR
 
 #elif CONFIG_IDF_TARGET_ESP32C6
 #define DEEPSLEEP           "DSLEEP"
@@ -76,9 +88,10 @@ TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
 }
 
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2, ESP32H2)
-//IDF-5059
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
 static __NOINIT_ATTR uint32_t s_noinit_val;
+
+#if CHECK_RTC_MEM
 static RTC_NOINIT_ATTR uint32_t s_rtc_noinit_val;
 static RTC_DATA_ATTR uint32_t s_rtc_data_val;
 static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
@@ -89,10 +102,12 @@ static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
 static RTC_RODATA_ATTR uint32_t s_rtc_rodata_val = CHECK_VALUE;
 static RTC_FAST_ATTR uint32_t s_rtc_force_fast_val;
 static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
+#endif //CHECK_RTC_MEM
 
 static void setup_values(void)
 {
     s_noinit_val = CHECK_VALUE;
+#if CHECK_RTC_MEM
     s_rtc_noinit_val = CHECK_VALUE;
     s_rtc_data_val = CHECK_VALUE;
     s_rtc_bss_val = CHECK_VALUE;
@@ -100,10 +115,9 @@ static void setup_values(void)
             "s_rtc_rodata_val should already be set up");
     s_rtc_force_fast_val = CHECK_VALUE;
     s_rtc_force_slow_val = CHECK_VALUE;
+#endif //CHECK_RTC_MEM
 }
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C6)
-// TODO IDF-5349, enable test when deep sleep is brought up
 static void do_deep_sleep(void)
 {
     setup_values();
@@ -115,18 +129,20 @@ static void check_reset_reason_deep_sleep(void)
 {
     TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
 
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_data_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_bss_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_fast_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_slow_val);
+#endif //CHECK_RTC_MEM
+
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_DEEPSLEEP", "[reset_reason][reset="DEEPSLEEP"]",
         do_deep_sleep,
         check_reset_reason_deep_sleep);
-#endif // TEMPORARY_DISABLED_FOR_TARGETS
 
 static void do_exception(void)
 {
@@ -145,12 +161,14 @@ static void check_reset_reason_panic(void)
     TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
 
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after exception", "[reset_reason][reset="LOAD_STORE_ERROR","RESET"]",
@@ -181,12 +199,14 @@ static void check_reset_reason_sw(void)
     TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
 
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart", "[reset_reason][reset="RESET"]",
@@ -226,7 +246,9 @@ static void do_int_wdt_hw(void)
 static void check_reset_reason_int_wdt(void)
 {
     TEST_ASSERT_EQUAL(ESP_RST_INT_WDT, esp_reset_reason());
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_INT_WDT after interrupt watchdog (panic)",
@@ -257,12 +279,14 @@ static void check_reset_reason_task_wdt(void)
     TEST_ASSERT_EQUAL(ESP_RST_TASK_WDT, esp_reset_reason());
 
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_TASK_WDT after task watchdog",
@@ -288,7 +312,9 @@ static void do_rtc_wdt(void)
 static void check_reset_reason_any_wdt(void)
 {
     TEST_ASSERT_EQUAL(ESP_RST_WDT, esp_reset_reason());
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_WDT after RTC watchdog",
@@ -309,12 +335,14 @@ static void check_reset_reason_brownout(void)
     TEST_ASSERT_EQUAL(ESP_RST_BROWNOUT, esp_reset_reason());
 
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
+#if CHECK_RTC_MEM
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
     TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
     TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
+#endif //CHECK_RTC_MEM
 }
 
 TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event",